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imx8mp: Disables use of MR4 TUF flag (MR4[7]) bit
authorJian Li <jian.li@nxp.com>
Thu, 27 Feb 2020 01:40:10 +0000 (09:40 +0800)
committerPeng Fan <peng.fan@nxp.com>
Tue, 14 Jul 2020 07:23:46 +0000 (15:23 +0800)
commit3f63d27c177a84dd97f77fb843ff4e4c6d7d45eb
treebe1e34e84d79011ff9711c723f3d6706f45a40c1tree | snapshot
parent5865d14dde8f60f678e144e432a5e5ad223915d0commit | diff
imx8mp: Disables use of MR4 TUF flag (MR4[7]) bit

In uMCTL2 Databook, for LPDDR4, it is recommended to set
this register to 1. This can avoid ddr bandwidth is lower
after booting with running for a while.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
board/freescale/imx8mp_evk/lpddr4_timing.c diff | blob | history
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