riscv: lib: Split out support for T-Head cache management operations
authorYao Zi <ziyao@disroot.org>
Tue, 13 May 2025 09:04:54 +0000 (09:04 +0000)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Wed, 21 May 2025 08:49:52 +0000 (16:49 +0800)
commit3dbff9eecc869bc28ce010cf97d2cfee25c44f3a
tree9439bba2cf554b27e6a6a50f974f6f7fdda105f4
parentbbf5f79bba07703c85ab9e3f4101758afb402c09
riscv: lib: Split out support for T-Head cache management operations

Designed before a standard set of cache management operations defined in
RISC-V, earlier T-Head cores like C906 and C910 provide CMO through the
customized extension XTheadCMO, which has been used in the CV1800B port
of U-Boot.

This patch splits XTheadCMO-related code into a generic module, allowing
SoCs shipping T-Head cores to share the code.

Link: https://github.com/XUANTIE-RV/thead-extension-spec
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/Kconfig
arch/riscv/cpu/cv1800b/Kconfig
arch/riscv/cpu/cv1800b/Makefile
arch/riscv/lib/Makefile
arch/riscv/lib/thead_cmo.c [moved from arch/riscv/cpu/cv1800b/cache.c with 100% similarity]