riscv: Access gd with inline assembly when building with LTO or Clang
authorYao Zi <ziyao@disroot.org>
Sun, 27 Apr 2025 14:50:11 +0000 (14:50 +0000)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Wed, 21 May 2025 08:46:16 +0000 (16:46 +0800)
commit307666be28db0d89cbdcfafd2cf0e0cf5bf386db
tree318ba2cf0407a5e5bd51234177ff04aa03f8bd40
parent60163080949a57ba28bc10cb599dc2a9b53c75c4
riscv: Access gd with inline assembly when building with LTO or Clang

Similar to AArch64's case, Clang may wrongly fold accesses to gd pointer
which is defined with register qualifier into constants, breaking
various components.

This patch defines gd as a macro when building with Clang or LTO, which
expands to get_gd() that accesses gp pointer in assembly, making RISC-V
ports function properly and preparing for introduction of LTO in the
future. Board initialization code is also adapted for non-assignable gd.

Reported-by: Nathaniel Hourt <I@nathaniel.land>
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/cpu/cpu.c
arch/riscv/include/asm/global_data.h
common/board_r.c
common/init/board_init.c