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(parent: 3d54b52) | patch
arm: socfpga: agilex5: Add MMU mapping region
authorTingting Meng <tingting.meng@altera.com>
Mon, 10 Mar 2025 07:29:41 +0000 (15:29 +0800)
committerTien Fong Chee <tien.fong.chee@intel.com>
Tue, 22 Apr 2025 03:47:40 +0000 (11:47 +0800)
commit1f8d5085e985884ae1c82254d6e1af231f9d9e8b
treede57a8d915b89f720629a5b9217421dec98a694atree | snapshot
parent3d54b52addc0c8c58a7f9aa97c6c145d773a1e0ecommit | diff
arm: socfpga: agilex5: Add MMU mapping region

MMU mapping regions were added for the second and third DDR memory banks.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
arch/arm/mach-socfpga/mmu-arm64_s10.c diff | blob | history
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