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(parent: 209d53e) | patch
ddr: altera: agilex: Get ACF from boot scratch register
authorAlif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Mon, 4 Aug 2025 01:24:41 +0000 (18:24 -0700)
committerTien Fong Chee <tien.fong.chee@intel.com>
Fri, 8 Aug 2025 14:20:49 +0000 (22:20 +0800)
commit1e354de7fc36c5cf1f7e77c5dca4713100fbb503
tree2660cc7036772b739c487e0961f12991f05d3d36tree | snapshot
parent209d53eb1b486776dd1a7ad7f8611083fff7ad26commit | diff
ddr: altera: agilex: Get ACF from boot scratch register

The DDR data rate must be set correctly in the DDRIOCTRL
register according to the Actual Clock Frequency (ACF) value.

By enabling the reading of ACF value from bit 18 of the boot
scratch register during initialization, the DDR data rate is
able to be configured accurately.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arch/arm/mach-socfpga/include/mach/system_manager_soc64.h diff | blob | history
drivers/ddr/altera/sdram_agilex.c diff | blob | history
drivers/ddr/altera/sdram_soc64.h diff | blob | history
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