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board: venice: fix dram bus config for GW7902/GW7903/GW7904
authorTim Harvey <tharvey@gateworks.com>
Fri, 23 May 2025 17:20:09 +0000 (10:20 -0700)
committerFabio Estevam <festevam@gmail.com>
Fri, 30 May 2025 22:10:55 +0000 (19:10 -0300)
commit1bf9f1e5501819dd39abcbfc87c823d4639c128e
tree311b956ac43019556ccfdc7d1ec583a0c4749570tree | snapshot
parent66e8b17eeef52ec78286386a871675d8bfb898ddcommit | diff
board: venice: fix dram bus config for GW7902/GW7903/GW7904

The GW7902/GW7903/GW7904 have an alternate databus layout affecting a few
of the DDRC and DDR PHY registers.

The 512MB configuration used this alternate bus layout. Change
the 512MB config to the standard bus configuration and add a generic
function to patch the DDRC/PHY configs for the alternate bus layout.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
board/gateworks/venice/lpddr4_timing_imx8mm.c diff | blob | history
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