riscv: dts: th1520: Add binman configuration
authorYao Zi <ziyao@disroot.org>
Tue, 13 May 2025 09:05:01 +0000 (09:05 +0000)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Wed, 21 May 2025 08:49:52 +0000 (16:49 +0800)
commit19ec61b3e6c9c9b027d50eda9f03929bdd00b4a9
treea4c5c25e1200c82ca4a01795eb04d84a776d851b
parent64735e56aa0ae5cf37fed25dbcc16934bfb2bfce
riscv: dts: th1520: Add binman configuration

Add binman configuration for TH1520 SoC, whose BROM loads the image
combined into SRAM and directly jumps to it. The configuration creates
u-boot-with-spl.bin where the SPL code locates at the start and the DDR
firmware is shipped.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/dts/thead-th1520-binman.dtsi [new file with mode: 0644]