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(parent: 42a064d) | patch
clk: renesas: Add R8A779H0 V4M clock tables
authorHai Pham <hai.pham.ud@renesas.com>
Sun, 28 Jan 2024 15:52:01 +0000 (16:52 +0100)
committerMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 10 Feb 2024 16:08:06 +0000 (17:08 +0100)
commit13a014c38c16a2a2b0b890c13c31eca5e68e72c7
tree9cb67dc53c0486923981a8508465f22503fee44ctree | snapshot
parent42a064d1d76892981301921ae90905d8aa29a86dcommit | diff
clk: renesas: Add R8A779H0 V4M clock tables

Add clock tables for R8A779H0 V4M SoC.

The current version is imported from:
https://lore.kernel.org/linux-renesas-soc/c678ef7164e3777fa91572f72e47ef385cea64b8.1706194617.git.geert+renesas@glider.be/
The current version still contains PLL7 extras from the
previous version to provide ethernet support in U-Boot.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
drivers/clk/renesas/Kconfig diff | blob | history
drivers/clk/renesas/Makefile diff | blob | history
drivers/clk/renesas/r8a779h0-cpg-mssr.c [new file with mode: 0644] blob
drivers/clk/renesas/rcar-gen3-cpg.h diff | blob | history
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