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(parent: a776493) | patch
clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock
authorChristian Marangi <ansuelsmth@gmail.com>
Sat, 3 Aug 2024 08:43:25 +0000 (10:43 +0200)
committerTom Rini <trini@konsulko.com>
Mon, 19 Aug 2024 22:15:26 +0000 (16:15 -0600)
commit105c78844a6cf72eefbfd614fc52da92bc0341f1
tree0552b2d21de8843ede60460e97476ed57964a6fatree | snapshot
parenta776493f4b4b51515db456e635709a93e256dacdcommit | diff
clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock

Add missing PERIBUS_SEL clock to match upstream linux clk ID order. Also
convert pericfg to mux + gate implementation as now we have also mux on
top of gates.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
drivers/clk/mediatek/clk-mt7622.c diff | blob | history
include/dt-bindings/clock/mt7622-clk.h diff | blob | history
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