ARM: tegra: clock: take in account PLLD/D2 enable bit on clock_set_rate
authorSvyatoslav Ryhel <clamor95@gmail.com>
Mon, 24 Mar 2025 19:24:45 +0000 (21:24 +0200)
committerSvyatoslav Ryhel <clamor95@gmail.com>
Sat, 12 Apr 2025 06:42:35 +0000 (09:42 +0300)
commit0edc47ba7332c72ae1d18003a18c717143cab78b
tree5116e34ba4e04b77be20af42e566805569fdb6ca
parent6bbe348bfccea3b967aa398a6d46bcb8439d093f
ARM: tegra: clock: take in account PLLD/D2 enable bit on clock_set_rate

PLLD and PLLD2 clocks possess a unique enable bit within their
miscellaneous register. Take this into account when using clock_set_rate
function.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
arch/arm/mach-tegra/clock.c