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ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state
authorJean Pihet <jean.pihet@newoldbits.com>
Fri, 1 Jun 2012 15:11:07 +0000 (17:11 +0200)
committerGrazvydas Ignotas <notasas@gmail.com>
Mon, 14 Apr 2014 00:23:55 +0000 (03:23 +0300)
commit05850b772aae122313a84cd057dd00cce2b00d99
tree8e7c0613254aaa836fee0d8ac66feb7a0bf5c8f6tree | snapshot
parentdb63f2b7a7298da3a4ad42d21de76dd4aa843bbbcommit | diff
ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state

One of the main contributors of the low power code latency is
the PER power domain. To optimize the high-performance and
low-latency C1 state, prevent any PER state which is lower
than the CORE state in C1.

Reported and suggested by Kevin Hilman.

Reported-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Conflicts:

arch/arm/mach-omap2/cpuidle34xx.c
arch/arm/mach-omap2/cpuidle34xx.c diff | blob | history
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