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arm: socfpga: smc: Add memory coherency support to mailbox command
authorAlif Zakuan Yuslaimi <alif.zakuan.yuslaimi@intel.com>
Tue, 18 Feb 2025 08:35:03 +0000 (16:35 +0800)
committerTom Rini <trini@konsulko.com>
Tue, 25 Feb 2025 16:54:00 +0000 (10:54 -0600)
commit034ebe3302200c033078455c5774ed739cd4f2ac
treeb0d34788eccb7b693097ff5c4f25d04d42708b4atree | snapshot
parent19f20cfc49e385dd5ae5583ae68bd31f20de622ccommit | diff
arm: socfpga: smc: Add memory coherency support to mailbox command

As cache is enabled in U-Boot and disabled in ATF(BL31). We need to
perform cache flush of buffers that are shared between U-Boot and
ATF using secure monitor calls.

Signed-off-by: Mahesh Rao <mahesh.rao@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arch/arm/mach-socfpga/smc_api.c diff | blob | history
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