#define PFX KBUILD_MODNAME ": "
#define BCM43xx_SWITCH_CORE_MAX_RETRIES 50
-#define BCM43xx_IRQWAIT_MAX_RETRIES 50
+#define BCM43xx_IRQWAIT_MAX_RETRIES 100
#define BCM43xx_IO_SIZE 8192
#define BCM43xx_SBF_PS2 0x04000000
#define BCM43xx_SBF_NO_SSID_BCAST 0x08000000
#define BCM43xx_SBF_TIME_UPDATE 0x10000000
-#define BCM43xx_SBF_80000000 0x80000000 /*FIXME: fix name*/
+#define BCM43xx_SBF_MODE_G 0x80000000
/* Microcode */
#define BCM43xx_UCODE_REVISION 0x0000
u8 et1macaddr[6];
u8 et0phyaddr:5;
u8 et1phyaddr:5;
- u8 et0mdcport:1;
- u8 et1mdcport:1;
u8 boardrev;
u8 locale:4;
u8 antennas_aphy:2;
struct bcm43xx_phyinfo {
/* Hardware Data */
- u8 version;
+ u8 analog;
u8 type;
u8 rev;
u16 antenna_diversity;