Merge branch 'master' of github.com:davem330/net

[pandora-kernel.git] / drivers / net / wireless / ath / ath9k / ar9003_phy.c

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index fcafec0..4956d09 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -370,7 +370,7 @@ static void ar9003_hw_spur_ofdm_work(struct ath_hw *ah,
                        else
                                spur_subchannel_sd = 0;
 
-                       spur_freq_sd = ((freq_offset + 10) << 9) / 11;
+                       spur_freq_sd = (freq_offset << 9) / 11;
 
                } else {
                        if (REG_READ_FIELD(ah, AR_PHY_GEN_CTRL,
@@ -379,7 +379,7 @@ static void ar9003_hw_spur_ofdm_work(struct ath_hw *ah,
                        else
                                spur_subchannel_sd = 1;
 
-                       spur_freq_sd = ((freq_offset - 10) << 9) / 11;
+                       spur_freq_sd = (freq_offset << 9) / 11;
 
                }
 
@@ -482,7 +482,7 @@ static void ar9003_hw_set_channel_regs(struct ath_hw *ah,
                (REG_READ(ah, AR_PHY_GEN_CTRL) & AR_PHY_GC_ENABLE_DAC_FIFO);
 
        /* Enable 11n HT, 20 MHz */
-       phymode = AR_PHY_GC_HT_EN | AR_PHY_GC_SINGLE_HT_LTF1 | AR_PHY_GC_WALSH |
+       phymode = AR_PHY_GC_HT_EN | AR_PHY_GC_SINGLE_HT_LTF1 |
                  AR_PHY_GC_SHORT_GI_40 | enableDacFifo;
 
        /* Configure baseband for dynamic 20/40 operation */
@@ -540,7 +540,7 @@ static void ar9003_hw_init_bb(struct ath_hw *ah,
        udelay(synthDelay + BASE_ACTIVATE_DELAY);
 }
 
-void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
+static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
 {
        switch (rx) {
        case 0x5:
@@ -559,6 +559,9 @@ void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
 
        if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7))
                REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
+       else if (AR_SREV_9480(ah))
+               /* xxx only when MCI support is enabled */
+               REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
        else
                REG_WRITE(ah, AR_SELFGEN_MASK, tx);
 
@@ -658,6 +661,10 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
                ar9003_hw_prog_ini(ah, &ah->iniMac[i], modesIndex);
                ar9003_hw_prog_ini(ah, &ah->iniBB[i], modesIndex);
                ar9003_hw_prog_ini(ah, &ah->iniRadio[i], modesIndex);
+               if (i == ATH_INI_POST && AR_SREV_9480_20(ah))
+                       ar9003_hw_prog_ini(ah,
+                                          &ah->ini_radio_post_sys2ant,
+                                          modesIndex);
        }
 
        REG_WRITE_ARRAY(&ah->iniModesRxGain, 1, regWrites);
@@ -677,6 +684,9 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
        if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
                REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
 
+       if (AR_SREV_9480(ah))
+               ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1);
+
        ar9003_hw_override_ini(ah);
        ar9003_hw_set_channel_regs(ah, chan);
        ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);