1 From 484186abcf6d44cc690c73d68148edde8b0b365b Mon Sep 17 00:00:00 2001
2 From: Sergio Aguirre <saaguirre@ti.com>
3 Date: Thu, 4 Feb 2010 18:12:37 -0600
4 Subject: [PATCH 14/75] OMAP3: CLOCK: Add capability to change rate of dpll4_m5_ck_3630
6 Add necessary clk_sel definitions to clock framework to allow changing
9 Based on patch by Tuukka Toivonen <tuukka.o.toivonen@nokia.com> with subject:
11 OMAP3: CLOCK: Add capability to change rate of dpll4_m5_ck
13 Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
15 arch/arm/mach-omap2/clock34xx_data.c | 2 ++
16 1 files changed, 2 insertions(+), 0 deletions(-)
18 diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c
19 index 89e2f61..8d101ef 100644
20 --- a/arch/arm/mach-omap2/clock34xx_data.c
21 +++ b/arch/arm/mach-omap2/clock34xx_data.c
22 @@ -934,6 +934,8 @@ static struct clk dpll4_m5_ck_3630 __initdata = {
23 .clksel = div32_dpll4_clksel,
24 .clkdm_name = "dpll4_clkdm",
25 .recalc = &omap2_clksel_recalc,
26 + .set_rate = &omap2_clksel_set_rate,
27 + .round_rate = &omap2_clksel_round_rate,
30 /* The PWRDN bit is apparently only available on 3430ES2 and above */