Pandora Sourcecodes - openembedded.git/blob

   1 From 06f37751af77192b424b2b0ff17dc08de65faba0 Mon Sep 17 00:00:00 2001
   2 From: Eric Anholt <eric@anholt.net>
   3 Date: Tue, 14 Dec 2010 10:06:46 -0800
   4 Subject: [PATCH 06/66] drm/i915: Set the required VFMUNIT clock gating disable on Ironlake.
   5
   6 It's required by the specs, but we don't know why.  Let's not find out
   7 why.
   8
   9 Signed-off-by: Eric Anholt <eric@anholt.net>
  10 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
  11 ---
  12  drivers/gpu/drm/i915/i915_reg.h      |    3 +++
  13  drivers/gpu/drm/i915/intel_display.c |    2 ++
  14  2 files changed, 5 insertions(+), 0 deletions(-)
  15
  16 diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
  17 index 878fc76..8470a97 100644
  18 --- a/drivers/gpu/drm/i915/i915_reg.h
  19 +++ b/drivers/gpu/drm/i915/i915_reg.h
  20 @@ -2471,6 +2471,9 @@
  21  # define MARIUNIT_CLOCK_GATE_DISABLE           (1 << 18)
  22  # define SVSMUNIT_CLOCK_GATE_DISABLE           (1 << 1)
  23
  24 +#define PCH_3DCGDIS1           0x46024
  25 +# define VFMUNIT_CLOCK_GATE_DISABLE            (1 << 11)
  26 +
  27  #define FDI_PLL_FREQ_CTL        0x46030
  28  #define  FDI_PLL_FREQ_CHANGE_REQUEST    (1<<24)
  29  #define  FDI_PLL_FREQ_LOCK_LIMIT_MASK   0xfff00
  30 diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
  31 index d9b7092..97e374e 100644
  32 --- a/drivers/gpu/drm/i915/intel_display.c
  33 +++ b/drivers/gpu/drm/i915/intel_display.c
  34 @@ -5825,6 +5825,8 @@ void intel_init_clock_gating(struct drm_device *dev)
  35                         I915_WRITE(PCH_3DCGDIS0,
  36                                    MARIUNIT_CLOCK_GATE_DISABLE |
  37                                    SVSMUNIT_CLOCK_GATE_DISABLE);
  38 +                       I915_WRITE(PCH_3DCGDIS1,
  39 +                                  VFMUNIT_CLOCK_GATE_DISABLE);
  40                 }
  41
  42                 I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);
  43 --
  44 1.6.6.1
  45