1 From 8580a3eafe3351e3c0f1ca3d0bc959bbeec40e28 Mon Sep 17 00:00:00 2001
2 From: Koen Kooi <koen@dominion.thruhere.net>
3 Date: Tue, 27 Apr 2010 18:25:57 +0200
4 Subject: [PATCH 34/37] OMAP3: beagle: add pinmux for Tincantools Trainer expansionboard
7 board/ti/beagle/beagle.c | 2 ++
8 board/ti/beagle/beagle.h | 16 +++++++++++++++-
9 2 files changed, 17 insertions(+), 1 deletions(-)
11 diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
12 index 58fb7c3..39c53f2 100644
13 --- a/board/ti/beagle/beagle.c
14 +++ b/board/ti/beagle/beagle.c
15 @@ -181,6 +181,8 @@ int misc_init_r(void)
16 case TINCANTOOLS_TRAINER:
17 printf("Recognized Tincantools Trainer expansion board (rev %d %s)\n",
18 expansion_config.revision, expansion_config.fab_revision);
19 + MUX_TINCANTOOLS_ZIPPY();
20 + MUX_TINCANTOOLS_TRAINER();
22 case TINCANTOOLS_SHOWDOG:
23 printf("Recognized Tincantools Showdow expansion board (rev %d %s)\n",
24 diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
25 index 90a0ebf..7774855 100644
26 --- a/board/ti/beagle/beagle.h
27 +++ b/board/ti/beagle/beagle.h
28 @@ -433,7 +433,21 @@ const omap3_sysinfo sysinfo = {
29 MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_162*/\
30 MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\
31 MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M4)) /*GPIO_142*/\
32 - MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_141*/\
33 + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_141*/
35 +#define MUX_TINCANTOOLS_TRAINER() \
36 + MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M4)) /*GPIO_130*/\
37 + MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M4)) /*GPIO_131*/\
38 + MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132*/\
39 + MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133*/\
40 + MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M4)) /*GPIO_134*/\
41 + MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M4)) /*GPIO_135*/\
42 + MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M4)) /*GPIO_136*/\
43 + MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137*/\
44 + MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M4)) /*GPIO_138*/\
45 + MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139*/\
46 + MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) /*GPIO_140*/\
47 + MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTU | EN | M4)) /*GPIO_141*/
49 #define MUX_KBADC_BEAGLEFPGA() \
50 MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTU | DIS | M1)) /*MCSPI4_CLK*/\