1 From fae6228e203436ce0d82ce32da769bd91206865f Mon Sep 17 00:00:00 2001
2 From: Steve Sakoman <steve@sakoman.com>
3 Date: Wed, 10 Feb 2010 14:51:48 -0800
4 Subject: [PATCH 03/50] OMAP3: update Beagle revision detection to recognize C4 boards
7 board/ti/beagle/beagle.c | 77 +++++++++++++++++++++++++++-------------------
8 board/ti/beagle/beagle.h | 7 +++-
9 2 files changed, 51 insertions(+), 33 deletions(-)
11 diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
12 index 3b4c9e7..ba16dd7 100644
13 --- a/board/ti/beagle/beagle.c
14 +++ b/board/ti/beagle/beagle.c
16 #include <asm/mach-types.h>
19 -static int beagle_revision_c;
20 +static int beagle_revision;
24 @@ -60,41 +60,38 @@ int board_init(void)
26 * Routine: beagle_get_revision
27 * Description: Return the revision of the BeagleBoard this code is running on.
28 - * If it is a revision Ax/Bx board, this function returns 0,
29 - * on a revision C board you will get a 1.
31 int beagle_get_revision(void)
33 - return beagle_revision_c;
34 + return beagle_revision;
38 * Routine: beagle_identify
39 - * Description: Detect if we are running on a Beagle revision Ax/Bx or
40 - * Cx. This can be done by GPIO_171. If this is low, we are
41 - * running on a revision C board.
42 + * Description: Detect if we are running on a Beagle revision Ax/Bx,
43 + * C1/2/3, C4 or D. This can be done by reading
44 + * the level of GPIO173, GPIO172 and GPIO171. This should
46 + * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
47 + * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
48 + * GPIO173, GPIO172, GPIO171: 1 0 1 => C4
49 + * GPIO173, GPIO172, GPIO171: 0 0 0 => D
51 void beagle_identify(void)
53 - beagle_revision_c = 0;
54 - if (!omap_request_gpio(171)) {
57 - omap_set_gpio_direction(171, 1);
58 - val = omap_get_gpio_datain(171);
59 - omap_free_gpio(171);
62 - beagle_revision_c = 0;
64 - beagle_revision_c = 1;
67 - printf("Board revision ");
68 - if (beagle_revision_c)
72 + omap_request_gpio(171);
73 + omap_request_gpio(172);
74 + omap_request_gpio(173);
75 + omap_set_gpio_direction(171, 1);
76 + omap_set_gpio_direction(172, 1);
77 + omap_set_gpio_direction(173, 1);
79 + beagle_revision = omap_get_gpio_datain(173) << 2 |
80 + omap_get_gpio_datain(172) << 1 |
81 + omap_get_gpio_datain(171);
82 + omap_free_gpio(171);
83 + omap_free_gpio(172);
84 + omap_free_gpio(173);
88 @@ -106,9 +103,31 @@ int misc_init_r(void)
89 struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
90 struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
95 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
97 + printf("Board revision ");
98 + switch (beagle_revision) {
103 + printf("C1/C2/C3\n");
114 + printf("unknown 0x%02x\n", beagle_revision);
117 /* Configure GPIOs to output */
118 writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
119 writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
120 @@ -120,8 +139,6 @@ int misc_init_r(void)
121 writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
122 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
129 @@ -136,8 +153,4 @@ int misc_init_r(void)
130 void set_muxconf_regs(void)
134 - if (beagle_revision_c) {
138 diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
139 index 7fe6275..d95fd78 100644
140 --- a/board/ti/beagle/beagle.h
141 +++ b/board/ti/beagle/beagle.h
142 @@ -34,6 +34,11 @@ const omap3_sysinfo sysinfo = {
145 #define BOARD_REVISION_MASK (0x1 << 11)
146 +/* BeagleBoard revisions */
147 +#define REVISION_AXBX 0x7
148 +#define REVISION_CX 0x6
149 +#define REVISION_C4 0x5
150 +#define REVISION_D 0x0
154 @@ -264,7 +269,7 @@ const omap3_sysinfo sysinfo = {
155 MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*GPIO_170*/\
156 MUX_VAL(CP(MCSPI1_CLK), (IEN | PTU | EN | M4)) /*GPIO_171*/\
157 MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTU | EN | M4)) /*GPIO_172*/\
158 - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI*/\
159 + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTU | EN | M4)) /*GPIO_173*/\
160 MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\
161 MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\
162 MUX_VAL(CP(MCSPI1_CS2), (IDIS | PTD | DIS | M4)) /*GPIO_176*/\