drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Copyright (c) 2000-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/pci.h>
  21 #include <linux/dmapool.h>
  22 #include <linux/kernel.h>
  23 #include <linux/delay.h>
  24 #include <linux/ioport.h>
  25 #include <linux/sched.h>
  26 #include <linux/vmalloc.h>
  27 #include <linux/errno.h>
  28 #include <linux/init.h>
  29 #include <linux/timer.h>
  30 #include <linux/ktime.h>
  31 #include <linux/list.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/hcd.h>
  35 #include <linux/moduleparam.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/debugfs.h>
  38 #include <linux/slab.h>
  39 #include <linux/uaccess.h>
  40
  41 #include <asm/byteorder.h>
  42 #include <asm/io.h>
  43 #include <asm/irq.h>
  44 #include <asm/system.h>
  45 #include <asm/unaligned.h>
  46
  47 /*-------------------------------------------------------------------------*/
  48
  49 /*
  50  * EHCI hc_driver implementation ... experimental, incomplete.
  51  * Based on the final 1.0 register interface specification.
  52  *
  53  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  54  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  55  * Next comes "CardBay", using USB 2.0 signals.
  56  *
  57  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  58  * Special thanks to Intel and VIA for providing host controllers to
  59  * test this driver on, and Cypress (including In-System Design) for
  60  * providing early devices for those host controllers to talk to!
  61  */
  62
  63 #define DRIVER_AUTHOR "David Brownell"
  64 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  65
  66 static const char       hcd_name [] = "ehci_hcd";
  67
  68
  69 #undef VERBOSE_DEBUG
  70 #undef EHCI_URB_TRACE
  71
  72 #ifdef DEBUG
  73 #define EHCI_STATS
  74 #endif
  75
  76 /* magic numbers that can affect system performance */
  77 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  78 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  79 #define EHCI_TUNE_RL_TT         0
  80 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  81 #define EHCI_TUNE_MULT_TT       1
  82 /*
  83  * Some drivers think it's safe to schedule isochronous transfers more than
  84  * 256 ms into the future (partly as a result of an old bug in the scheduling
  85  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  86  * length of 512 frames instead of 256.
  87  */
  88 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  89
  90 #define EHCI_IAA_MSECS          10              /* arbitrary */
  91 #define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
  92 #define EHCI_ASYNC_JIFFIES      (HZ/20)         /* async idle timeout */
  93 #define EHCI_SHRINK_JIFFIES     (DIV_ROUND_UP(HZ, 200) + 1)
  94                                                 /* 200-ms async qh unlink delay */
  95
  96 /* Initial IRQ latency:  faster than hw default */
  97 static int log2_irq_thresh = 0;         // 0 to 6
  98 module_param (log2_irq_thresh, int, S_IRUGO);
  99 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
 100
 101 /* initial park setting:  slower than hw default */
 102 static unsigned park = 0;
 103 module_param (park, uint, S_IRUGO);
 104 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 105
 106 /* for flakey hardware, ignore overcurrent indicators */
 107 static int ignore_oc = 0;
 108 module_param (ignore_oc, bool, S_IRUGO);
 109 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 110
 111 /* for link power management(LPM) feature */
 112 static unsigned int hird;
 113 module_param(hird, int, S_IRUGO);
 114 MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
 115
 116 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 117
 118 /*-------------------------------------------------------------------------*/
 119
 120 #include "ehci.h"
 121 #include "ehci-dbg.c"
 122 #include "pci-quirks.h"
 123
 124 /*-------------------------------------------------------------------------*/
 125
 126 static void
 127 timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
 128 {
 129         /* Don't override timeouts which shrink or (later) disable
 130          * the async ring; just the I/O watchdog.  Note that if a
 131          * SHRINK were pending, OFF would never be requested.
 132          */
 133         if (timer_pending(&ehci->watchdog)
 134                         && ((BIT(TIMER_ASYNC_SHRINK) | BIT(TIMER_ASYNC_OFF))
 135                                 & ehci->actions))
 136                 return;
 137
 138         if (!test_and_set_bit(action, &ehci->actions)) {
 139                 unsigned long t;
 140
 141                 switch (action) {
 142                 case TIMER_IO_WATCHDOG:
 143                         if (!ehci->need_io_watchdog)
 144                                 return;
 145                         t = EHCI_IO_JIFFIES;
 146                         break;
 147                 case TIMER_ASYNC_OFF:
 148                         t = EHCI_ASYNC_JIFFIES;
 149                         break;
 150                 /* case TIMER_ASYNC_SHRINK: */
 151                 default:
 152                         t = EHCI_SHRINK_JIFFIES;
 153                         break;
 154                 }
 155                 mod_timer(&ehci->watchdog, t + jiffies);
 156         }
 157 }
 158
 159 /*-------------------------------------------------------------------------*/
 160
 161 /*
 162  * handshake - spin reading hc until handshake completes or fails
 163  * @ptr: address of hc register to be read
 164  * @mask: bits to look at in result of read
 165  * @done: value of those bits when handshake succeeds
 166  * @usec: timeout in microseconds
 167  *
 168  * Returns negative errno, or zero on success
 169  *
 170  * Success happens when the "mask" bits have the specified value (hardware
 171  * handshake done).  There are two failure modes:  "usec" have passed (major
 172  * hardware flakeout), or the register reads as all-ones (hardware removed).
 173  *
 174  * That last failure should_only happen in cases like physical cardbus eject
 175  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 176  * bridge shutdown:  shutting down the bridge before the devices using it.
 177  */
 178 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 179                       u32 mask, u32 done, int usec)
 180 {
 181         u32     result;
 182
 183         do {
 184                 result = ehci_readl(ehci, ptr);
 185                 if (result == ~(u32)0)          /* card removed */
 186                         return -ENODEV;
 187                 result &= mask;
 188                 if (result == done)
 189                         return 0;
 190                 udelay (1);
 191                 usec--;
 192         } while (usec > 0);
 193         return -ETIMEDOUT;
 194 }
 195
 196 /* check TDI/ARC silicon is in host mode */
 197 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 198 {
 199         u32 __iomem     *reg_ptr;
 200         u32             tmp;
 201
 202         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 203         tmp = ehci_readl(ehci, reg_ptr);
 204         return (tmp & 3) == USBMODE_CM_HC;
 205 }
 206
 207 /* force HC to halt state from unknown (EHCI spec section 2.3) */
 208 static int ehci_halt (struct ehci_hcd *ehci)
 209 {
 210         u32     temp = ehci_readl(ehci, &ehci->regs->status);
 211
 212         /* disable any irqs left enabled by previous code */
 213         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 214
 215         if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
 216                 return 0;
 217         }
 218
 219         if ((temp & STS_HALT) != 0)
 220                 return 0;
 221
 222         temp = ehci_readl(ehci, &ehci->regs->command);
 223         temp &= ~CMD_RUN;
 224         ehci_writel(ehci, temp, &ehci->regs->command);
 225         return handshake (ehci, &ehci->regs->status,
 226                           STS_HALT, STS_HALT, 16 * 125);
 227 }
 228
 229 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
 230                                        u32 mask, u32 done, int usec)
 231 {
 232         int error;
 233
 234         error = handshake(ehci, ptr, mask, done, usec);
 235         if (error) {
 236                 ehci_halt(ehci);
 237                 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 238                 ehci_err(ehci, "force halt; handshake %p %08x %08x -> %d\n",
 239                         ptr, mask, done, error);
 240         }
 241
 242         return error;
 243 }
 244
 245 /* put TDI/ARC silicon into EHCI mode */
 246 static void tdi_reset (struct ehci_hcd *ehci)
 247 {
 248         u32 __iomem     *reg_ptr;
 249         u32             tmp;
 250
 251         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 252         tmp = ehci_readl(ehci, reg_ptr);
 253         tmp |= USBMODE_CM_HC;
 254         /* The default byte access to MMR space is LE after
 255          * controller reset. Set the required endian mode
 256          * for transfer buffers to match the host microprocessor
 257          */
 258         if (ehci_big_endian_mmio(ehci))
 259                 tmp |= USBMODE_BE;
 260         ehci_writel(ehci, tmp, reg_ptr);
 261 }
 262
 263 /* reset a non-running (STS_HALT == 1) controller */
 264 static int ehci_reset (struct ehci_hcd *ehci)
 265 {
 266         int     retval;
 267         u32     command = ehci_readl(ehci, &ehci->regs->command);
 268
 269         /* If the EHCI debug controller is active, special care must be
 270          * taken before and after a host controller reset */
 271         if (ehci->debug && !dbgp_reset_prep())
 272                 ehci->debug = NULL;
 273
 274         command |= CMD_RESET;
 275         dbg_cmd (ehci, "reset", command);
 276         ehci_writel(ehci, command, &ehci->regs->command);
 277         ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 278         ehci->next_statechange = jiffies;
 279         retval = handshake (ehci, &ehci->regs->command,
 280                             CMD_RESET, 0, 250 * 1000);
 281
 282         if (ehci->has_hostpc) {
 283                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 284                         (u32 __iomem *)(((u8 *)ehci->regs) + USBMODE_EX));
 285                 ehci_writel(ehci, TXFIFO_DEFAULT,
 286                         (u32 __iomem *)(((u8 *)ehci->regs) + TXFILLTUNING));
 287         }
 288         if (retval)
 289                 return retval;
 290
 291         if (ehci_is_TDI(ehci))
 292                 tdi_reset (ehci);
 293
 294         if (ehci->debug)
 295                 dbgp_external_startup();
 296
 297         return retval;
 298 }
 299
 300 /* idle the controller (from running) */
 301 static void ehci_quiesce (struct ehci_hcd *ehci)
 302 {
 303         u32     temp;
 304
 305 #ifdef DEBUG
 306         if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
 307                 BUG ();
 308 #endif
 309
 310         /* wait for any schedule enables/disables to take effect */
 311         temp = ehci_readl(ehci, &ehci->regs->command) << 10;
 312         temp &= STS_ASS | STS_PSS;
 313         if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
 314                                         STS_ASS | STS_PSS, temp, 16 * 125))
 315                 return;
 316
 317         /* then disable anything that's still active */
 318         temp = ehci_readl(ehci, &ehci->regs->command);
 319         temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
 320         ehci_writel(ehci, temp, &ehci->regs->command);
 321
 322         /* hardware can take 16 microframes to turn off ... */
 323         handshake_on_error_set_halt(ehci, &ehci->regs->status,
 324                                     STS_ASS | STS_PSS, 0, 16 * 125);
 325 }
 326
 327 /*-------------------------------------------------------------------------*/
 328
 329 static void end_unlink_async(struct ehci_hcd *ehci);
 330 static void ehci_work(struct ehci_hcd *ehci);
 331
 332 #include "ehci-hub.c"
 333 #include "ehci-lpm.c"
 334 #include "ehci-mem.c"
 335 #include "ehci-q.c"
 336 #include "ehci-sched.c"
 337 #include "ehci-sysfs.c"
 338
 339 /*-------------------------------------------------------------------------*/
 340
 341 static void ehci_iaa_watchdog(unsigned long param)
 342 {
 343         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 344         unsigned long           flags;
 345
 346         spin_lock_irqsave (&ehci->lock, flags);
 347
 348         /* Lost IAA irqs wedge things badly; seen first with a vt8235.
 349          * So we need this watchdog, but must protect it against both
 350          * (a) SMP races against real IAA firing and retriggering, and
 351          * (b) clean HC shutdown, when IAA watchdog was pending.
 352          */
 353         if (ehci->reclaim
 354                         && !timer_pending(&ehci->iaa_watchdog)
 355                         && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
 356                 u32 cmd, status;
 357
 358                 /* If we get here, IAA is *REALLY* late.  It's barely
 359                  * conceivable that the system is so busy that CMD_IAAD
 360                  * is still legitimately set, so let's be sure it's
 361                  * clear before we read STS_IAA.  (The HC should clear
 362                  * CMD_IAAD when it sets STS_IAA.)
 363                  */
 364                 cmd = ehci_readl(ehci, &ehci->regs->command);
 365                 if (cmd & CMD_IAAD)
 366                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 367                                         &ehci->regs->command);
 368
 369                 /* If IAA is set here it either legitimately triggered
 370                  * before we cleared IAAD above (but _way_ late, so we'll
 371                  * still count it as lost) ... or a silicon erratum:
 372                  * - VIA seems to set IAA without triggering the IRQ;
 373                  * - IAAD potentially cleared without setting IAA.
 374                  */
 375                 status = ehci_readl(ehci, &ehci->regs->status);
 376                 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
 377                         COUNT (ehci->stats.lost_iaa);
 378                         ehci_writel(ehci, STS_IAA, &ehci->regs->status);
 379                 }
 380
 381                 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
 382                                 status, cmd);
 383                 end_unlink_async(ehci);
 384         }
 385
 386         spin_unlock_irqrestore(&ehci->lock, flags);
 387 }
 388
 389 static void ehci_watchdog(unsigned long param)
 390 {
 391         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 392         unsigned long           flags;
 393
 394         spin_lock_irqsave(&ehci->lock, flags);
 395
 396         /* stop async processing after it's idled a bit */
 397         if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
 398                 start_unlink_async (ehci, ehci->async);
 399
 400         /* ehci could run by timer, without IRQs ... */
 401         ehci_work (ehci);
 402
 403         spin_unlock_irqrestore (&ehci->lock, flags);
 404 }
 405
 406 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 407  * The firmware seems to think that powering off is a wakeup event!
 408  * This routine turns off remote wakeup and everything else, on all ports.
 409  */
 410 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 411 {
 412         int     port = HCS_N_PORTS(ehci->hcs_params);
 413
 414         while (port--)
 415                 ehci_writel(ehci, PORT_RWC_BITS,
 416                                 &ehci->regs->port_status[port]);
 417 }
 418
 419 /*
 420  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 421  * Should be called with ehci->lock held.
 422  */
 423 static void ehci_silence_controller(struct ehci_hcd *ehci)
 424 {
 425         ehci_halt(ehci);
 426         ehci_turn_off_all_ports(ehci);
 427
 428         /* make BIOS/etc use companion controller during reboot */
 429         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 430
 431         /* unblock posted writes */
 432         ehci_readl(ehci, &ehci->regs->configured_flag);
 433 }
 434
 435 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 436  * This forcibly disables dma and IRQs, helping kexec and other cases
 437  * where the next system software may expect clean state.
 438  */
 439 static void ehci_shutdown(struct usb_hcd *hcd)
 440 {
 441         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 442
 443         del_timer_sync(&ehci->watchdog);
 444         del_timer_sync(&ehci->iaa_watchdog);
 445
 446         spin_lock_irq(&ehci->lock);
 447         ehci_silence_controller(ehci);
 448         spin_unlock_irq(&ehci->lock);
 449 }
 450
 451 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
 452 {
 453         unsigned port;
 454
 455         if (!HCS_PPC (ehci->hcs_params))
 456                 return;
 457
 458         ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
 459         for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
 460                 (void) ehci_hub_control(ehci_to_hcd(ehci),
 461                                 is_on ? SetPortFeature : ClearPortFeature,
 462                                 USB_PORT_FEAT_POWER,
 463                                 port--, NULL, 0);
 464         /* Flush those writes */
 465         ehci_readl(ehci, &ehci->regs->command);
 466         msleep(20);
 467 }
 468
 469 /*-------------------------------------------------------------------------*/
 470
 471 /*
 472  * ehci_work is called from some interrupts, timers, and so on.
 473  * it calls driver completion functions, after dropping ehci->lock.
 474  */
 475 static void ehci_work (struct ehci_hcd *ehci)
 476 {
 477         timer_action_done (ehci, TIMER_IO_WATCHDOG);
 478
 479         /* another CPU may drop ehci->lock during a schedule scan while
 480          * it reports urb completions.  this flag guards against bogus
 481          * attempts at re-entrant schedule scanning.
 482          */
 483         if (ehci->scanning)
 484                 return;
 485         ehci->scanning = 1;
 486         scan_async (ehci);
 487         if (ehci->next_uframe != -1)
 488                 scan_periodic (ehci);
 489         ehci->scanning = 0;
 490
 491         /* the IO watchdog guards against hardware or driver bugs that
 492          * misplace IRQs, and should let us run completely without IRQs.
 493          * such lossage has been observed on both VT6202 and VT8235.
 494          */
 495         if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
 496                         (ehci->async->qh_next.ptr != NULL ||
 497                          ehci->periodic_sched != 0))
 498                 timer_action (ehci, TIMER_IO_WATCHDOG);
 499 }
 500
 501 /*
 502  * Called when the ehci_hcd module is removed.
 503  */
 504 static void ehci_stop (struct usb_hcd *hcd)
 505 {
 506         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 507
 508         ehci_dbg (ehci, "stop\n");
 509
 510         /* no more interrupts ... */
 511         del_timer_sync (&ehci->watchdog);
 512         del_timer_sync(&ehci->iaa_watchdog);
 513
 514         spin_lock_irq(&ehci->lock);
 515         if (HC_IS_RUNNING (hcd->state))
 516                 ehci_quiesce (ehci);
 517
 518         ehci_silence_controller(ehci);
 519         ehci_reset (ehci);
 520         spin_unlock_irq(&ehci->lock);
 521
 522         remove_sysfs_files(ehci);
 523         remove_debug_files (ehci);
 524
 525         /* root hub is shut down separately (first, when possible) */
 526         spin_lock_irq (&ehci->lock);
 527         if (ehci->async)
 528                 ehci_work (ehci);
 529         spin_unlock_irq (&ehci->lock);
 530         ehci_mem_cleanup (ehci);
 531
 532         if (ehci->amd_pll_fix == 1)
 533                 usb_amd_dev_put();
 534
 535 #ifdef  EHCI_STATS
 536         ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
 537                 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
 538                 ehci->stats.lost_iaa);
 539         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 540                 ehci->stats.complete, ehci->stats.unlink);
 541 #endif
 542
 543         dbg_status (ehci, "ehci_stop completed",
 544                     ehci_readl(ehci, &ehci->regs->status));
 545 }
 546
 547 /* one-time init, only for memory state */
 548 static int ehci_init(struct usb_hcd *hcd)
 549 {
 550         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 551         u32                     temp;
 552         int                     retval;
 553         u32                     hcc_params;
 554         struct ehci_qh_hw       *hw;
 555
 556         spin_lock_init(&ehci->lock);
 557
 558         /*
 559          * keep io watchdog by default, those good HCDs could turn off it later
 560          */
 561         ehci->need_io_watchdog = 1;
 562         init_timer(&ehci->watchdog);
 563         ehci->watchdog.function = ehci_watchdog;
 564         ehci->watchdog.data = (unsigned long) ehci;
 565
 566         init_timer(&ehci->iaa_watchdog);
 567         ehci->iaa_watchdog.function = ehci_iaa_watchdog;
 568         ehci->iaa_watchdog.data = (unsigned long) ehci;
 569
 570         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 571
 572         /*
 573          * by default set standard 80% (== 100 usec/uframe) max periodic
 574          * bandwidth as required by USB 2.0
 575          */
 576         ehci->uframe_periodic_max = 100;
 577
 578         /*
 579          * hw default: 1K periodic list heads, one per frame.
 580          * periodic_size can shrink by USBCMD update if hcc_params allows.
 581          */
 582         ehci->periodic_size = DEFAULT_I_TDPS;
 583         INIT_LIST_HEAD(&ehci->cached_itd_list);
 584         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 585
 586         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 587                 /* periodic schedule size can be smaller than default */
 588                 switch (EHCI_TUNE_FLS) {
 589                 case 0: ehci->periodic_size = 1024; break;
 590                 case 1: ehci->periodic_size = 512; break;
 591                 case 2: ehci->periodic_size = 256; break;
 592                 default:        BUG();
 593                 }
 594         }
 595         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 596                 return retval;
 597
 598         /* controllers may cache some of the periodic schedule ... */
 599         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 600                 ehci->i_thresh = 2 + 8;
 601         else                                    // N microframes cached
 602                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 603
 604         ehci->reclaim = NULL;
 605         ehci->next_uframe = -1;
 606         ehci->clock_frame = -1;
 607
 608         /*
 609          * dedicate a qh for the async ring head, since we couldn't unlink
 610          * a 'real' qh without stopping the async schedule [4.8].  use it
 611          * as the 'reclamation list head' too.
 612          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 613          * from automatically advancing to the next td after short reads.
 614          */
 615         ehci->async->qh_next.qh = NULL;
 616         hw = ehci->async->hw;
 617         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 618         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 619         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 620         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 621         ehci->async->qh_state = QH_STATE_LINKED;
 622         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 623
 624         /* clear interrupt enables, set irq latency */
 625         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 626                 log2_irq_thresh = 0;
 627         temp = 1 << (16 + log2_irq_thresh);
 628         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 629                 ehci->has_ppcd = 1;
 630                 ehci_dbg(ehci, "enable per-port change event\n");
 631                 temp |= CMD_PPCEE;
 632         }
 633         if (HCC_CANPARK(hcc_params)) {
 634                 /* HW default park == 3, on hardware that supports it (like
 635                  * NVidia and ALI silicon), maximizes throughput on the async
 636                  * schedule by avoiding QH fetches between transfers.
 637                  *
 638                  * With fast usb storage devices and NForce2, "park" seems to
 639                  * make problems:  throughput reduction (!), data errors...
 640                  */
 641                 if (park) {
 642                         park = min(park, (unsigned) 3);
 643                         temp |= CMD_PARK;
 644                         temp |= park << 8;
 645                 }
 646                 ehci_dbg(ehci, "park %d\n", park);
 647         }
 648         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 649                 /* periodic schedule size can be smaller than default */
 650                 temp &= ~(3 << 2);
 651                 temp |= (EHCI_TUNE_FLS << 2);
 652         }
 653         if (HCC_LPM(hcc_params)) {
 654                 /* support link power management EHCI 1.1 addendum */
 655                 ehci_dbg(ehci, "support lpm\n");
 656                 ehci->has_lpm = 1;
 657                 if (hird > 0xf) {
 658                         ehci_dbg(ehci, "hird %d invalid, use default 0",
 659                         hird);
 660                         hird = 0;
 661                 }
 662                 temp |= hird << 24;
 663         }
 664         ehci->command = temp;
 665
 666         /* Accept arbitrarily long scatter-gather lists */
 667         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 668                 hcd->self.sg_tablesize = ~0;
 669         return 0;
 670 }
 671
 672 /* start HC running; it's halted, ehci_init() has been run (once) */
 673 static int ehci_run (struct usb_hcd *hcd)
 674 {
 675         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 676         int                     retval;
 677         u32                     temp;
 678         u32                     hcc_params;
 679
 680         hcd->uses_new_polling = 1;
 681
 682         /* EHCI spec section 4.1 */
 683         /*
 684          * TDI driver does the ehci_reset in their reset callback.
 685          * Don't reset here, because configuration settings will
 686          * vanish.
 687          */
 688         if (!ehci_is_TDI(ehci) && (retval = ehci_reset(ehci)) != 0) {
 689                 ehci_mem_cleanup(ehci);
 690                 return retval;
 691         }
 692         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 693         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 694
 695         /*
 696          * hcc_params controls whether ehci->regs->segment must (!!!)
 697          * be used; it constrains QH/ITD/SITD and QTD locations.
 698          * pci_pool consistent memory always uses segment zero.
 699          * streaming mappings for I/O buffers, like pci_map_single(),
 700          * can return segments above 4GB, if the device allows.
 701          *
 702          * NOTE:  the dma mask is visible through dma_supported(), so
 703          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 704          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 705          * host side drivers though.
 706          */
 707         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 708         if (HCC_64BIT_ADDR(hcc_params)) {
 709                 ehci_writel(ehci, 0, &ehci->regs->segment);
 710 #if 0
 711 // this is deeply broken on almost all architectures
 712                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 713                         ehci_info(ehci, "enabled 64bit DMA\n");
 714 #endif
 715         }
 716
 717
 718         // Philips, Intel, and maybe others need CMD_RUN before the
 719         // root hub will detect new devices (why?); NEC doesn't
 720         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 721         ehci->command |= CMD_RUN;
 722         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 723         dbg_cmd (ehci, "init", ehci->command);
 724
 725         /*
 726          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 727          * are explicitly handed to companion controller(s), so no TT is
 728          * involved with the root hub.  (Except where one is integrated,
 729          * and there's no companion controller unless maybe for USB OTG.)
 730          *
 731          * Turning on the CF flag will transfer ownership of all ports
 732          * from the companions to the EHCI controller.  If any of the
 733          * companions are in the middle of a port reset at the time, it
 734          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 735          * guarantees that no resets are in progress.  After we set CF,
 736          * a short delay lets the hardware catch up; new resets shouldn't
 737          * be started before the port switching actions could complete.
 738          */
 739         down_write(&ehci_cf_port_reset_rwsem);
 740         hcd->state = HC_STATE_RUNNING;
 741         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 742         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 743         msleep(5);
 744         up_write(&ehci_cf_port_reset_rwsem);
 745         ehci->last_periodic_enable = ktime_get_real();
 746
 747         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 748         ehci_info (ehci,
 749                 "USB %x.%x started, EHCI %x.%02x%s\n",
 750                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 751                 temp >> 8, temp & 0xff,
 752                 ignore_oc ? ", overcurrent ignored" : "");
 753
 754         ehci_writel(ehci, INTR_MASK,
 755                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 756
 757         /* GRR this is run-once init(), being done every time the HC starts.
 758          * So long as they're part of class devices, we can't do it init()
 759          * since the class device isn't created that early.
 760          */
 761         create_debug_files(ehci);
 762         create_sysfs_files(ehci);
 763
 764         return 0;
 765 }
 766
 767 /*-------------------------------------------------------------------------*/
 768
 769 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 770 {
 771         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 772         u32                     status, masked_status, pcd_status = 0, cmd;
 773         int                     bh;
 774
 775         spin_lock (&ehci->lock);
 776
 777         status = ehci_readl(ehci, &ehci->regs->status);
 778
 779         /* e.g. cardbus physical eject */
 780         if (status == ~(u32) 0) {
 781                 ehci_dbg (ehci, "device removed\n");
 782                 goto dead;
 783         }
 784
 785         /* Shared IRQ? */
 786         masked_status = status & INTR_MASK;
 787         if (!masked_status || unlikely(hcd->state == HC_STATE_HALT)) {
 788                 spin_unlock(&ehci->lock);
 789                 return IRQ_NONE;
 790         }
 791
 792         /* clear (just) interrupts */
 793         ehci_writel(ehci, masked_status, &ehci->regs->status);
 794         cmd = ehci_readl(ehci, &ehci->regs->command);
 795         bh = 0;
 796
 797 #ifdef  VERBOSE_DEBUG
 798         /* unrequested/ignored: Frame List Rollover */
 799         dbg_status (ehci, "irq", status);
 800 #endif
 801
 802         /* INT, ERR, and IAA interrupt rates can be throttled */
 803
 804         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 805         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 806                 if (likely ((status & STS_ERR) == 0))
 807                         COUNT (ehci->stats.normal);
 808                 else
 809                         COUNT (ehci->stats.error);
 810                 bh = 1;
 811         }
 812
 813         /* complete the unlinking of some qh [4.15.2.3] */
 814         if (status & STS_IAA) {
 815                 /* guard against (alleged) silicon errata */
 816                 if (cmd & CMD_IAAD) {
 817                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 818                                         &ehci->regs->command);
 819                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 820                 }
 821                 if (ehci->reclaim) {
 822                         COUNT(ehci->stats.reclaim);
 823                         end_unlink_async(ehci);
 824                 } else
 825                         ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
 826         }
 827
 828         /* remote wakeup [4.3.1] */
 829         if (status & STS_PCD) {
 830                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 831                 u32             ppcd = 0;
 832
 833                 /* kick root hub later */
 834                 pcd_status = status;
 835
 836                 /* resume root hub? */
 837                 if (!(cmd & CMD_RUN))
 838                         usb_hcd_resume_root_hub(hcd);
 839
 840                 /* get per-port change detect bits */
 841                 if (ehci->has_ppcd)
 842                         ppcd = status >> 16;
 843
 844                 while (i--) {
 845                         int pstatus;
 846
 847                         /* leverage per-port change bits feature */
 848                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
 849                                 continue;
 850                         pstatus = ehci_readl(ehci,
 851                                          &ehci->regs->port_status[i]);
 852
 853                         if (pstatus & PORT_OWNER)
 854                                 continue;
 855                         if (!(test_bit(i, &ehci->suspended_ports) &&
 856                                         ((pstatus & PORT_RESUME) ||
 857                                                 !(pstatus & PORT_SUSPEND)) &&
 858                                         (pstatus & PORT_PE) &&
 859                                         ehci->reset_done[i] == 0))
 860                                 continue;
 861
 862                         /* start 20 msec resume signaling from this port,
 863                          * and make khubd collect PORT_STAT_C_SUSPEND to
 864                          * stop that signaling.  Use 5 ms extra for safety,
 865                          * like usb_port_resume() does.
 866                          */
 867                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 868                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 869                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 870                 }
 871         }
 872
 873         /* PCI errors [4.15.2.4] */
 874         if (unlikely ((status & STS_FATAL) != 0)) {
 875                 ehci_err(ehci, "fatal error\n");
 876                 dbg_cmd(ehci, "fatal", cmd);
 877                 dbg_status(ehci, "fatal", status);
 878                 ehci_halt(ehci);
 879 dead:
 880                 ehci_reset(ehci);
 881                 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 882                 usb_hc_died(hcd);
 883                 /* generic layer kills/unlinks all urbs, then
 884                  * uses ehci_stop to clean up the rest
 885                  */
 886                 bh = 1;
 887         }
 888
 889         if (bh)
 890                 ehci_work (ehci);
 891         spin_unlock (&ehci->lock);
 892         if (pcd_status)
 893                 usb_hcd_poll_rh_status(hcd);
 894         return IRQ_HANDLED;
 895 }
 896
 897 /*-------------------------------------------------------------------------*/
 898
 899 /*
 900  * non-error returns are a promise to giveback() the urb later
 901  * we drop ownership so next owner (or urb unlink) can get it
 902  *
 903  * urb + dev is in hcd.self.controller.urb_list
 904  * we're queueing TDs onto software and hardware lists
 905  *
 906  * hcd-specific init for hcpriv hasn't been done yet
 907  *
 908  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 909  * to a (possibly active) QH, and the same QH scanning code.
 910  */
 911 static int ehci_urb_enqueue (
 912         struct usb_hcd  *hcd,
 913         struct urb      *urb,
 914         gfp_t           mem_flags
 915 ) {
 916         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 917         struct list_head        qtd_list;
 918
 919         INIT_LIST_HEAD (&qtd_list);
 920
 921         switch (usb_pipetype (urb->pipe)) {
 922         case PIPE_CONTROL:
 923                 /* qh_completions() code doesn't handle all the fault cases
 924                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 925                  */
 926                 if (urb->transfer_buffer_length > (16 * 1024))
 927                         return -EMSGSIZE;
 928                 /* FALLTHROUGH */
 929         /* case PIPE_BULK: */
 930         default:
 931                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 932                         return -ENOMEM;
 933                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 934
 935         case PIPE_INTERRUPT:
 936                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 937                         return -ENOMEM;
 938                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 939
 940         case PIPE_ISOCHRONOUS:
 941                 if (urb->dev->speed == USB_SPEED_HIGH)
 942                         return itd_submit (ehci, urb, mem_flags);
 943                 else
 944                         return sitd_submit (ehci, urb, mem_flags);
 945         }
 946 }
 947
 948 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 949 {
 950         /* failfast */
 951         if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
 952                 end_unlink_async(ehci);
 953
 954         /* If the QH isn't linked then there's nothing we can do
 955          * unless we were called during a giveback, in which case
 956          * qh_completions() has to deal with it.
 957          */
 958         if (qh->qh_state != QH_STATE_LINKED) {
 959                 if (qh->qh_state == QH_STATE_COMPLETING)
 960                         qh->needs_rescan = 1;
 961                 return;
 962         }
 963
 964         /* defer till later if busy */
 965         if (ehci->reclaim) {
 966                 struct ehci_qh          *last;
 967
 968                 for (last = ehci->reclaim;
 969                                 last->reclaim;
 970                                 last = last->reclaim)
 971                         continue;
 972                 qh->qh_state = QH_STATE_UNLINK_WAIT;
 973                 last->reclaim = qh;
 974
 975         /* start IAA cycle */
 976         } else
 977                 start_unlink_async (ehci, qh);
 978 }
 979
 980 /* remove from hardware lists
 981  * completions normally happen asynchronously
 982  */
 983
 984 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 985 {
 986         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 987         struct ehci_qh          *qh;
 988         unsigned long           flags;
 989         int                     rc;
 990
 991         spin_lock_irqsave (&ehci->lock, flags);
 992         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 993         if (rc)
 994                 goto done;
 995
 996         switch (usb_pipetype (urb->pipe)) {
 997         // case PIPE_CONTROL:
 998         // case PIPE_BULK:
 999         default:
1000                 qh = (struct ehci_qh *) urb->hcpriv;
1001                 if (!qh)
1002                         break;
1003                 switch (qh->qh_state) {
1004                 case QH_STATE_LINKED:
1005                 case QH_STATE_COMPLETING:
1006                         unlink_async(ehci, qh);
1007                         break;
1008                 case QH_STATE_UNLINK:
1009                 case QH_STATE_UNLINK_WAIT:
1010                         /* already started */
1011                         break;
1012                 case QH_STATE_IDLE:
1013                         /* QH might be waiting for a Clear-TT-Buffer */
1014                         qh_completions(ehci, qh);
1015                         break;
1016                 }
1017                 break;
1018
1019         case PIPE_INTERRUPT:
1020                 qh = (struct ehci_qh *) urb->hcpriv;
1021                 if (!qh)
1022                         break;
1023                 switch (qh->qh_state) {
1024                 case QH_STATE_LINKED:
1025                 case QH_STATE_COMPLETING:
1026                         intr_deschedule (ehci, qh);
1027                         break;
1028                 case QH_STATE_IDLE:
1029                         qh_completions (ehci, qh);
1030                         break;
1031                 default:
1032                         ehci_dbg (ehci, "bogus qh %p state %d\n",
1033                                         qh, qh->qh_state);
1034                         goto done;
1035                 }
1036                 break;
1037
1038         case PIPE_ISOCHRONOUS:
1039                 // itd or sitd ...
1040
1041                 // wait till next completion, do it then.
1042                 // completion irqs can wait up to 1024 msec,
1043                 break;
1044         }
1045 done:
1046         spin_unlock_irqrestore (&ehci->lock, flags);
1047         return rc;
1048 }
1049
1050 /*-------------------------------------------------------------------------*/
1051
1052 // bulk qh holds the data toggle
1053
1054 static void
1055 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1056 {
1057         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1058         unsigned long           flags;
1059         struct ehci_qh          *qh, *tmp;
1060
1061         /* ASSERT:  any requests/urbs are being unlinked */
1062         /* ASSERT:  nobody can be submitting urbs for this any more */
1063
1064 rescan:
1065         spin_lock_irqsave (&ehci->lock, flags);
1066         qh = ep->hcpriv;
1067         if (!qh)
1068                 goto done;
1069
1070         /* endpoints can be iso streams.  for now, we don't
1071          * accelerate iso completions ... so spin a while.
1072          */
1073         if (qh->hw == NULL) {
1074                 ehci_vdbg (ehci, "iso delay\n");
1075                 goto idle_timeout;
1076         }
1077
1078         if (!HC_IS_RUNNING (hcd->state))
1079                 qh->qh_state = QH_STATE_IDLE;
1080         switch (qh->qh_state) {
1081         case QH_STATE_LINKED:
1082         case QH_STATE_COMPLETING:
1083                 for (tmp = ehci->async->qh_next.qh;
1084                                 tmp && tmp != qh;
1085                                 tmp = tmp->qh_next.qh)
1086                         continue;
1087                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
1088                  * may already be unlinked.
1089                  */
1090                 if (tmp)
1091                         unlink_async(ehci, qh);
1092                 /* FALL THROUGH */
1093         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1094         case QH_STATE_UNLINK_WAIT:
1095 idle_timeout:
1096                 spin_unlock_irqrestore (&ehci->lock, flags);
1097                 schedule_timeout_uninterruptible(1);
1098                 goto rescan;
1099         case QH_STATE_IDLE:             /* fully unlinked */
1100                 if (qh->clearing_tt)
1101                         goto idle_timeout;
1102                 if (list_empty (&qh->qtd_list)) {
1103                         qh_put (qh);
1104                         break;
1105                 }
1106                 /* else FALL THROUGH */
1107         default:
1108                 /* caller was supposed to have unlinked any requests;
1109                  * that's not our job.  just leak this memory.
1110                  */
1111                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1112                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1113                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1114                 break;
1115         }
1116         ep->hcpriv = NULL;
1117 done:
1118         spin_unlock_irqrestore (&ehci->lock, flags);
1119 }
1120
1121 static void
1122 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1123 {
1124         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1125         struct ehci_qh          *qh;
1126         int                     eptype = usb_endpoint_type(&ep->desc);
1127         int                     epnum = usb_endpoint_num(&ep->desc);
1128         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1129         unsigned long           flags;
1130
1131         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1132                 return;
1133
1134         spin_lock_irqsave(&ehci->lock, flags);
1135         qh = ep->hcpriv;
1136
1137         /* For Bulk and Interrupt endpoints we maintain the toggle state
1138          * in the hardware; the toggle bits in udev aren't used at all.
1139          * When an endpoint is reset by usb_clear_halt() we must reset
1140          * the toggle bit in the QH.
1141          */
1142         if (qh) {
1143                 usb_settoggle(qh->dev, epnum, is_out, 0);
1144                 if (!list_empty(&qh->qtd_list)) {
1145                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1146                 } else if (qh->qh_state == QH_STATE_LINKED ||
1147                                 qh->qh_state == QH_STATE_COMPLETING) {
1148
1149                         /* The toggle value in the QH can't be updated
1150                          * while the QH is active.  Unlink it now;
1151                          * re-linking will call qh_refresh().
1152                          */
1153                         if (eptype == USB_ENDPOINT_XFER_BULK)
1154                                 unlink_async(ehci, qh);
1155                         else
1156                                 intr_deschedule(ehci, qh);
1157                 }
1158         }
1159         spin_unlock_irqrestore(&ehci->lock, flags);
1160 }
1161
1162 static int ehci_get_frame (struct usb_hcd *hcd)
1163 {
1164         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1165         return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
1166                 ehci->periodic_size;
1167 }
1168
1169 /*-------------------------------------------------------------------------*/
1170
1171 MODULE_DESCRIPTION(DRIVER_DESC);
1172 MODULE_AUTHOR (DRIVER_AUTHOR);
1173 MODULE_LICENSE ("GPL");
1174
1175 #ifdef CONFIG_PCI
1176 #include "ehci-pci.c"
1177 #define PCI_DRIVER              ehci_pci_driver
1178 #endif
1179
1180 #ifdef CONFIG_USB_EHCI_FSL
1181 #include "ehci-fsl.c"
1182 #define PLATFORM_DRIVER         ehci_fsl_driver
1183 #endif
1184
1185 #ifdef CONFIG_USB_EHCI_MXC
1186 #include "ehci-mxc.c"
1187 #define PLATFORM_DRIVER         ehci_mxc_driver
1188 #endif
1189
1190 #ifdef CONFIG_USB_EHCI_SH
1191 #include "ehci-sh.c"
1192 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1193 #endif
1194
1195 #ifdef CONFIG_SOC_AU1200
1196 #include "ehci-au1xxx.c"
1197 #define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1198 #endif
1199
1200 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1201 #include "ehci-omap.c"
1202 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1203 #endif
1204
1205 #ifdef CONFIG_PPC_PS3
1206 #include "ehci-ps3.c"
1207 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1208 #endif
1209
1210 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1211 #include "ehci-ppc-of.c"
1212 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1213 #endif
1214
1215 #ifdef CONFIG_XPS_USB_HCD_XILINX
1216 #include "ehci-xilinx-of.c"
1217 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1218 #endif
1219
1220 #ifdef CONFIG_PLAT_ORION
1221 #include "ehci-orion.c"
1222 #define PLATFORM_DRIVER         ehci_orion_driver
1223 #endif
1224
1225 #ifdef CONFIG_ARCH_IXP4XX
1226 #include "ehci-ixp4xx.c"
1227 #define PLATFORM_DRIVER         ixp4xx_ehci_driver
1228 #endif
1229
1230 #ifdef CONFIG_USB_W90X900_EHCI
1231 #include "ehci-w90x900.c"
1232 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1233 #endif
1234
1235 #ifdef CONFIG_ARCH_AT91
1236 #include "ehci-atmel.c"
1237 #define PLATFORM_DRIVER         ehci_atmel_driver
1238 #endif
1239
1240 #ifdef CONFIG_USB_OCTEON_EHCI
1241 #include "ehci-octeon.c"
1242 #define PLATFORM_DRIVER         ehci_octeon_driver
1243 #endif
1244
1245 #ifdef CONFIG_USB_CNS3XXX_EHCI
1246 #include "ehci-cns3xxx.c"
1247 #define PLATFORM_DRIVER         cns3xxx_ehci_driver
1248 #endif
1249
1250 #ifdef CONFIG_ARCH_VT8500
1251 #include "ehci-vt8500.c"
1252 #define PLATFORM_DRIVER         vt8500_ehci_driver
1253 #endif
1254
1255 #ifdef CONFIG_PLAT_SPEAR
1256 #include "ehci-spear.c"
1257 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1258 #endif
1259
1260 #ifdef CONFIG_USB_EHCI_MSM
1261 #include "ehci-msm.c"
1262 #define PLATFORM_DRIVER         ehci_msm_driver
1263 #endif
1264
1265 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1266 #include "ehci-pmcmsp.c"
1267 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1268 #endif
1269
1270 #ifdef CONFIG_USB_EHCI_TEGRA
1271 #include "ehci-tegra.c"
1272 #define PLATFORM_DRIVER         tegra_ehci_driver
1273 #endif
1274
1275 #ifdef CONFIG_USB_EHCI_S5P
1276 #include "ehci-s5p.c"
1277 #define PLATFORM_DRIVER         s5p_ehci_driver
1278 #endif
1279
1280 #ifdef CONFIG_USB_EHCI_ATH79
1281 #include "ehci-ath79.c"
1282 #define PLATFORM_DRIVER         ehci_ath79_driver
1283 #endif
1284
1285 #ifdef CONFIG_SPARC_LEON
1286 #include "ehci-grlib.c"
1287 #define PLATFORM_DRIVER         ehci_grlib_driver
1288 #endif
1289
1290 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1291     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1292     !defined(XILINX_OF_PLATFORM_DRIVER)
1293 #error "missing bus glue for ehci-hcd"
1294 #endif
1295
1296 static int __init ehci_hcd_init(void)
1297 {
1298         int retval = 0;
1299
1300         if (usb_disabled())
1301                 return -ENODEV;
1302
1303         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1304         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1305         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1306                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1307                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1308                                 " before uhci_hcd and ohci_hcd, not after\n");
1309
1310         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1311                  hcd_name,
1312                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1313                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1314
1315 #ifdef DEBUG
1316         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1317         if (!ehci_debug_root) {
1318                 retval = -ENOENT;
1319                 goto err_debug;
1320         }
1321 #endif
1322
1323 #ifdef PLATFORM_DRIVER
1324         retval = platform_driver_register(&PLATFORM_DRIVER);
1325         if (retval < 0)
1326                 goto clean0;
1327 #endif
1328
1329 #ifdef PCI_DRIVER
1330         retval = pci_register_driver(&PCI_DRIVER);
1331         if (retval < 0)
1332                 goto clean1;
1333 #endif
1334
1335 #ifdef PS3_SYSTEM_BUS_DRIVER
1336         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1337         if (retval < 0)
1338                 goto clean2;
1339 #endif
1340
1341 #ifdef OF_PLATFORM_DRIVER
1342         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1343         if (retval < 0)
1344                 goto clean3;
1345 #endif
1346
1347 #ifdef XILINX_OF_PLATFORM_DRIVER
1348         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1349         if (retval < 0)
1350                 goto clean4;
1351 #endif
1352         return retval;
1353
1354 #ifdef XILINX_OF_PLATFORM_DRIVER
1355         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1356 clean4:
1357 #endif
1358 #ifdef OF_PLATFORM_DRIVER
1359         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1360 clean3:
1361 #endif
1362 #ifdef PS3_SYSTEM_BUS_DRIVER
1363         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1364 clean2:
1365 #endif
1366 #ifdef PCI_DRIVER
1367         pci_unregister_driver(&PCI_DRIVER);
1368 clean1:
1369 #endif
1370 #ifdef PLATFORM_DRIVER
1371         platform_driver_unregister(&PLATFORM_DRIVER);
1372 clean0:
1373 #endif
1374 #ifdef DEBUG
1375         debugfs_remove(ehci_debug_root);
1376         ehci_debug_root = NULL;
1377 err_debug:
1378 #endif
1379         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1380         return retval;
1381 }
1382 module_init(ehci_hcd_init);
1383
1384 static void __exit ehci_hcd_cleanup(void)
1385 {
1386 #ifdef XILINX_OF_PLATFORM_DRIVER
1387         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1388 #endif
1389 #ifdef OF_PLATFORM_DRIVER
1390         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1391 #endif
1392 #ifdef PLATFORM_DRIVER
1393         platform_driver_unregister(&PLATFORM_DRIVER);
1394 #endif
1395 #ifdef PCI_DRIVER
1396         pci_unregister_driver(&PCI_DRIVER);
1397 #endif
1398 #ifdef PS3_SYSTEM_BUS_DRIVER
1399         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1400 #endif
1401 #ifdef DEBUG
1402         debugfs_remove(ehci_debug_root);
1403 #endif
1404         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1405 }
1406 module_exit(ehci_hcd_cleanup);
1407