2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
9 * based off of the old drivers/char/sh-sci.c by:
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
52 #include <asm/clock.h>
53 #include <asm/sh_bios.h>
60 struct uart_port port;
65 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
66 unsigned int irqs[SCIx_NR_IRQS];
68 /* Port pin configuration */
69 void (*init_pins)(struct uart_port *port,
72 /* Port enable callback */
73 void (*enable)(struct uart_port *port);
75 /* Port disable callback */
76 void (*disable)(struct uart_port *port);
79 struct timer_list break_timer;
82 #ifdef CONFIG_HAVE_CLK
89 static struct sci_port *kgdb_sci_port;
92 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
93 static struct sci_port *serial_console_port;
96 /* Function prototypes */
97 static void sci_stop_tx(struct uart_port *port);
99 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
101 static struct sci_port sci_ports[SCI_NPORTS];
102 static struct uart_driver sci_uart_driver;
104 static inline struct sci_port *
105 to_sci_port(struct uart_port *uart)
107 return container_of(uart, struct sci_port, port);
110 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
111 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
112 static inline void handle_error(struct uart_port *port)
114 /* Clear error flags */
115 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
118 static int get_char(struct uart_port *port)
121 unsigned short status;
124 spin_lock_irqsave(&port->lock, flags);
126 status = sci_in(port, SCxSR);
127 if (status & SCxSR_ERRORS(port)) {
131 } while (!(status & SCxSR_RDxF(port)));
132 c = sci_in(port, SCxRDR);
135 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
136 spin_unlock_irqrestore(&port->lock, flags);
140 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
142 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
143 static void put_char(struct uart_port *port, char c)
146 unsigned short status;
148 spin_lock_irqsave(&port->lock, flags);
151 status = sci_in(port, SCxSR);
152 } while (!(status & SCxSR_TDxE(port)));
154 sci_in(port, SCxSR); /* Dummy read */
155 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
156 sci_out(port, SCxTDR, c);
158 spin_unlock_irqrestore(&port->lock, flags);
162 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
163 static void put_string(struct sci_port *sci_port, const char *buffer, int count)
165 struct uart_port *port = &sci_port->port;
166 const unsigned char *p = buffer;
169 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
173 #ifdef CONFIG_SH_STANDARD_BIOS
174 /* This call only does a trap the first time it is
175 * called, and so is safe to do here unconditionally
177 usegdb |= sh_bios_in_gdb_mode();
179 #ifdef CONFIG_SH_KGDB
180 usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
184 /* $<packet info>#<checksum>. */
188 put_char(port, 'O'); /* 'O'utput to console */
191 /* Don't use run length encoding */
192 for (i = 0; i < count; i++) {
203 put_char(port, hex_asc_hi(checksum));
204 put_char(port, hex_asc_lo(checksum));
205 } while (get_char(port) != '+');
207 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
208 for (i = 0; i < count; i++) {
210 put_char(port, '\r');
211 put_char(port, *p++);
214 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
216 #ifdef CONFIG_SH_KGDB
217 static int kgdb_sci_getchar(void)
221 /* Keep trying to read a character, this could be neater */
222 while ((c = get_char(&kgdb_sci_port->port)) < 0)
228 static inline void kgdb_sci_putchar(int c)
230 put_char(&kgdb_sci_port->port, c);
232 #endif /* CONFIG_SH_KGDB */
234 #if defined(__H8300S__)
235 enum { sci_disable, sci_enable };
237 static void h8300_sci_config(struct uart_port *port, unsigned int ctrl)
239 volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL;
240 int ch = (port->mapbase - SMR0) >> 3;
241 unsigned char mask = 1 << (ch+1);
243 if (ctrl == sci_disable)
249 static inline void h8300_sci_enable(struct uart_port *port)
251 h8300_sci_config(port, sci_enable);
254 static inline void h8300_sci_disable(struct uart_port *port)
256 h8300_sci_config(port, sci_disable);
260 #if defined(__H8300H__) || defined(__H8300S__)
261 static void sci_init_pins_sci(struct uart_port *port, unsigned int cflag)
263 int ch = (port->mapbase - SMR0) >> 3;
266 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
267 h8300_sci_pins[ch].rx,
269 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
270 h8300_sci_pins[ch].tx,
274 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
277 #define sci_init_pins_sci NULL
280 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
281 static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
283 unsigned int fcr_val = 0;
286 fcr_val |= SCFCR_MCE;
288 sci_out(port, SCFCR, fcr_val);
291 #define sci_init_pins_irda NULL
294 #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
295 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
297 unsigned int fcr_val = 0;
299 set_sh771x_scif_pfc(port);
301 fcr_val |= SCFCR_MCE;
302 sci_out(port, SCFCR, fcr_val);
304 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
305 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
307 unsigned int fcr_val = 0;
310 if (cflag & CRTSCTS) {
312 if (port->mapbase == 0xa4430000) { /* SCIF0 */
313 /* Clear PTCR bit 9-2; enable all scif pins but sck */
314 data = ctrl_inw(PORT_PTCR);
315 ctrl_outw((data & 0xfc03), PORT_PTCR);
316 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
317 /* Clear PVCR bit 9-2 */
318 data = ctrl_inw(PORT_PVCR);
319 ctrl_outw((data & 0xfc03), PORT_PVCR);
321 fcr_val |= SCFCR_MCE;
323 if (port->mapbase == 0xa4430000) { /* SCIF0 */
324 /* Clear PTCR bit 5-2; enable only tx and rx */
325 data = ctrl_inw(PORT_PTCR);
326 ctrl_outw((data & 0xffc3), PORT_PTCR);
327 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
328 /* Clear PVCR bit 5-2 */
329 data = ctrl_inw(PORT_PVCR);
330 ctrl_outw((data & 0xffc3), PORT_PVCR);
333 sci_out(port, SCFCR, fcr_val);
335 #elif defined(CONFIG_CPU_SH3)
336 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
337 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
339 unsigned int fcr_val = 0;
342 /* We need to set SCPCR to enable RTS/CTS */
343 data = ctrl_inw(SCPCR);
344 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
345 ctrl_outw(data & 0x0fcf, SCPCR);
348 fcr_val |= SCFCR_MCE;
350 /* We need to set SCPCR to enable RTS/CTS */
351 data = ctrl_inw(SCPCR);
352 /* Clear out SCP7MD1,0, SCP4MD1,0,
353 Set SCP6MD1,0 = {01} (output) */
354 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
356 data = ctrl_inb(SCPDR);
357 /* Set /RTS2 (bit6) = 0 */
358 ctrl_outb(data & 0xbf, SCPDR);
361 sci_out(port, SCFCR, fcr_val);
363 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
364 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
366 unsigned int fcr_val = 0;
369 if (port->mapbase == 0xffe00000) {
370 data = ctrl_inw(PSCR);
373 fcr_val |= SCFCR_MCE;
377 ctrl_outw(data, PSCR);
379 /* SCIF1 and SCIF2 should be setup by board code */
381 sci_out(port, SCFCR, fcr_val);
383 #elif defined(CONFIG_CPU_SUBTYPE_SH7723)
384 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
386 /* Nothing to do here.. */
387 sci_out(port, SCFCR, 0);
391 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
393 unsigned int fcr_val = 0;
395 if (cflag & CRTSCTS) {
396 fcr_val |= SCFCR_MCE;
398 #if defined(CONFIG_CPU_SUBTYPE_SH7343) || defined(CONFIG_CPU_SUBTYPE_SH7366)
400 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
401 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
402 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
403 defined(CONFIG_CPU_SUBTYPE_SHX3)
404 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
406 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
409 sci_out(port, SCFCR, fcr_val);
413 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
414 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
415 defined(CONFIG_CPU_SUBTYPE_SH7785)
416 static inline int scif_txroom(struct uart_port *port)
418 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
421 static inline int scif_rxroom(struct uart_port *port)
423 return sci_in(port, SCRFDR) & 0xff;
425 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
426 static inline int scif_txroom(struct uart_port *port)
428 if ((port->mapbase == 0xffe00000) ||
429 (port->mapbase == 0xffe08000)) {
431 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
434 return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
438 static inline int scif_rxroom(struct uart_port *port)
440 if ((port->mapbase == 0xffe00000) ||
441 (port->mapbase == 0xffe08000)) {
443 return sci_in(port, SCRFDR) & 0xff;
446 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
450 static inline int scif_txroom(struct uart_port *port)
452 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
455 static inline int scif_rxroom(struct uart_port *port)
457 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
461 static inline int sci_txroom(struct uart_port *port)
463 return (sci_in(port, SCxSR) & SCI_TDRE) != 0;
466 static inline int sci_rxroom(struct uart_port *port)
468 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
471 /* ********************************************************************** *
472 * the interrupt related routines *
473 * ********************************************************************** */
475 static void sci_transmit_chars(struct uart_port *port)
477 struct circ_buf *xmit = &port->info->xmit;
478 unsigned int stopped = uart_tx_stopped(port);
479 unsigned short status;
483 status = sci_in(port, SCxSR);
484 if (!(status & SCxSR_TDxE(port))) {
485 ctrl = sci_in(port, SCSCR);
486 if (uart_circ_empty(xmit))
487 ctrl &= ~SCI_CTRL_FLAGS_TIE;
489 ctrl |= SCI_CTRL_FLAGS_TIE;
490 sci_out(port, SCSCR, ctrl);
494 if (port->type == PORT_SCI)
495 count = sci_txroom(port);
497 count = scif_txroom(port);
505 } else if (!uart_circ_empty(xmit) && !stopped) {
506 c = xmit->buf[xmit->tail];
507 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
512 sci_out(port, SCxTDR, c);
515 } while (--count > 0);
517 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
519 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
520 uart_write_wakeup(port);
521 if (uart_circ_empty(xmit)) {
524 ctrl = sci_in(port, SCSCR);
526 if (port->type != PORT_SCI) {
527 sci_in(port, SCxSR); /* Dummy read */
528 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
531 ctrl |= SCI_CTRL_FLAGS_TIE;
532 sci_out(port, SCSCR, ctrl);
536 /* On SH3, SCIF may read end-of-break as a space->mark char */
537 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
539 static inline void sci_receive_chars(struct uart_port *port)
541 struct sci_port *sci_port = to_sci_port(port);
542 struct tty_struct *tty = port->info->port.tty;
543 int i, count, copied = 0;
544 unsigned short status;
547 status = sci_in(port, SCxSR);
548 if (!(status & SCxSR_RDxF(port)))
552 if (port->type == PORT_SCI)
553 count = sci_rxroom(port);
555 count = scif_rxroom(port);
557 /* Don't copy more bytes than there is room for in the buffer */
558 count = tty_buffer_request_room(tty, count);
560 /* If for any reason we can't copy more data, we're done! */
564 if (port->type == PORT_SCI) {
565 char c = sci_in(port, SCxRDR);
566 if (uart_handle_sysrq_char(port, c) ||
567 sci_port->break_flag)
570 tty_insert_flip_char(tty, c, TTY_NORMAL);
572 for (i = 0; i < count; i++) {
573 char c = sci_in(port, SCxRDR);
574 status = sci_in(port, SCxSR);
575 #if defined(CONFIG_CPU_SH3)
576 /* Skip "chars" during break */
577 if (sci_port->break_flag) {
579 (status & SCxSR_FER(port))) {
584 /* Nonzero => end-of-break */
585 pr_debug("scif: debounce<%02x>\n", c);
586 sci_port->break_flag = 0;
593 #endif /* CONFIG_CPU_SH3 */
594 if (uart_handle_sysrq_char(port, c)) {
599 /* Store data and status */
600 if (status&SCxSR_FER(port)) {
602 pr_debug("sci: frame error\n");
603 } else if (status&SCxSR_PER(port)) {
605 pr_debug("sci: parity error\n");
608 tty_insert_flip_char(tty, c, flag);
612 sci_in(port, SCxSR); /* dummy read */
613 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
616 port->icount.rx += count;
620 /* Tell the rest of the system the news. New characters! */
621 tty_flip_buffer_push(tty);
623 sci_in(port, SCxSR); /* dummy read */
624 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
628 #define SCI_BREAK_JIFFIES (HZ/20)
629 /* The sci generates interrupts during the break,
630 * 1 per millisecond or so during the break period, for 9600 baud.
631 * So dont bother disabling interrupts.
632 * But dont want more than 1 break event.
633 * Use a kernel timer to periodically poll the rx line until
634 * the break is finished.
636 static void sci_schedule_break_timer(struct sci_port *port)
638 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
639 add_timer(&port->break_timer);
641 /* Ensure that two consecutive samples find the break over. */
642 static void sci_break_timer(unsigned long data)
644 struct sci_port *port = (struct sci_port *)data;
646 if (sci_rxd_in(&port->port) == 0) {
647 port->break_flag = 1;
648 sci_schedule_break_timer(port);
649 } else if (port->break_flag == 1) {
651 port->break_flag = 2;
652 sci_schedule_break_timer(port);
654 port->break_flag = 0;
657 static inline int sci_handle_errors(struct uart_port *port)
660 unsigned short status = sci_in(port, SCxSR);
661 struct tty_struct *tty = port->info->port.tty;
663 if (status & SCxSR_ORER(port)) {
665 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
667 pr_debug("sci: overrun error\n");
670 if (status & SCxSR_FER(port)) {
671 if (sci_rxd_in(port) == 0) {
672 /* Notify of BREAK */
673 struct sci_port *sci_port = to_sci_port(port);
675 if (!sci_port->break_flag) {
676 sci_port->break_flag = 1;
677 sci_schedule_break_timer(sci_port);
679 /* Do sysrq handling. */
680 if (uart_handle_break(port))
682 pr_debug("sci: BREAK detected\n");
683 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
689 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
691 pr_debug("sci: frame error\n");
695 if (status & SCxSR_PER(port)) {
697 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
699 pr_debug("sci: parity error\n");
703 tty_flip_buffer_push(tty);
708 static inline int sci_handle_breaks(struct uart_port *port)
711 unsigned short status = sci_in(port, SCxSR);
712 struct tty_struct *tty = port->info->port.tty;
713 struct sci_port *s = &sci_ports[port->line];
715 if (uart_handle_break(port))
718 if (!s->break_flag && status & SCxSR_BRK(port)) {
719 #if defined(CONFIG_CPU_SH3)
723 /* Notify of BREAK */
724 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
726 pr_debug("sci: BREAK detected\n");
729 #if defined(SCIF_ORER)
730 /* XXX: Handle SCIF overrun error */
731 if (port->type != PORT_SCI && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
732 sci_out(port, SCLSR, 0);
733 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
735 pr_debug("sci: overrun error\n");
741 tty_flip_buffer_push(tty);
746 static irqreturn_t sci_rx_interrupt(int irq, void *port)
748 /* I think sci_receive_chars has to be called irrespective
749 * of whether the I_IXOFF is set, otherwise, how is the interrupt
752 sci_receive_chars(port);
757 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
759 struct uart_port *port = ptr;
761 spin_lock_irq(&port->lock);
762 sci_transmit_chars(port);
763 spin_unlock_irq(&port->lock);
768 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
770 struct uart_port *port = ptr;
773 if (port->type == PORT_SCI) {
774 if (sci_handle_errors(port)) {
775 /* discard character in rx buffer */
777 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
780 #if defined(SCIF_ORER)
781 if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
782 struct tty_struct *tty = port->info->port.tty;
784 sci_out(port, SCLSR, 0);
785 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
786 tty_flip_buffer_push(tty);
787 pr_debug("scif: overrun error\n");
790 sci_rx_interrupt(irq, ptr);
793 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
795 /* Kick the transmission */
796 sci_tx_interrupt(irq, ptr);
801 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
803 struct uart_port *port = ptr;
806 sci_handle_breaks(port);
807 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
812 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
814 unsigned short ssr_status, scr_status;
815 struct uart_port *port = ptr;
816 irqreturn_t ret = IRQ_NONE;
818 ssr_status = sci_in(port, SCxSR);
819 scr_status = sci_in(port, SCSCR);
822 if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE))
823 ret = sci_tx_interrupt(irq, ptr);
825 if ((ssr_status & 0x0002) && (scr_status & SCI_CTRL_FLAGS_RIE))
826 ret = sci_rx_interrupt(irq, ptr);
827 /* Error Interrupt */
828 if ((ssr_status & 0x0080) && (scr_status & SCI_CTRL_FLAGS_REIE))
829 ret = sci_er_interrupt(irq, ptr);
830 /* Break Interrupt */
831 if ((ssr_status & 0x0010) && (scr_status & SCI_CTRL_FLAGS_REIE))
832 ret = sci_br_interrupt(irq, ptr);
837 #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
839 * Here we define a transistion notifier so that we can update all of our
840 * ports' baud rate when the peripheral clock changes.
842 static int sci_notifier(struct notifier_block *self,
843 unsigned long phase, void *p)
845 struct cpufreq_freqs *freqs = p;
848 if ((phase == CPUFREQ_POSTCHANGE) ||
849 (phase == CPUFREQ_RESUMECHANGE)) {
850 for (i = 0; i < SCI_NPORTS; i++) {
851 struct uart_port *port = &sci_ports[i].port;
855 * Update the uartclk per-port if frequency has
856 * changed, since it will no longer necessarily be
857 * consistent with the old frequency.
859 * Really we want to be able to do something like
860 * uart_change_speed() or something along those lines
861 * here to implicitly reset the per-port baud rate..
863 * Clean this up later..
865 clk = clk_get(NULL, "module_clk");
866 port->uartclk = clk_get_rate(clk);
870 printk(KERN_INFO "%s: got a postchange notification "
871 "for cpu %d (old %d, new %d)\n",
872 __func__, freqs->cpu, freqs->old, freqs->new);
878 static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
879 #endif /* CONFIG_CPU_FREQ && CONFIG_HAVE_CLK */
881 static int sci_request_irq(struct sci_port *port)
884 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
885 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
888 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
889 "SCI Transmit Data Empty", "SCI Break" };
891 if (port->irqs[0] == port->irqs[1]) {
892 if (!port->irqs[0]) {
893 printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
897 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
898 IRQF_DISABLED, "sci", port)) {
899 printk(KERN_ERR "sci: Cannot allocate irq.\n");
903 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
906 if (request_irq(port->irqs[i], handlers[i],
907 IRQF_DISABLED, desc[i], port)) {
908 printk(KERN_ERR "sci: Cannot allocate irq.\n");
917 static void sci_free_irq(struct sci_port *port)
921 if (port->irqs[0] == port->irqs[1]) {
923 printk(KERN_ERR "sci: sci_free_irq error\n");
925 free_irq(port->irqs[0], port);
927 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
931 free_irq(port->irqs[i], port);
936 static unsigned int sci_tx_empty(struct uart_port *port)
942 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
944 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
945 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
946 /* If you have signals for DTR and DCD, please implement here. */
949 static unsigned int sci_get_mctrl(struct uart_port *port)
951 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
954 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
957 static void sci_start_tx(struct uart_port *port)
961 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
962 ctrl = sci_in(port, SCSCR);
963 ctrl |= SCI_CTRL_FLAGS_TIE;
964 sci_out(port, SCSCR, ctrl);
967 static void sci_stop_tx(struct uart_port *port)
971 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
972 ctrl = sci_in(port, SCSCR);
973 ctrl &= ~SCI_CTRL_FLAGS_TIE;
974 sci_out(port, SCSCR, ctrl);
977 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
981 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
982 ctrl = sci_in(port, SCSCR);
983 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
984 sci_out(port, SCSCR, ctrl);
987 static void sci_stop_rx(struct uart_port *port)
991 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
992 ctrl = sci_in(port, SCSCR);
993 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
994 sci_out(port, SCSCR, ctrl);
997 static void sci_enable_ms(struct uart_port *port)
999 /* Nothing here yet .. */
1002 static void sci_break_ctl(struct uart_port *port, int break_state)
1004 /* Nothing here yet .. */
1007 static int sci_startup(struct uart_port *port)
1009 struct sci_port *s = &sci_ports[port->line];
1014 #ifdef CONFIG_HAVE_CLK
1015 s->clk = clk_get(NULL, "module_clk");
1020 sci_start_rx(port, 1);
1025 static void sci_shutdown(struct uart_port *port)
1027 struct sci_port *s = &sci_ports[port->line];
1036 #ifdef CONFIG_HAVE_CLK
1042 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1043 struct ktermios *old)
1045 struct sci_port *s = &sci_ports[port->line];
1046 unsigned int status, baud, smr_val;
1049 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1051 t = SCBRR_VALUE(baud, port->uartclk);
1054 status = sci_in(port, SCxSR);
1055 } while (!(status & SCxSR_TEND(port)));
1057 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1059 if (port->type != PORT_SCI)
1060 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1062 smr_val = sci_in(port, SCSMR) & 3;
1063 if ((termios->c_cflag & CSIZE) == CS7)
1065 if (termios->c_cflag & PARENB)
1067 if (termios->c_cflag & PARODD)
1069 if (termios->c_cflag & CSTOPB)
1072 uart_update_timeout(port, termios->c_cflag, baud);
1074 sci_out(port, SCSMR, smr_val);
1078 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1081 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1083 sci_out(port, SCBRR, t);
1084 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1087 if (likely(s->init_pins))
1088 s->init_pins(port, termios->c_cflag);
1090 sci_out(port, SCSCR, SCSCR_INIT(port));
1092 if ((termios->c_cflag & CREAD) != 0)
1093 sci_start_rx(port, 0);
1096 static const char *sci_type(struct uart_port *port)
1098 switch (port->type) {
1112 static void sci_release_port(struct uart_port *port)
1114 /* Nothing here yet .. */
1117 static int sci_request_port(struct uart_port *port)
1119 /* Nothing here yet .. */
1123 static void sci_config_port(struct uart_port *port, int flags)
1125 struct sci_port *s = &sci_ports[port->line];
1127 port->type = s->type;
1129 switch (port->type) {
1131 s->init_pins = sci_init_pins_sci;
1135 s->init_pins = sci_init_pins_scif;
1138 s->init_pins = sci_init_pins_irda;
1142 if (port->flags & UPF_IOREMAP && !port->membase) {
1143 #if defined(CONFIG_SUPERH64)
1144 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1145 port->membase = (void __iomem *)port->mapbase;
1147 port->membase = ioremap_nocache(port->mapbase, 0x40);
1150 printk(KERN_ERR "sci: can't remap port#%d\n", port->line);
1154 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1156 struct sci_port *s = &sci_ports[port->line];
1158 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
1160 if (ser->baud_base < 2400)
1161 /* No paper tape reader for Mitch.. */
1167 static struct uart_ops sci_uart_ops = {
1168 .tx_empty = sci_tx_empty,
1169 .set_mctrl = sci_set_mctrl,
1170 .get_mctrl = sci_get_mctrl,
1171 .start_tx = sci_start_tx,
1172 .stop_tx = sci_stop_tx,
1173 .stop_rx = sci_stop_rx,
1174 .enable_ms = sci_enable_ms,
1175 .break_ctl = sci_break_ctl,
1176 .startup = sci_startup,
1177 .shutdown = sci_shutdown,
1178 .set_termios = sci_set_termios,
1180 .release_port = sci_release_port,
1181 .request_port = sci_request_port,
1182 .config_port = sci_config_port,
1183 .verify_port = sci_verify_port,
1186 static void __init sci_init_ports(void)
1188 static int first = 1;
1196 for (i = 0; i < SCI_NPORTS; i++) {
1197 sci_ports[i].port.ops = &sci_uart_ops;
1198 sci_ports[i].port.iotype = UPIO_MEM;
1199 sci_ports[i].port.line = i;
1200 sci_ports[i].port.fifosize = 1;
1202 #if defined(__H8300H__) || defined(__H8300S__)
1204 sci_ports[i].enable = h8300_sci_enable;
1205 sci_ports[i].disable = h8300_sci_disable;
1207 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1208 #elif defined(CONFIG_HAVE_CLK)
1210 * XXX: We should use a proper SCI/SCIF clock
1213 struct clk *clk = clk_get(NULL, "module_clk");
1214 sci_ports[i].port.uartclk = clk_get_rate(clk);
1218 #error "Need a valid uartclk"
1221 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1222 sci_ports[i].break_timer.function = sci_break_timer;
1224 init_timer(&sci_ports[i].break_timer);
1228 int __init early_sci_setup(struct uart_port *port)
1230 if (unlikely(port->line > SCI_NPORTS))
1235 sci_ports[port->line].port.membase = port->membase;
1236 sci_ports[port->line].port.mapbase = port->mapbase;
1237 sci_ports[port->line].port.type = port->type;
1242 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1244 * Print a string to the serial port trying not to disturb
1245 * any possible real use of the port...
1247 static void serial_console_write(struct console *co, const char *s,
1250 put_string(serial_console_port, s, count);
1253 static int __init serial_console_setup(struct console *co, char *options)
1255 struct uart_port *port;
1263 * Check whether an invalid uart number has been specified, and
1264 * if so, search for the first available port that does have
1267 if (co->index >= SCI_NPORTS)
1270 serial_console_port = &sci_ports[co->index];
1271 port = &serial_console_port->port;
1274 * Also need to check port->type, we don't actually have any
1275 * UPIO_PORT ports, but uart_report_port() handily misreports
1276 * it anyways if we don't have a port available by the time this is
1281 if (!port->membase || !port->mapbase)
1284 port->type = serial_console_port->type;
1286 #ifdef CONFIG_HAVE_CLK
1287 if (!serial_console_port->clk)
1288 serial_console_port->clk = clk_get(NULL, "module_clk");
1291 if (port->flags & UPF_IOREMAP)
1292 sci_config_port(port, 0);
1294 if (serial_console_port->enable)
1295 serial_console_port->enable(port);
1298 uart_parse_options(options, &baud, &parity, &bits, &flow);
1300 ret = uart_set_options(port, co, baud, parity, bits, flow);
1301 #if defined(__H8300H__) || defined(__H8300S__)
1302 /* disable rx interrupt */
1309 static struct console serial_console = {
1311 .device = uart_console_device,
1312 .write = serial_console_write,
1313 .setup = serial_console_setup,
1314 .flags = CON_PRINTBUFFER,
1316 .data = &sci_uart_driver,
1319 static int __init sci_console_init(void)
1322 register_console(&serial_console);
1325 console_initcall(sci_console_init);
1326 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1328 #ifdef CONFIG_SH_KGDB_CONSOLE
1330 * FIXME: Most of this can go away.. at the moment, we rely on
1331 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1332 * most of that can easily be done here instead.
1334 * For the time being, just accept the values that were parsed earlier..
1336 static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
1337 int *parity, int *bits)
1340 *parity = tolower(kgdb_parity);
1341 *bits = kgdb_bits - '0';
1345 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1346 * care of the early-on initialization for kgdb, regardless of whether we
1347 * actually use kgdb as a console or not.
1349 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1351 int __init kgdb_console_setup(struct console *co, char *options)
1353 struct uart_port *port = &sci_ports[kgdb_portnum].port;
1359 if (co->index != kgdb_portnum)
1360 co->index = kgdb_portnum;
1362 kgdb_sci_port = &sci_ports[co->index];
1363 port = &kgdb_sci_port->port;
1366 * Also need to check port->type, we don't actually have any
1367 * UPIO_PORT ports, but uart_report_port() handily misreports
1368 * it anyways if we don't have a port available by the time this is
1373 if (!port->membase || !port->mapbase)
1377 uart_parse_options(options, &baud, &parity, &bits, &flow);
1379 kgdb_console_get_options(port, &baud, &parity, &bits);
1381 kgdb_getchar = kgdb_sci_getchar;
1382 kgdb_putchar = kgdb_sci_putchar;
1384 return uart_set_options(port, co, baud, parity, bits, flow);
1387 static struct console kgdb_console = {
1389 .device = uart_console_device,
1390 .write = kgdb_console_write,
1391 .setup = kgdb_console_setup,
1392 .flags = CON_PRINTBUFFER,
1394 .data = &sci_uart_driver,
1397 /* Register the KGDB console so we get messages (d'oh!) */
1398 static int __init kgdb_console_init(void)
1401 register_console(&kgdb_console);
1404 console_initcall(kgdb_console_init);
1405 #endif /* CONFIG_SH_KGDB_CONSOLE */
1407 #if defined(CONFIG_SH_KGDB_CONSOLE)
1408 #define SCI_CONSOLE (&kgdb_console)
1409 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1410 #define SCI_CONSOLE (&serial_console)
1412 #define SCI_CONSOLE 0
1415 static char banner[] __initdata =
1416 KERN_INFO "SuperH SCI(F) driver initialized\n";
1418 static struct uart_driver sci_uart_driver = {
1419 .owner = THIS_MODULE,
1420 .driver_name = "sci",
1421 .dev_name = "ttySC",
1423 .minor = SCI_MINOR_START,
1425 .cons = SCI_CONSOLE,
1429 * Register a set of serial devices attached to a platform device. The
1430 * list is terminated with a zero flags entry, which means we expect
1431 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1432 * remapping (such as sh64) should also set UPF_IOREMAP.
1434 static int __devinit sci_probe(struct platform_device *dev)
1436 struct plat_sci_port *p = dev->dev.platform_data;
1437 int i, ret = -EINVAL;
1439 for (i = 0; p && p->flags != 0; p++, i++) {
1440 struct sci_port *sciport = &sci_ports[i];
1443 if (unlikely(i == SCI_NPORTS)) {
1444 dev_notice(&dev->dev, "Attempting to register port "
1445 "%d when only %d are available.\n",
1447 dev_notice(&dev->dev, "Consider bumping "
1448 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1452 sciport->port.mapbase = p->mapbase;
1454 if (p->mapbase && !p->membase) {
1455 if (p->flags & UPF_IOREMAP) {
1456 p->membase = ioremap_nocache(p->mapbase, 0x40);
1457 if (IS_ERR(p->membase)) {
1458 ret = PTR_ERR(p->membase);
1463 * For the simple (and majority of) cases
1464 * where we don't need to do any remapping,
1465 * just cast the cookie directly.
1467 p->membase = (void __iomem *)p->mapbase;
1471 sciport->port.membase = p->membase;
1473 sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
1474 sciport->port.flags = p->flags;
1475 sciport->port.dev = &dev->dev;
1477 sciport->type = sciport->port.type = p->type;
1479 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1481 uart_add_one_port(&sci_uart_driver, &sciport->port);
1484 #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1485 kgdb_sci_port = &sci_ports[kgdb_portnum];
1486 kgdb_getchar = kgdb_sci_getchar;
1487 kgdb_putchar = kgdb_sci_putchar;
1490 #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
1491 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1492 dev_info(&dev->dev, "CPU frequency notifier registered\n");
1495 #ifdef CONFIG_SH_STANDARD_BIOS
1496 sh_bios_gdb_detach();
1502 for (i = i - 1; i >= 0; i--)
1503 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1508 static int __devexit sci_remove(struct platform_device *dev)
1512 for (i = 0; i < SCI_NPORTS; i++)
1513 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1518 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1522 for (i = 0; i < SCI_NPORTS; i++) {
1523 struct sci_port *p = &sci_ports[i];
1525 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1526 uart_suspend_port(&sci_uart_driver, &p->port);
1532 static int sci_resume(struct platform_device *dev)
1536 for (i = 0; i < SCI_NPORTS; i++) {
1537 struct sci_port *p = &sci_ports[i];
1539 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1540 uart_resume_port(&sci_uart_driver, &p->port);
1546 static struct platform_driver sci_driver = {
1548 .remove = __devexit_p(sci_remove),
1549 .suspend = sci_suspend,
1550 .resume = sci_resume,
1553 .owner = THIS_MODULE,
1557 static int __init sci_init(void)
1565 ret = uart_register_driver(&sci_uart_driver);
1566 if (likely(ret == 0)) {
1567 ret = platform_driver_register(&sci_driver);
1569 uart_unregister_driver(&sci_uart_driver);
1575 static void __exit sci_exit(void)
1577 platform_driver_unregister(&sci_driver);
1578 uart_unregister_driver(&sci_uart_driver);
1581 module_init(sci_init);
1582 module_exit(sci_exit);
1584 MODULE_LICENSE("GPL");
1585 MODULE_ALIAS("platform:sh-sci");