272b7e176afcccd695763acf5050e1374ca89fb2
[pandora-kernel.git] / drivers / net / wireless / p54 / p54spi.c
1 /*
2  * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
3  * Copyright 2008       Johannes Berg <johannes@sipsolutions.net>
4  *
5  * This driver is a port from stlc45xx:
6  *      Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  */
22
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/interrupt.h>
26 #include <linux/firmware.h>
27 #include <linux/delay.h>
28 #include <linux/irq.h>
29 #include <linux/spi/spi.h>
30 #include <linux/etherdevice.h>
31 #include <linux/gpio.h>
32
33 #include "p54spi.h"
34 #include "p54spi_eeprom.h"
35 #include "p54.h"
36
37 #include "p54common.h"
38
39 MODULE_FIRMWARE("3826.arm");
40 MODULE_ALIAS("stlc45xx");
41
42 /*
43  * gpios should be handled in board files and provided via platform data,
44  * but because it's currently impossible for p54spi to have a header file
45  * in include/linux, let's use module paramaters for now
46  */
47
48 static int p54spi_gpio_power = 97;
49 module_param(p54spi_gpio_power, int, 0444);
50 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
51
52 static int p54spi_gpio_irq = 87;
53 module_param(p54spi_gpio_irq, int, 0444);
54 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
55
56 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
57                               void *buf, size_t len)
58 {
59         struct spi_transfer t[2];
60         struct spi_message m;
61         __le16 addr;
62
63         /* We first push the address */
64         addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
65
66         spi_message_init(&m);
67         memset(t, 0, sizeof(t));
68
69         t[0].tx_buf = &addr;
70         t[0].len = sizeof(addr);
71         spi_message_add_tail(&t[0], &m);
72
73         t[1].rx_buf = buf;
74         t[1].len = len;
75         spi_message_add_tail(&t[1], &m);
76
77         spi_sync(priv->spi, &m);
78 }
79
80
81 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
82                              const void *buf, size_t len)
83 {
84         struct spi_transfer t[3];
85         struct spi_message m;
86         __le16 addr;
87
88         /* We first push the address */
89         addr = cpu_to_le16(address << 8);
90
91         spi_message_init(&m);
92         memset(t, 0, sizeof(t));
93
94         t[0].tx_buf = &addr;
95         t[0].len = sizeof(addr);
96         spi_message_add_tail(&t[0], &m);
97
98         t[1].tx_buf = buf;
99         t[1].len = len;
100         spi_message_add_tail(&t[1], &m);
101
102         if (len % 2) {
103                 __le16 last_word;
104                 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
105
106                 t[2].tx_buf = &last_word;
107                 t[2].len = sizeof(last_word);
108                 spi_message_add_tail(&t[2], &m);
109         }
110
111         spi_sync(priv->spi, &m);
112 }
113
114 static u16 p54spi_read16(struct p54s_priv *priv, u8 addr)
115 {
116         __le16 val;
117
118         p54spi_spi_read(priv, addr, &val, sizeof(val));
119
120         return le16_to_cpu(val);
121 }
122
123 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
124 {
125         __le32 val;
126
127         p54spi_spi_read(priv, addr, &val, sizeof(val));
128
129         return le32_to_cpu(val);
130 }
131
132 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
133 {
134         p54spi_spi_write(priv, addr, &val, sizeof(val));
135 }
136
137 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
138 {
139         p54spi_spi_write(priv, addr, &val, sizeof(val));
140 }
141
142 struct p54spi_spi_reg {
143         u16 address;            /* __le16 ? */
144         u16 length;
145         char *name;
146 };
147
148 static const struct p54spi_spi_reg p54spi_registers_array[] =
149 {
150         { SPI_ADRS_ARM_INTERRUPTS,      32, "ARM_INT     " },
151         { SPI_ADRS_ARM_INT_EN,          32, "ARM_INT_ENA " },
152         { SPI_ADRS_HOST_INTERRUPTS,     32, "HOST_INT    " },
153         { SPI_ADRS_HOST_INT_EN,         32, "HOST_INT_ENA" },
154         { SPI_ADRS_HOST_INT_ACK,        32, "HOST_INT_ACK" },
155         { SPI_ADRS_GEN_PURP_1,          32, "GP1_COMM    " },
156         { SPI_ADRS_GEN_PURP_2,          32, "GP2_COMM    " },
157         { SPI_ADRS_DEV_CTRL_STAT,       32, "DEV_CTRL_STA" },
158         { SPI_ADRS_DMA_DATA,            16, "DMA_DATA    " },
159         { SPI_ADRS_DMA_WRITE_CTRL,      16, "DMA_WR_CTRL " },
160         { SPI_ADRS_DMA_WRITE_LEN,       16, "DMA_WR_LEN  " },
161         { SPI_ADRS_DMA_WRITE_BASE,      32, "DMA_WR_BASE " },
162         { SPI_ADRS_DMA_READ_CTRL,       16, "DMA_RD_CTRL " },
163         { SPI_ADRS_DMA_READ_LEN,        16, "DMA_RD_LEN  " },
164         { SPI_ADRS_DMA_WRITE_BASE,      32, "DMA_RD_BASE " }
165 };
166
167 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits)
168 {
169         int i;
170
171         for (i = 0; i < 2000; i++) {
172                 __le32 buffer = p54spi_read32(priv, reg);
173                 if ((buffer & bits) == bits)
174                         return 1;
175         }
176         return 0;
177 }
178
179 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
180                                 const void *buf, size_t len)
181 {
182         if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL,
183                              cpu_to_le32(HOST_ALLOWED))) {
184                 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
185                         "to DMA write.\n");
186                 return -EAGAIN;
187         }
188
189         p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
190                        cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
191
192         p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
193         p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
194         p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
195         return 0;
196 }
197
198 static int p54spi_request_firmware(struct ieee80211_hw *dev)
199 {
200         struct p54s_priv *priv = dev->priv;
201         int ret;
202
203         /* FIXME: should driver use it's own struct device? */
204         ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
205
206         if (ret < 0) {
207                 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
208                 return ret;
209         }
210
211         ret = p54_parse_firmware(dev, priv->firmware);
212         if (ret) {
213                 release_firmware(priv->firmware);
214                 return ret;
215         }
216
217         return 0;
218 }
219
220 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
221 {
222         struct p54s_priv *priv = dev->priv;
223         const struct firmware *eeprom;
224         int ret;
225
226         /*
227          * allow users to customize their eeprom.
228          */
229
230         ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
231         if (ret < 0) {
232                 dev_info(&priv->spi->dev, "loading default eeprom...\n");
233                 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
234                                        sizeof(p54spi_eeprom));
235         } else {
236                 dev_info(&priv->spi->dev, "loading user eeprom...\n");
237                 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
238                                        (int)eeprom->size);
239                 release_firmware(eeprom);
240         }
241         return ret;
242 }
243
244 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
245 {
246         struct p54s_priv *priv = dev->priv;
247         unsigned long fw_len, _fw_len;
248         unsigned int offset = 0;
249         int err = 0;
250         u8 *fw;
251
252         fw_len = priv->firmware->size;
253         fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
254         if (!fw)
255                 return -ENOMEM;
256
257         /* stop the device */
258         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
259                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
260                        SPI_CTRL_STAT_START_HALTED));
261
262         msleep(TARGET_BOOT_SLEEP);
263
264         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
265                        SPI_CTRL_STAT_HOST_OVERRIDE |
266                        SPI_CTRL_STAT_START_HALTED));
267
268         msleep(TARGET_BOOT_SLEEP);
269
270         while (fw_len > 0) {
271                 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
272
273                 err = p54spi_spi_write_dma(priv, cpu_to_le32(
274                                            ISL38XX_DEV_FIRMWARE_ADDR + offset),
275                                            (fw + offset), _fw_len);
276                 if (err < 0)
277                         goto out;
278
279                 fw_len -= _fw_len;
280                 offset += _fw_len;
281         }
282
283         BUG_ON(fw_len != 0);
284
285         /* enable host interrupts */
286         p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
287                        cpu_to_le32(SPI_HOST_INTS_DEFAULT));
288
289         /* boot the device */
290         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
291                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
292                        SPI_CTRL_STAT_RAM_BOOT));
293
294         msleep(TARGET_BOOT_SLEEP);
295
296         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
297                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
298         msleep(TARGET_BOOT_SLEEP);
299
300 out:
301         kfree(fw);
302         return err;
303 }
304
305 static void p54spi_power_off(struct p54s_priv *priv)
306 {
307         disable_irq(gpio_to_irq(p54spi_gpio_irq));
308         gpio_set_value(p54spi_gpio_power, 0);
309 }
310
311 static void p54spi_power_on(struct p54s_priv *priv)
312 {
313         gpio_set_value(p54spi_gpio_power, 1);
314         enable_irq(gpio_to_irq(p54spi_gpio_irq));
315
316         /*
317          * need to wait a while before device can be accessed, the lenght
318          * is just a guess
319          */
320         msleep(10);
321 }
322
323 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
324 {
325         p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
326 }
327
328 static void p54spi_wakeup(struct p54s_priv *priv)
329 {
330         /* wake the chip */
331         p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
332                        cpu_to_le32(SPI_TARGET_INT_WAKEUP));
333
334         /* And wait for the READY interrupt */
335         if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
336                              cpu_to_le32(SPI_HOST_INT_READY))) {
337                 dev_err(&priv->spi->dev, "INT_READY timeout\n");
338                 goto out;
339         }
340
341         p54spi_int_ack(priv, SPI_HOST_INT_READY);
342
343 out:
344         return;
345 }
346
347 static inline void p54spi_sleep(struct p54s_priv *priv)
348 {
349         p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
350                        cpu_to_le32(SPI_TARGET_INT_SLEEP));
351 }
352
353 static void p54spi_int_ready(struct p54s_priv *priv)
354 {
355         p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
356                        SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
357
358         switch (priv->fw_state) {
359         case FW_STATE_BOOTING:
360                 priv->fw_state = FW_STATE_READY;
361                 complete(&priv->fw_comp);
362                 break;
363         case FW_STATE_RESETTING:
364                 priv->fw_state = FW_STATE_READY;
365                 /* TODO: reinitialize state */
366                 break;
367         default:
368                 break;
369         }
370 }
371
372 static int p54spi_rx(struct p54s_priv *priv)
373 {
374         struct sk_buff *skb;
375         u16 len;
376
377         p54spi_wakeup(priv);
378
379         /* dummy read to flush SPI DMA controller bug */
380         p54spi_read16(priv, SPI_ADRS_GEN_PURP_1);
381
382         len = p54spi_read16(priv, SPI_ADRS_DMA_DATA);
383
384         if (len == 0) {
385                 dev_err(&priv->spi->dev, "rx request of zero bytes");
386                 return 0;
387         }
388
389
390         /* Firmware may insert up to 4 padding bytes after the lmac header,
391          * but it does not amend the size of SPI data transfer.
392          * Such packets has correct data size in header, thus referencing
393          * past the end of allocated skb. Reserve extra 4 bytes for this case */
394         skb = dev_alloc_skb(len + 4);
395         if (!skb) {
396                 dev_err(&priv->spi->dev, "could not alloc skb");
397                 return 0;
398         }
399
400         p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, skb_put(skb, len), len);
401         p54spi_sleep(priv);
402         /* Put additional bytes to compensate for the possible
403          * alignment-caused truncation */
404         skb_put(skb, 4);
405
406         if (p54_rx(priv->hw, skb) == 0)
407                 dev_kfree_skb(skb);
408
409         return 0;
410 }
411
412
413 static irqreturn_t p54spi_interrupt(int irq, void *config)
414 {
415         struct spi_device *spi = config;
416         struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
417
418         queue_work(priv->hw->workqueue, &priv->work);
419
420         return IRQ_HANDLED;
421 }
422
423 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
424 {
425         struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
426         int ret = 0;
427
428         p54spi_wakeup(priv);
429
430         ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
431         if (ret < 0)
432                 goto out;
433
434         if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
435                              cpu_to_le32(SPI_HOST_INT_WR_READY))) {
436                 dev_err(&priv->spi->dev, "WR_READY timeout\n");
437                 ret = -1;
438                 goto out;
439         }
440
441         p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
442         p54spi_sleep(priv);
443
444         if (FREE_AFTER_TX(skb))
445                 p54_free_skb(priv->hw, skb);
446 out:
447         return ret;
448 }
449
450 static int p54spi_wq_tx(struct p54s_priv *priv)
451 {
452         struct p54s_tx_info *entry;
453         struct sk_buff *skb;
454         struct ieee80211_tx_info *info;
455         struct p54_tx_info *minfo;
456         struct p54s_tx_info *dinfo;
457         unsigned long flags;
458         int ret = 0;
459
460         spin_lock_irqsave(&priv->tx_lock, flags);
461
462         while (!list_empty(&priv->tx_pending)) {
463                 entry = list_entry(priv->tx_pending.next,
464                                    struct p54s_tx_info, tx_list);
465
466                 list_del_init(&entry->tx_list);
467
468                 spin_unlock_irqrestore(&priv->tx_lock, flags);
469
470                 dinfo = container_of((void *) entry, struct p54s_tx_info,
471                                      tx_list);
472                 minfo = container_of((void *) dinfo, struct p54_tx_info,
473                                      data);
474                 info = container_of((void *) minfo, struct ieee80211_tx_info,
475                                     rate_driver_data);
476                 skb = container_of((void *) info, struct sk_buff, cb);
477
478                 ret = p54spi_tx_frame(priv, skb);
479
480                 if (ret < 0) {
481                         p54_free_skb(priv->hw, skb);
482                         return ret;
483                 }
484
485                 spin_lock_irqsave(&priv->tx_lock, flags);
486         }
487         spin_unlock_irqrestore(&priv->tx_lock, flags);
488         return ret;
489 }
490
491 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
492 {
493         struct p54s_priv *priv = dev->priv;
494         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
495         struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
496         struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
497         unsigned long flags;
498
499         BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
500
501         spin_lock_irqsave(&priv->tx_lock, flags);
502         list_add_tail(&di->tx_list, &priv->tx_pending);
503         spin_unlock_irqrestore(&priv->tx_lock, flags);
504
505         queue_work(priv->hw->workqueue, &priv->work);
506 }
507
508 static void p54spi_work(struct work_struct *work)
509 {
510         struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
511         u32 ints;
512         int ret;
513
514         mutex_lock(&priv->mutex);
515
516         if (priv->fw_state == FW_STATE_OFF &&
517             priv->fw_state == FW_STATE_RESET)
518                 goto out;
519
520         ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
521
522         if (ints & SPI_HOST_INT_READY) {
523                 p54spi_int_ready(priv);
524                 p54spi_int_ack(priv, SPI_HOST_INT_READY);
525         }
526
527         if (priv->fw_state != FW_STATE_READY)
528                 goto out;
529
530         if (ints & SPI_HOST_INT_UPDATE) {
531                 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
532                 ret = p54spi_rx(priv);
533                 if (ret < 0)
534                         goto out;
535         }
536         if (ints & SPI_HOST_INT_SW_UPDATE) {
537                 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
538                 ret = p54spi_rx(priv);
539                 if (ret < 0)
540                         goto out;
541         }
542
543         ret = p54spi_wq_tx(priv);
544         if (ret < 0)
545                 goto out;
546
547         ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
548
549 out:
550         mutex_unlock(&priv->mutex);
551 }
552
553 static int p54spi_op_start(struct ieee80211_hw *dev)
554 {
555         struct p54s_priv *priv = dev->priv;
556         unsigned long timeout;
557         int ret = 0;
558
559         if (mutex_lock_interruptible(&priv->mutex)) {
560                 ret = -EINTR;
561                 goto out;
562         }
563
564         priv->fw_state = FW_STATE_BOOTING;
565
566         p54spi_power_on(priv);
567
568         ret = p54spi_upload_firmware(dev);
569         if (ret < 0) {
570                 p54spi_power_off(priv);
571                 goto out_unlock;
572         }
573
574         mutex_unlock(&priv->mutex);
575
576         timeout = msecs_to_jiffies(2000);
577         timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
578                                                             timeout);
579         if (!timeout) {
580                 dev_err(&priv->spi->dev, "firmware boot failed");
581                 p54spi_power_off(priv);
582                 ret = -1;
583                 goto out;
584         }
585
586         if (mutex_lock_interruptible(&priv->mutex)) {
587                 ret = -EINTR;
588                 p54spi_power_off(priv);
589                 goto out;
590         }
591
592         WARN_ON(priv->fw_state != FW_STATE_READY);
593
594 out_unlock:
595         mutex_unlock(&priv->mutex);
596
597 out:
598         return ret;
599 }
600
601 static void p54spi_op_stop(struct ieee80211_hw *dev)
602 {
603         struct p54s_priv *priv = dev->priv;
604         unsigned long flags;
605
606         if (mutex_lock_interruptible(&priv->mutex)) {
607                 /* FIXME: how to handle this error? */
608                 return;
609         }
610
611         WARN_ON(priv->fw_state != FW_STATE_READY);
612
613         cancel_work_sync(&priv->work);
614
615         p54spi_power_off(priv);
616         spin_lock_irqsave(&priv->tx_lock, flags);
617         INIT_LIST_HEAD(&priv->tx_pending);
618         spin_unlock_irqrestore(&priv->tx_lock, flags);
619
620         priv->fw_state = FW_STATE_OFF;
621         mutex_unlock(&priv->mutex);
622 }
623
624 static int __devinit p54spi_probe(struct spi_device *spi)
625 {
626         struct p54s_priv *priv = NULL;
627         struct ieee80211_hw *hw;
628         int ret = -EINVAL;
629
630         hw = p54_init_common(sizeof(*priv));
631         if (!hw) {
632                 dev_err(&priv->spi->dev, "could not alloc ieee80211_hw");
633                 return -ENOMEM;
634         }
635
636         priv = hw->priv;
637         priv->hw = hw;
638         dev_set_drvdata(&spi->dev, priv);
639         priv->spi = spi;
640
641         spi->bits_per_word = 16;
642         spi->max_speed_hz = 24000000;
643
644         ret = spi_setup(spi);
645         if (ret < 0) {
646                 dev_err(&priv->spi->dev, "spi_setup failed");
647                 goto err_free_common;
648         }
649
650         ret = gpio_request(p54spi_gpio_power, "p54spi power");
651         if (ret < 0) {
652                 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
653                 goto err_free_common;
654         }
655
656         ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
657         if (ret < 0) {
658                 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
659                 goto err_free_common;
660         }
661
662         gpio_direction_output(p54spi_gpio_power, 0);
663         gpio_direction_input(p54spi_gpio_irq);
664
665         ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
666                           p54spi_interrupt, IRQF_DISABLED, "p54spi",
667                           priv->spi);
668         if (ret < 0) {
669                 dev_err(&priv->spi->dev, "request_irq() failed");
670                 goto err_free_common;
671         }
672
673         set_irq_type(gpio_to_irq(p54spi_gpio_irq),
674                      IRQ_TYPE_EDGE_RISING);
675
676         disable_irq(gpio_to_irq(p54spi_gpio_irq));
677
678         INIT_WORK(&priv->work, p54spi_work);
679         init_completion(&priv->fw_comp);
680         INIT_LIST_HEAD(&priv->tx_pending);
681         mutex_init(&priv->mutex);
682         SET_IEEE80211_DEV(hw, &spi->dev);
683         priv->common.open = p54spi_op_start;
684         priv->common.stop = p54spi_op_stop;
685         priv->common.tx = p54spi_op_tx;
686
687         ret = p54spi_request_firmware(hw);
688         if (ret < 0)
689                 goto err_free_common;
690
691         ret = p54spi_request_eeprom(hw);
692         if (ret)
693                 goto err_free_common;
694
695         ret = p54_register_common(hw, &priv->spi->dev);
696         if (ret)
697                 goto err_free_common;
698
699         return 0;
700
701 err_free_common:
702         p54_free_common(priv->hw);
703         return ret;
704 }
705
706 static int __devexit p54spi_remove(struct spi_device *spi)
707 {
708         struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
709
710         ieee80211_unregister_hw(priv->hw);
711
712         free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
713
714         gpio_free(p54spi_gpio_power);
715         gpio_free(p54spi_gpio_irq);
716         release_firmware(priv->firmware);
717
718         mutex_destroy(&priv->mutex);
719
720         p54_free_common(priv->hw);
721         ieee80211_free_hw(priv->hw);
722
723         return 0;
724 }
725
726
727 static struct spi_driver p54spi_driver = {
728         .driver = {
729                 /* use cx3110x name because board-n800.c uses that for the
730                  * SPI port */
731                 .name           = "cx3110x",
732                 .bus            = &spi_bus_type,
733                 .owner          = THIS_MODULE,
734         },
735
736         .probe          = p54spi_probe,
737         .remove         = __devexit_p(p54spi_remove),
738 };
739
740 static int __init p54spi_init(void)
741 {
742         int ret;
743
744         ret = spi_register_driver(&p54spi_driver);
745         if (ret < 0) {
746                 printk(KERN_ERR "failed to register SPI driver: %d", ret);
747                 goto out;
748         }
749
750 out:
751         return ret;
752 }
753
754 static void __exit p54spi_exit(void)
755 {
756         spi_unregister_driver(&p54spi_driver);
757 }
758
759 module_init(p54spi_init);
760 module_exit(p54spi_exit);
761
762 MODULE_LICENSE("GPL");
763 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");