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[pandora-x-loader.git] / drivers / k9k1216.c
1 /*
2  * (C) Copyright 2004 Texas Instruments
3  * Jian Zhang <jzhang@ti.com>
4  *
5  *  Samsung K9K1216Q0C NAND chip driver for an OMAP2420 board
6  * 
7  * This file is based on the following u-boot file:
8  *      common/cmd_nand.c
9  *
10  * See file CREDITS for list of people who contributed to this
11  * project.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License as
15  * published by the Free Software Foundation; either version 2 of
16  * the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software
25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26  * MA 02111-1307 USA
27  */
28
29 #include <common.h>
30
31 #ifdef CFG_NAND_K9K1216
32
33 #define K9K1216_MFR             0xec
34 #define K9K1216_ID              0x46
35
36 #define ADDR_COLUMN             1          
37 #define ADDR_PAGE               2             
38 #define ADDR_COLUMN_PAGE        3
39
40 #define PAGE_SIZE               512
41 /*******************************************************
42  * Routine: delay
43  * Description: spinning delay to use before udelay works
44  ******************************************************/
45 static inline void delay (unsigned long loops)
46 {
47         __asm__ volatile ("1:\n"
48                                           "subs %0, %1, #1\n"
49                                           "bne 1b":"=r" (loops):"0" (loops));
50 }
51
52 static int nand_read_page(u_char *buf, ulong page_addr);
53 static int nand_read_oob(u_char * buf, ulong page_addr);
54
55 /* JFFS2 512-byte-page ECC layout */
56 static u_char ecc_pos[] = {0,1,2,3,6,7};
57 static u_char eccvalid_pos = 4;
58
59 /* NanD_Command: Send a flash command to the flash chip */
60 static int NanD_Command(unsigned char command)
61 {
62         NAND_CTL_SETCLE(NAND_ADDR);
63         WRITE_NAND_COMMAND(command, NAND_ADDR);
64         NAND_CTL_CLRCLE(NAND_ADDR);
65
66         if(command == NAND_CMD_RESET){
67                 unsigned char ret_val;
68                 NanD_Command(NAND_CMD_STATUS);
69                 do{
70                         ret_val = READ_NAND(NAND_ADDR);/* wait till ready */
71                 } while((ret_val & 0x40) != 0x40);
72         }
73         
74         NAND_WAIT_READY();
75         return 0;
76 }
77
78 /* NanD_Address: Set the current address for the flash chip */
79 static int NanD_Address(int numbytes, unsigned long ofs)
80 {
81         int i;
82
83         NAND_CTL_SETALE(NAND_ADDR);
84  
85         if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
86                 WRITE_NAND_ADDRESS(ofs, NAND_ADDR);
87
88         ofs = ofs >> 9;
89
90         if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE)
91                 for (i = 0; i < 3; i++, ofs = ofs >> 8)
92                         WRITE_NAND_ADDRESS(ofs, NAND_ADDR);
93
94         NAND_CTL_CLRALE(NAND_ADDR);
95
96         NAND_WAIT_READY();
97         return 0;
98 }
99
100 /* read chip mfr and id
101  * return 0 if they match board config
102  * return 1 if not
103  */
104 int nand_chip()
105 {
106         int mfr, id;
107
108         NAND_ENABLE_CE();
109
110         if (NanD_Command(NAND_CMD_RESET)) {
111                 printf("Err: RESET\n");
112                 NAND_DISABLE_CE();   
113                 return 1;
114         }
115  
116         if (NanD_Command(NAND_CMD_READID)) {
117                 printf("Err: READID\n");
118                 NAND_DISABLE_CE();
119                 return 1;
120         }
121  
122         NanD_Address(ADDR_COLUMN, 0);
123
124         mfr = READ_NAND(NAND_ADDR);
125         id = READ_NAND(NAND_ADDR);
126
127         NAND_DISABLE_CE();
128
129         return (mfr != K9K1216_MFR || id != K9K1216_ID);
130 }
131
132 /* read a block data to buf
133  * return 1 if the block is bad or ECC error can't be corrected for any page
134  * return 0 on sucess
135  */ 
136 int nand_read_block(unsigned char *buf, ulong block_addr)
137 {
138         int i, offset = 0;
139         uchar oob_buf[16];
140         
141         /* check bad block */
142         /* 0th and 5th words need be 0xffff */
143         if (nand_read_oob(oob_buf, block_addr) ||
144 //              oob_buf[0] != 0xff || oob_buf[1] != 0xff ||
145 //              oob_buf[10] != 0xff || oob_buf[11] != 0xff ){
146                 oob_buf[5] != 0xff){
147                 printf("Skipped bad block at 0x%x\n", block_addr);
148                 return 1;    /* skip bad block */
149         }
150
151         /* read the block page by page*/
152         for (i=0; i<32; i++){
153                 if (nand_read_page(buf+offset, block_addr + offset))
154                         return 1;
155                 offset += PAGE_SIZE;
156         }
157
158         return 0;
159 }
160 static count = 0;
161 /* read a page with ECC */
162 static int nand_read_page(u_char *buf, ulong page_addr)
163 {
164         u_char ecc_code[6];
165         u_char ecc_calc[3];
166         u_char oob_buf[16];
167         u_char *p;
168         u16 val;
169         int cntr;
170
171         NAND_ENABLE_CE();   
172         NanD_Command(NAND_CMD_READ0);
173         NanD_Address(ADDR_COLUMN_PAGE, page_addr);
174         NAND_WAIT_READY();
175
176         delay(500); /* we go through NFC need a bigger delay. 200 is not enough */
177  
178         p = buf;
179         for (cntr = 0; cntr < 256; cntr++){
180                 val = READ_NAND(NAND_ADDR);
181                 *p++ = val & 0xff;
182                 *p++ = val >> 8;
183         }
184
185         p = oob_buf;
186         for (cntr = 0; cntr < 8; cntr++){
187                 val = READ_NAND(NAND_ADDR);
188                 *p++ = val & 0xff;
189                 *p++ = val >> 8;
190         }
191         count = 1;
192         NAND_DISABLE_CE();  /* set pin high */
193
194         /* Pick the ECC bytes out of the oob data */
195         for (cntr = 0; cntr < 6; cntr++)
196                 ecc_code[cntr] =  oob_buf[ecc_pos[cntr]];
197
198         if ((oob_buf[eccvalid_pos] & 0x0f) != 0x0f) {
199                 nand_calculate_ecc (buf, &ecc_calc[0]);
200                 if (nand_correct_data (buf, &ecc_code[0], &ecc_calc[0]) == -1) {
201                         printf ("ECC Failed, page 0x%08x\n", page_addr);
202                         for (val=0; val <256; val++)
203                                 printf("%x ", buf[val]);
204                         printf("\n");
205                         for (;;);
206                         return 1;
207                 }
208         }
209         
210         if ((oob_buf[eccvalid_pos] & 0xf0) != 0xf0) {
211                 nand_calculate_ecc (buf + 256, &ecc_calc[0]);
212                 if (nand_correct_data (buf + 256, &ecc_code[3], &ecc_calc[0]) == -1) {
213                         printf ("ECC Failed, page 0x%08x\n", page_addr+0x100);
214                         for (val=0; val <256; val++)
215                                 printf("%x ", buf[val+256]);
216                         printf("\n");
217                         for (;;);
218                         return 1;
219                 }
220         }
221
222         return 0;
223 }
224
225 /* read from the 16 bytes of oob data that correspond to a 512 byte page.
226  */
227 static int nand_read_oob(u_char *buf, ulong page_addr)
228 {
229         u16 val;
230         int cntr;
231         
232         NAND_ENABLE_CE();  /* set pin low */
233         NanD_Command(NAND_CMD_READOOB);
234         NanD_Address(ADDR_COLUMN_PAGE, page_addr);
235         NAND_WAIT_READY();
236
237 /*      do {
238                 *(volatile u32 *)(0x6800A07c) = NAND_CMD_STATUS;
239           val = *(volatile u32 *)(0x6800A084);
240           printf("val = %x\n", val);    
241         } while ((val & 0x40) != 0x40);
242 */
243         /* the above code from OSTBoot doesn't work, we use delay */
244         delay(500); /* we go through NFC need a bigger delay. 200 is not enough */
245  
246         for (cntr = 0; cntr < 8; cntr++){
247                 val = READ_NAND(NAND_ADDR);
248                 *buf++ = val & 0xff;
249                 *buf++ = val >> 8;
250         }
251   
252         NAND_WAIT_READY();
253         NAND_DISABLE_CE();  /* set pin high */
254
255         return 0;
256 }
257
258 #endif