drivers/i2c/chips/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  * Current status:
  21  *      - HS USB ULPI mode works.
  22  *      - 3-pin mode support may be added in future.
  23  */
  24
  25
  26 #include <linux/module.h>
  27 #include <linux/init.h>
  28 #include <linux/time.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/usb.h>
  31 #include <linux/usb/ch9.h>
  32 #include <linux/usb/gadget.h>
  33 #include <linux/usb/otg.h>
  34 #include <linux/i2c/twl4030.h>
  35 #include <asm/arch/usb.h>
  36
  37 /* Register defines */
  38
  39 #define VENDOR_ID_LO                    0x00
  40 #define VENDOR_ID_HI                    0x01
  41 #define PRODUCT_ID_LO                   0x02
  42 #define PRODUCT_ID_HI                   0x03
  43
  44 #define FUNC_CTRL                       0x04
  45 #define FUNC_CTRL_SET                   0x05
  46 #define FUNC_CTRL_CLR                   0x06
  47 #define FUNC_CTRL_SUSPENDM              (1 << 6)
  48 #define FUNC_CTRL_RESET                 (1 << 5)
  49 #define FUNC_CTRL_OPMODE_MASK           (3 << 3) /* bits 3 and 4 */
  50 #define FUNC_CTRL_OPMODE_NORMAL         (0 << 3)
  51 #define FUNC_CTRL_OPMODE_NONDRIVING     (1 << 3)
  52 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI       (2 << 3)
  53 #define FUNC_CTRL_TERMSELECT            (1 << 2)
  54 #define FUNC_CTRL_XCVRSELECT_MASK       (3 << 0) /* bits 0 and 1 */
  55 #define FUNC_CTRL_XCVRSELECT_HS         (0 << 0)
  56 #define FUNC_CTRL_XCVRSELECT_FS         (1 << 0)
  57 #define FUNC_CTRL_XCVRSELECT_LS         (2 << 0)
  58 #define FUNC_CTRL_XCVRSELECT_FS4LS      (3 << 0)
  59
  60 #define IFC_CTRL                        0x07
  61 #define IFC_CTRL_SET                    0x08
  62 #define IFC_CTRL_CLR                    0x09
  63 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE      (1 << 7)
  64 #define IFC_CTRL_AUTORESUME             (1 << 4)
  65 #define IFC_CTRL_CLOCKSUSPENDM          (1 << 3)
  66 #define IFC_CTRL_CARKITMODE             (1 << 2)
  67 #define IFC_CTRL_FSLSSERIALMODE_3PIN    (1 << 1)
  68
  69 #define OTG_CTRL                        0x0A
  70 #define OTG_CTRL_SET                    0x0B
  71 #define OTG_CTRL_CLR                    0x0C
  72 #define OTG_CTRL_DRVVBUS                (1 << 5)
  73 #define OTG_CTRL_CHRGVBUS               (1 << 4)
  74 #define OTG_CTRL_DISCHRGVBUS            (1 << 3)
  75 #define OTG_CTRL_DMPULLDOWN             (1 << 2)
  76 #define OTG_CTRL_DPPULLDOWN             (1 << 1)
  77 #define OTG_CTRL_IDPULLUP               (1 << 0)
  78
  79 #define USB_INT_EN_RISE                 0x0D
  80 #define USB_INT_EN_RISE_SET             0x0E
  81 #define USB_INT_EN_RISE_CLR             0x0F
  82 #define USB_INT_EN_FALL                 0x10
  83 #define USB_INT_EN_FALL_SET             0x11
  84 #define USB_INT_EN_FALL_CLR             0x12
  85 #define USB_INT_STS                     0x13
  86 #define USB_INT_LATCH                   0x14
  87 #define USB_INT_IDGND                   (1 << 4)
  88 #define USB_INT_SESSEND                 (1 << 3)
  89 #define USB_INT_SESSVALID               (1 << 2)
  90 #define USB_INT_VBUSVALID               (1 << 1)
  91 #define USB_INT_HOSTDISCONNECT          (1 << 0)
  92
  93 #define CARKIT_CTRL                     0x19
  94 #define CARKIT_CTRL_SET                 0x1A
  95 #define CARKIT_CTRL_CLR                 0x1B
  96 #define CARKIT_CTRL_MICEN               (1 << 6)
  97 #define CARKIT_CTRL_SPKRIGHTEN          (1 << 5)
  98 #define CARKIT_CTRL_SPKLEFTEN           (1 << 4)
  99 #define CARKIT_CTRL_RXDEN               (1 << 3)
 100 #define CARKIT_CTRL_TXDEN               (1 << 2)
 101 #define CARKIT_CTRL_IDGNDDRV            (1 << 1)
 102 #define CARKIT_CTRL_CARKITPWR           (1 << 0)
 103 #define CARKIT_PLS_CTRL                 0x22
 104 #define CARKIT_PLS_CTRL_SET             0x23
 105 #define CARKIT_PLS_CTRL_CLR             0x24
 106 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN        (1 << 3)
 107 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
 108 #define CARKIT_PLS_CTRL_RXPLSEN         (1 << 1)
 109 #define CARKIT_PLS_CTRL_TXPLSEN         (1 << 0)
 110
 111 #define MCPC_CTRL                       0x30
 112 #define MCPC_CTRL_SET                   0x31
 113 #define MCPC_CTRL_CLR                   0x32
 114 #define MCPC_CTRL_RTSOL                 (1 << 7)
 115 #define MCPC_CTRL_EXTSWR                (1 << 6)
 116 #define MCPC_CTRL_EXTSWC                (1 << 5)
 117 #define MCPC_CTRL_VOICESW               (1 << 4)
 118 #define MCPC_CTRL_OUT64K                (1 << 3)
 119 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
 120 #define MCPC_CTRL_HS_UART               (1 << 0)
 121
 122 #define MCPC_IO_CTRL                    0x33
 123 #define MCPC_IO_CTRL_SET                0x34
 124 #define MCPC_IO_CTRL_CLR                0x35
 125 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
 126 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
 127 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
 128 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
 129 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
 130 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
 131
 132 #define MCPC_CTRL2                      0x36
 133 #define MCPC_CTRL2_SET                  0x37
 134 #define MCPC_CTRL2_CLR                  0x38
 135 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
 136
 137 #define OTHER_FUNC_CTRL                 0x80
 138 #define OTHER_FUNC_CTRL_SET             0x81
 139 #define OTHER_FUNC_CTRL_CLR             0x82
 140 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
 141 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
 142
 143 #define OTHER_IFC_CTRL                  0x83
 144 #define OTHER_IFC_CTRL_SET              0x84
 145 #define OTHER_IFC_CTRL_CLR              0x85
 146 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
 147 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
 148 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
 149 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
 150 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
 151 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
 152
 153 #define OTHER_INT_EN_RISE               0x86
 154 #define OTHER_INT_EN_RISE_SET           0x87
 155 #define OTHER_INT_EN_RISE_CLR           0x88
 156 #define OTHER_INT_EN_FALL               0x89
 157 #define OTHER_INT_EN_FALL_SET           0x8A
 158 #define OTHER_INT_EN_FALL_CLR           0x8B
 159 #define OTHER_INT_STS                   0x8C
 160 #define OTHER_INT_LATCH                 0x8D
 161 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
 162 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
 163 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
 164 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
 165 #define OTHER_INT_MANU                  (1 << 1)
 166 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
 167
 168 #define ID_STATUS                       0x96
 169 #define ID_RES_FLOAT                    (1 << 4)
 170 #define ID_RES_440K                     (1 << 3)
 171 #define ID_RES_200K                     (1 << 2)
 172 #define ID_RES_102K                     (1 << 1)
 173 #define ID_RES_GND                      (1 << 0)
 174
 175 #define POWER_CTRL                      0xAC
 176 #define POWER_CTRL_SET                  0xAD
 177 #define POWER_CTRL_CLR                  0xAE
 178 #define POWER_CTRL_OTG_ENAB             (1 << 5)
 179
 180 #define OTHER_IFC_CTRL2                 0xAF
 181 #define OTHER_IFC_CTRL2_SET             0xB0
 182 #define OTHER_IFC_CTRL2_CLR             0xB1
 183 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 184 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 185 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 186 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 187 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 188 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 189
 190 #define REG_CTRL_EN                     0xB2
 191 #define REG_CTRL_EN_SET                 0xB3
 192 #define REG_CTRL_EN_CLR                 0xB4
 193 #define REG_CTRL_ERROR                  0xB5
 194 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 195
 196 #define OTHER_FUNC_CTRL2                0xB8
 197 #define OTHER_FUNC_CTRL2_SET            0xB9
 198 #define OTHER_FUNC_CTRL2_CLR            0xBA
 199 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 200
 201 /* following registers do not have separate _clr and _set registers */
 202 #define VBUS_DEBOUNCE                   0xC0
 203 #define ID_DEBOUNCE                     0xC1
 204 #define VBAT_TIMER                      0xD3
 205 #define PHY_PWR_CTRL                    0xFD
 206 #define PHY_PWR_PHYPWD                  (1 << 0)
 207 #define PHY_CLK_CTRL                    0xFE
 208 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 209 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 210 #define REQ_PHY_DPLL_CLK                (1 << 0)
 211 #define PHY_CLK_CTRL_STS                0xFF
 212 #define PHY_DPLL_CLK                    (1 << 0)
 213
 214 /* In module TWL4030_MODULE_PM_MASTER */
 215 #define PROTECT_KEY                     0x0E
 216
 217 /* In module TWL4030_MODULE_PM_RECEIVER */
 218 #define VUSB_DEDICATED1                 0x7D
 219 #define VUSB_DEDICATED2                 0x7E
 220 #define VUSB1V5_DEV_GRP                 0x71
 221 #define VUSB1V5_TYPE                    0x72
 222 #define VUSB1V5_REMAP                   0x73
 223 #define VUSB1V8_DEV_GRP                 0x74
 224 #define VUSB1V8_TYPE                    0x75
 225 #define VUSB1V8_REMAP                   0x76
 226 #define VUSB3V1_DEV_GRP                 0x77
 227 #define VUSB3V1_TYPE                    0x78
 228 #define VUSB3V1_REMAP                   0x79
 229
 230 #define ID_STATUS                       0x96
 231 #define ID_RES_FLOAT                    (1 << 4) /* mini-B */
 232 #define ID_RES_440K                     (1 << 3) /* type 2 charger */
 233 #define ID_RES_200K                     (1 << 2) /* 5-wire carkit or
 234                                                     type 1 charger */
 235 #define ID_RES_102K                     (1 << 1) /* phone */
 236 #define ID_RES_GND                      (1 << 0) /* mini-A */
 237
 238 /* In module TWL4030_MODULE_INTBR */
 239 #define PMBR1                           0x0D
 240 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 241
 242 /* In module TWL4030_MODULE_INT */
 243 #define REG_PWR_ISR1                    0x00
 244 #define REG_PWR_IMR1                    0x01
 245 #define USB_PRES                        (1 << 2)
 246 #define REG_PWR_EDR1                    0x05
 247 #define USB_PRES_FALLING                (1 << 4)
 248 #define USB_PRES_RISING                 (1 << 5)
 249 #define REG_PWR_SIH_CTRL                0x07
 250 #define COR                             (1 << 2)
 251
 252 /* internal define on top of container_of */
 253 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg);
 254
 255 /* bits in OTG_CTRL_REG */
 256
 257 #define OTG_XCEIV_OUTPUTS \
 258         (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
 259 #define OTG_XCEIV_INPUTS \
 260         (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
 261 #define OTG_CTRL_BITS \
 262         (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
 263         /* and OTG_PULLUP is sometimes written */
 264
 265 #define OTG_CTRL_MASK   (OTG_DRIVER_SEL| \
 266         OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
 267         OTG_CTRL_BITS)
 268
 269
 270 /*-------------------------------------------------------------------------*/
 271
 272 struct twl4030_usb {
 273         struct otg_transceiver  otg;
 274         int                     irq;
 275         u8                      usb_mode;       /* pin configuration */
 276 #define T2_USB_MODE_ULPI                1
 277 /* #define T2_USB_MODE_CEA2011_3PIN     2 */
 278         u8                      asleep;
 279 };
 280
 281 static struct twl4030_usb *the_transceiver;
 282
 283 /*-------------------------------------------------------------------------*/
 284
 285 static int twl4030_i2c_write_u8_verify(u8 module, u8 data, u8 address)
 286 {
 287         u8 check;
 288
 289         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 290             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 291                                                 (check == data))
 292                 return 0;
 293         /* Failed once: Try again */
 294         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 295             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 296                                                 (check == data))
 297                 return 0;
 298         /* Failed again: Return error */
 299         return -EBUSY;
 300 }
 301
 302 #define twl4030_usb_write_verify(address, data) \
 303         twl4030_i2c_write_u8_verify(TWL4030_MODULE_USB, (data), (address))
 304
 305 static inline int twl4030_usb_write(u8 address, u8 data)
 306 {
 307         int ret = 0;
 308         ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 309         if (ret >= 0) {
 310 #if 0   /* debug */
 311                 u8 data1;
 312                 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
 313                                         address) < 0)
 314                         printk(KERN_ERR "re-read failed\n");
 315                 else
 316                         printk(KERN_INFO
 317                                "Write %s wrote %x read %x from reg %x\n",
 318                                (data1 == data) ? "succeed" : "mismatch",
 319                                data, data1, address);
 320 #endif
 321         } else {
 322                 printk(KERN_WARNING
 323                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 324         }
 325         return ret;
 326 }
 327
 328 static inline int twl4030_usb_read(u8 address)
 329 {
 330         u8 data;
 331         int ret = 0;
 332         ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
 333         if (ret >= 0) {
 334                 ret = data;
 335         } else {
 336                 printk(KERN_WARNING
 337                         "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
 338         }
 339         return ret;
 340 }
 341
 342 /*-------------------------------------------------------------------------*/
 343
 344 static inline int
 345 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 346 {
 347         return twl4030_usb_write(reg + 1, bits);
 348 }
 349
 350 static inline int
 351 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 352 {
 353         return twl4030_usb_write(reg + 2, bits);
 354
 355 }
 356
 357 /*-------------------------------------------------------------------------*/
 358
 359 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 360 {
 361         twl->usb_mode = mode;
 362
 363         switch (mode) {
 364         case T2_USB_MODE_ULPI:
 365                 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
 366                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 367                 twl4030_usb_clear_bits(twl, FUNC_CTRL,
 368                                         FUNC_CTRL_XCVRSELECT_MASK |
 369                                         FUNC_CTRL_OPMODE_MASK);
 370                 break;
 371 /*
 372         case T2_USB_MODE_CEA2011_3PIN:
 373                 twl4030_cea2011_3_pin_FS_setup(twl);
 374                 break;
 375 */
 376         default:
 377                 /* FIXME: power on defaults */
 378                 break;
 379         };
 380 }
 381
 382 #ifdef CONFIG_TWL4030_USB_HS_ULPI
 383 static void hs_usb_init(struct twl4030_usb *twl)
 384 {
 385         twl->usb_mode = T2_USB_MODE_ULPI;
 386         return;
 387 }
 388
 389 #endif
 390
 391 static void twl4030_i2c_access(int on)
 392 {
 393         unsigned long timeout;
 394         int val = twl4030_usb_read(PHY_CLK_CTRL);
 395
 396         if (val >= 0) {
 397                 if (on) {
 398                         /* enable DPLL to access PHY registers over I2C */
 399                         val |= REQ_PHY_DPLL_CLK;
 400                         if (twl4030_usb_write_verify(PHY_CLK_CTRL,
 401                                                                 (u8)val) < 0) {
 402                                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 403                                                 " line %d\n", __LINE__);
 404                                 return;
 405                         }
 406
 407                         timeout = jiffies + HZ;
 408                         while (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
 409                                                         PHY_DPLL_CLK)
 410                                 && time_before(jiffies, timeout))
 411                                         udelay(10);
 412                         if (!(twl4030_usb_read(PHY_CLK_CTRL_STS) &
 413                                                         PHY_DPLL_CLK))
 414                                 printk(KERN_ERR "Timeout setting T2 HSUSB "
 415                                                 "PHY DPLL clock\n");
 416                 } else {
 417                         /* let ULPI control the DPLL clock */
 418                         val &= ~REQ_PHY_DPLL_CLK;
 419                         if (twl4030_usb_write_verify(PHY_CLK_CTRL,
 420                                                                 (u8)val) < 0) {
 421                                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 422                                                 " line %d\n", __LINE__);
 423                         }
 424                 }
 425         }
 426         return;
 427 }
 428
 429 static void usb_irq_enable(int rising, int falling)
 430 {
 431         u8 val;
 432
 433         /* edge setup */
 434         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
 435                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 436                                 " line %d\n", __LINE__);
 437                 return;
 438         }
 439         val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
 440         if (rising)
 441                 val = val | USB_PRES_RISING;
 442         if (falling)
 443                 val = val | USB_PRES_FALLING;
 444         if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
 445                                                         REG_PWR_EDR1) < 0) {
 446                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 447                                 " line %d\n", __LINE__);
 448                 return;
 449         }
 450
 451         /* un-mask interrupt */
 452         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
 453                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 454                                 " line %d\n", __LINE__);
 455                 return;
 456         }
 457         val &= ~USB_PRES;
 458         if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
 459                                                         REG_PWR_IMR1) < 0)
 460                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 461                                 " line %d\n", __LINE__);
 462
 463         return;
 464 }
 465
 466 static void usb_irq_disable(void)
 467 {
 468         u8 val;
 469
 470         /* undo edge setup */
 471         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
 472                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 473                                 " line %d\n", __LINE__);
 474                 return;
 475         }
 476         val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
 477         if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
 478                                                         REG_PWR_EDR1) < 0) {
 479                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 480                                 " line %d\n", __LINE__);
 481                 return;
 482         }
 483
 484         /* mask interrupt */
 485         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_IMR1) < 0) {
 486                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 487                                 " line %d\n", __LINE__);
 488                 return;
 489         }
 490         val |= USB_PRES;
 491         if (twl4030_i2c_write_u8_verify(TWL4030_MODULE_INT, val,
 492                                                         REG_PWR_IMR1) < 0)
 493                 printk(KERN_ERR "twl4030_usb: i2c write failed,"
 494                                 " line %d\n", __LINE__);
 495
 496         return;
 497 }
 498
 499 static void twl4030_phy_suspend(int controller_off);
 500 static void twl4030_phy_resume(void);
 501
 502 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 503 {
 504         int ret = IRQ_NONE;
 505         u8 val;
 506
 507         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_ISR1) < 0) {
 508                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 509                                 " line %d\n", __LINE__);
 510                 goto done;
 511         }
 512
 513         /* this interrupt line may be shared */
 514         if (!(val & USB_PRES))
 515                 goto done;
 516
 517         /* clear the interrupt */
 518         twl4030_i2c_write_u8(TWL4030_MODULE_INT, USB_PRES, REG_PWR_ISR1);
 519
 520         /* action based on cable attach or detach */
 521         if (twl4030_i2c_read_u8(TWL4030_MODULE_INT, &val, REG_PWR_EDR1) < 0) {
 522                 printk(KERN_ERR "twl4030_usb: i2c read failed,"
 523                                 " line %d\n", __LINE__);
 524                 goto done;
 525         }
 526
 527         if (val & USB_PRES_RISING)
 528                 twl4030_phy_resume();
 529         else
 530                 twl4030_phy_suspend(0);
 531
 532         ret = IRQ_HANDLED;
 533
 534 done:
 535         return ret;
 536 }
 537
 538 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 539 {
 540         u8 pwr;
 541
 542         pwr = twl4030_usb_read(PHY_PWR_CTRL);
 543         if (on) {
 544                 pwr &= ~PHY_PWR_PHYPWD;
 545                 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
 546                         printk(KERN_ERR "twl4030_usb: i2c write failed,"
 547                                         " line %d\n", __LINE__);
 548                         return;
 549                 }
 550                 twl4030_usb_write(PHY_CLK_CTRL,
 551                                   twl4030_usb_read(PHY_CLK_CTRL) |
 552                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 553                                                 PHY_CLK_CTRL_CLK32K_EN));
 554         } else  {
 555                 pwr |= PHY_PWR_PHYPWD;
 556                 if (twl4030_usb_write_verify(PHY_PWR_CTRL, pwr) < 0) {
 557                         printk(KERN_ERR "twl4030_usb: i2c write failed,"
 558                                         " line %d\n", __LINE__);
 559                 }
 560         }
 561         return;
 562 }
 563
 564 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
 565 {
 566         /* Enable writing to power configuration registers */
 567         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
 568         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
 569
 570         /* put VUSB3V1 LDO in active state */
 571         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
 572
 573         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 574         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 575
 576         /* turn on 3.1V regulator */
 577         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
 578         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 579
 580         /* turn on 1.5V regulator */
 581         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
 582         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 583
 584         /* turn on 1.8V regulator */
 585         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
 586         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 587
 588         /* disable access to power configuration registers */
 589         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, PROTECT_KEY);
 590 }
 591
 592 static void twl4030_phy_suspend(int controller_off)
 593 {
 594         struct twl4030_usb *twl = the_transceiver;
 595
 596         if (controller_off)
 597                 usb_irq_disable();
 598
 599         if (twl->asleep)
 600                 return;
 601
 602         if (!controller_off)
 603                 /* enable rising edge interrupt to detect cable attach */
 604                 usb_irq_enable(1, 0);
 605
 606         twl4030_phy_power(twl, 0);
 607         twl->asleep = 1;
 608         return;
 609 }
 610
 611 static void twl4030_phy_resume(void)
 612 {
 613         struct twl4030_usb *twl = the_transceiver;
 614
 615         if (!twl->asleep)
 616                 return;
 617
 618         /* enable falling edge interrupt to detect cable detach */
 619         usb_irq_enable(0, 1);
 620
 621         twl4030_phy_power(twl, 1);
 622         twl4030_i2c_access(1);
 623         twl4030_usb_set_mode(twl, twl->usb_mode);
 624         if (twl->usb_mode == T2_USB_MODE_ULPI)
 625                 twl4030_i2c_access(0);
 626         twl->asleep = 0;
 627         return;
 628 }
 629
 630 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
 631 {
 632         if (suspend)
 633                 twl4030_phy_suspend(1);
 634         else
 635                 twl4030_phy_resume();
 636
 637         return 0;
 638 }
 639
 640 static int twl4030_set_peripheral(struct otg_transceiver *xceiv, struct usb_gadget *gadget)
 641 {
 642         struct twl4030_usb *twl = xceiv_to_twl(xceiv);
 643
 644         if (!xceiv)
 645                 return -ENODEV;
 646
 647         if (!gadget) {
 648                 OTG_IRQ_EN_REG = 0;
 649                 twl4030_phy_suspend(1);
 650                 twl->otg.gadget = NULL;
 651
 652                 return -ENODEV;
 653         }
 654
 655         twl->otg.gadget = gadget;
 656         twl4030_phy_resume();
 657
 658         OTG_CTRL_REG = (OTG_CTRL_REG & OTG_CTRL_MASK
 659                         & ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS))
 660                         | OTG_ID;
 661
 662         twl->otg.state = OTG_STATE_B_IDLE;
 663
 664         twl4030_usb_set_bits(twl, USB_INT_EN_RISE,
 665                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 666         twl4030_usb_set_bits(twl, USB_INT_EN_FALL,
 667                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 668
 669         return 0;
 670 }
 671
 672 static int twl4030_set_host(struct otg_transceiver *xceiv, struct usb_bus *host)
 673 {
 674         struct twl4030_usb *twl = xceiv_to_twl(xceiv);
 675
 676         if (!xceiv)
 677                 return -ENODEV;
 678
 679         if (!host) {
 680                 OTG_IRQ_EN_REG = 0;
 681                 twl4030_phy_suspend(1);
 682                 twl->otg.host = NULL;
 683
 684                 return -ENODEV;
 685         }
 686
 687         twl->otg.host = host;
 688         twl4030_phy_resume();
 689
 690         twl4030_usb_set_bits(twl, OTG_CTRL,
 691                         OTG_CTRL_DMPULLDOWN | OTG_CTRL_DPPULLDOWN);
 692         twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_IDGND);
 693         twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_IDGND);
 694         twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM);
 695         twl4030_usb_set_bits(twl, OTG_CTRL, OTG_CTRL_DRVVBUS);
 696
 697         return 0;
 698 }
 699
 700 static int __init twl4030_usb_init(void)
 701 {
 702         struct twl4030_usb      *twl;
 703         int status;
 704
 705         if (the_transceiver)
 706                 return 0;
 707
 708         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 709         if (!twl)
 710                 return 0;
 711
 712         the_transceiver = twl;
 713
 714         twl->irq                = TWL4030_MODIRQ_PWR;
 715         twl->otg.set_host       = twl4030_set_host;
 716         twl->otg.set_peripheral = twl4030_set_peripheral;
 717         twl->otg.set_suspend    = twl4030_set_suspend;
 718
 719         usb_irq_disable();
 720         status = request_irq(twl->irq, twl4030_usb_irq,
 721                 IRQF_DISABLED | IRQF_SHARED, "twl4030_usb", twl);
 722         if (status < 0) {
 723                 printk(KERN_DEBUG "can't get IRQ %d, err %d\n",
 724                         twl->irq, status);
 725                 kfree(twl);
 726                 return -ENODEV;
 727         }
 728
 729 #if defined(CONFIG_TWL4030_USB_HS_ULPI)
 730         hs_usb_init(twl);
 731 #endif
 732         twl4030_usb_ldo_init(twl);
 733         twl4030_phy_power(twl, 1);
 734         twl4030_i2c_access(1);
 735         twl4030_usb_set_mode(twl, twl->usb_mode);
 736         if (twl->usb_mode == T2_USB_MODE_ULPI)
 737                 twl4030_i2c_access(0);
 738
 739         twl->asleep = 0;
 740
 741         if (twl->usb_mode == T2_USB_MODE_ULPI)
 742                 twl4030_phy_suspend(1);
 743
 744         otg_set_transceiver(&twl->otg);
 745
 746         printk(KERN_INFO "Initialized TWL4030 USB module");
 747
 748         return 0;
 749 }
 750
 751
 752 static void __exit twl4030_usb_exit(void)
 753 {
 754         struct twl4030_usb *twl = the_transceiver;
 755         int val;
 756
 757         usb_irq_disable();
 758         free_irq(twl->irq, twl);
 759
 760         /* set transceiver mode to power on defaults */
 761         twl4030_usb_set_mode(twl, -1);
 762
 763         /* autogate 60MHz ULPI clock,
 764          * clear dpll clock request for i2c access,
 765          * disable 32KHz
 766          */
 767         val = twl4030_usb_read(PHY_CLK_CTRL);
 768         if (val >= 0) {
 769                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 770                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 771                 twl4030_usb_write(PHY_CLK_CTRL, (u8)val);
 772         }
 773
 774         /* disable complete OTG block */
 775         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 776
 777         twl4030_phy_power(twl, 0);
 778
 779         kfree(twl);
 780 }
 781
 782 subsys_initcall(twl4030_usb_init);
 783 module_exit(twl4030_usb_exit);
 784
 785 MODULE_AUTHOR("Texas Instruments, Inc.");
 786 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 787 MODULE_LICENSE("GPL");