drivers/hwmon/w83627ehf.c

   1 /*
   2     w83627ehf - Driver for the hardware monitoring functionality of
   3                 the Winbond W83627EHF Super-I/O chip
   4     Copyright (C) 2005  Jean Delvare <khali@linux-fr.org>
   5     Copyright (C) 2006  Yuan Mu (Winbond),
   6                         Rudolf Marek <r.marek@assembler.cz>
   7                         David Hubbard <david.c.hubbard@gmail.com>
   8                         Daniel J Blueman <daniel.blueman@gmail.com>
   9     Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  10
  11     Shamelessly ripped from the w83627hf driver
  12     Copyright (C) 2003  Mark Studebaker
  13
  14     Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
  15     in testing and debugging this driver.
  16
  17     This driver also supports the W83627EHG, which is the lead-free
  18     version of the W83627EHF.
  19
  20     This program is free software; you can redistribute it and/or modify
  21     it under the terms of the GNU General Public License as published by
  22     the Free Software Foundation; either version 2 of the License, or
  23     (at your option) any later version.
  24
  25     This program is distributed in the hope that it will be useful,
  26     but WITHOUT ANY WARRANTY; without even the implied warranty of
  27     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28     GNU General Public License for more details.
  29
  30     You should have received a copy of the GNU General Public License
  31     along with this program; if not, write to the Free Software
  32     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  33
  34
  35     Supports the following chips:
  36
  37     Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  38     w83627ehf   10      5       4       3      0x8850 0x88    0x5ca3
  39                                                0x8860 0xa1
  40     w83627dhg    9      5       4       3      0xa020 0xc1    0x5ca3
  41     w83627dhg-p  9      5       4       3      0xb070 0xc1    0x5ca3
  42     w83667hg     9      5       3       3      0xa510 0xc1    0x5ca3
  43     w83667hg-b   9      5       3       4      0xb350 0xc1    0x5ca3
  44     nct6775f     9      4       3       9      0xb470 0xc1    0x5ca3
  45     nct6776f     9      5       3       9      0xC330 0xc1    0x5ca3
  46 */
  47
  48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/slab.h>
  53 #include <linux/jiffies.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/hwmon.h>
  56 #include <linux/hwmon-sysfs.h>
  57 #include <linux/hwmon-vid.h>
  58 #include <linux/err.h>
  59 #include <linux/mutex.h>
  60 #include <linux/acpi.h>
  61 #include <linux/io.h>
  62 #include "lm75.h"
  63
  64 enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg, w83667hg_b, nct6775,
  65         nct6776 };
  66
  67 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
  68 static const char * const w83627ehf_device_names[] = {
  69         "w83627ehf",
  70         "w83627dhg",
  71         "w83627dhg",
  72         "w83667hg",
  73         "w83667hg",
  74         "nct6775",
  75         "nct6776",
  76 };
  77
  78 static unsigned short force_id;
  79 module_param(force_id, ushort, 0);
  80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  81
  82 static unsigned short fan_debounce;
  83 module_param(fan_debounce, ushort, 0);
  84 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  85
  86 #define DRVNAME "w83627ehf"
  87
  88 /*
  89  * Super-I/O constants and functions
  90  */
  91
  92 #define W83627EHF_LD_HWM        0x0b
  93 #define W83667HG_LD_VID         0x0d
  94
  95 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  96 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  97 #define SIO_REG_EN_VRM10        0x2C    /* GPIO3, GPIO4 selection */
  98 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  99 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 100 #define SIO_REG_VID_CTRL        0xF0    /* VID control */
 101 #define SIO_REG_VID_DATA        0xF1    /* VID data */
 102
 103 #define SIO_W83627EHF_ID        0x8850
 104 #define SIO_W83627EHG_ID        0x8860
 105 #define SIO_W83627DHG_ID        0xa020
 106 #define SIO_W83627DHG_P_ID      0xb070
 107 #define SIO_W83667HG_ID         0xa510
 108 #define SIO_W83667HG_B_ID       0xb350
 109 #define SIO_NCT6775_ID          0xb470
 110 #define SIO_NCT6776_ID          0xc330
 111 #define SIO_ID_MASK             0xFFF0
 112
 113 static inline void
 114 superio_outb(int ioreg, int reg, int val)
 115 {
 116         outb(reg, ioreg);
 117         outb(val, ioreg + 1);
 118 }
 119
 120 static inline int
 121 superio_inb(int ioreg, int reg)
 122 {
 123         outb(reg, ioreg);
 124         return inb(ioreg + 1);
 125 }
 126
 127 static inline void
 128 superio_select(int ioreg, int ld)
 129 {
 130         outb(SIO_REG_LDSEL, ioreg);
 131         outb(ld, ioreg + 1);
 132 }
 133
 134 static inline void
 135 superio_enter(int ioreg)
 136 {
 137         outb(0x87, ioreg);
 138         outb(0x87, ioreg);
 139 }
 140
 141 static inline void
 142 superio_exit(int ioreg)
 143 {
 144         outb(0xaa, ioreg);
 145         outb(0x02, ioreg);
 146         outb(0x02, ioreg + 1);
 147 }
 148
 149 /*
 150  * ISA constants
 151  */
 152
 153 #define IOREGION_ALIGNMENT      (~7)
 154 #define IOREGION_OFFSET         5
 155 #define IOREGION_LENGTH         2
 156 #define ADDR_REG_OFFSET         0
 157 #define DATA_REG_OFFSET         1
 158
 159 #define W83627EHF_REG_BANK              0x4E
 160 #define W83627EHF_REG_CONFIG            0x40
 161
 162 /* Not currently used:
 163  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 164  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 165  * REG_MAN_ID is at port 0x4f
 166  * REG_CHIP_ID is at port 0x58 */
 167
 168 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
 169 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
 170
 171 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
 172 #define W83627EHF_REG_IN_MAX(nr)        ((nr < 7) ? (0x2b + (nr) * 2) : \
 173                                          (0x554 + (((nr) - 7) * 2)))
 174 #define W83627EHF_REG_IN_MIN(nr)        ((nr < 7) ? (0x2c + (nr) * 2) : \
 175                                          (0x555 + (((nr) - 7) * 2)))
 176 #define W83627EHF_REG_IN(nr)            ((nr < 7) ? (0x20 + (nr)) : \
 177                                          (0x550 + (nr) - 7))
 178
 179 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
 180 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
 181 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
 182 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
 183
 184 /* Fan clock dividers are spread over the following five registers */
 185 #define W83627EHF_REG_FANDIV1           0x47
 186 #define W83627EHF_REG_FANDIV2           0x4B
 187 #define W83627EHF_REG_VBAT              0x5D
 188 #define W83627EHF_REG_DIODE             0x59
 189 #define W83627EHF_REG_SMI_OVT           0x4C
 190
 191 /* NCT6775F has its own fan divider registers */
 192 #define NCT6775_REG_FANDIV1             0x506
 193 #define NCT6775_REG_FANDIV2             0x507
 194 #define NCT6775_REG_FAN_DEBOUNCE        0xf0
 195
 196 #define W83627EHF_REG_ALARM1            0x459
 197 #define W83627EHF_REG_ALARM2            0x45A
 198 #define W83627EHF_REG_ALARM3            0x45B
 199
 200 #define W83627EHF_REG_CASEOPEN_DET      0x42 /* SMI STATUS #2 */
 201 #define W83627EHF_REG_CASEOPEN_CLR      0x46 /* SMI MASK #3 */
 202
 203 /* SmartFan registers */
 204 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
 205 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
 206
 207 /* DC or PWM output fan configuration */
 208 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
 209         0x04,                   /* SYS FAN0 output mode and PWM mode */
 210         0x04,                   /* CPU FAN0 output mode and PWM mode */
 211         0x12,                   /* AUX FAN mode */
 212         0x62,                   /* CPU FAN1 mode */
 213 };
 214
 215 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
 216 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
 217
 218 /* FAN Duty Cycle, be used to control */
 219 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
 220 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
 221 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
 222
 223 /* Advanced Fan control, some values are common for all fans */
 224 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
 225 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
 226 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
 227
 228 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
 229                                                 = { 0xff, 0x67, 0xff, 0x69 };
 230 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
 231                                                 = { 0xff, 0x68, 0xff, 0x6a };
 232
 233 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
 234 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
 235                                                 = { 0x68, 0x6a, 0x6c };
 236
 237 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
 238 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
 239 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
 240 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
 241 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
 242 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
 243 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 244 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 245 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 246 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
 247
 248 static const u16 NCT6775_REG_TEMP[]
 249         = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
 250 static const u16 NCT6775_REG_TEMP_CONFIG[]
 251         = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
 252 static const u16 NCT6775_REG_TEMP_HYST[]
 253         = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
 254 static const u16 NCT6775_REG_TEMP_OVER[]
 255         = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
 256 static const u16 NCT6775_REG_TEMP_SOURCE[]
 257         = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
 258
 259 static const char *const w83667hg_b_temp_label[] = {
 260         "SYSTIN",
 261         "CPUTIN",
 262         "AUXTIN",
 263         "AMDTSI",
 264         "PECI Agent 1",
 265         "PECI Agent 2",
 266         "PECI Agent 3",
 267         "PECI Agent 4"
 268 };
 269
 270 static const char *const nct6775_temp_label[] = {
 271         "",
 272         "SYSTIN",
 273         "CPUTIN",
 274         "AUXTIN",
 275         "AMD SB-TSI",
 276         "PECI Agent 0",
 277         "PECI Agent 1",
 278         "PECI Agent 2",
 279         "PECI Agent 3",
 280         "PECI Agent 4",
 281         "PECI Agent 5",
 282         "PECI Agent 6",
 283         "PECI Agent 7",
 284         "PCH_CHIP_CPU_MAX_TEMP",
 285         "PCH_CHIP_TEMP",
 286         "PCH_CPU_TEMP",
 287         "PCH_MCH_TEMP",
 288         "PCH_DIM0_TEMP",
 289         "PCH_DIM1_TEMP",
 290         "PCH_DIM2_TEMP",
 291         "PCH_DIM3_TEMP"
 292 };
 293
 294 static const char *const nct6776_temp_label[] = {
 295         "",
 296         "SYSTIN",
 297         "CPUTIN",
 298         "AUXTIN",
 299         "SMBUSMASTER 0",
 300         "SMBUSMASTER 1",
 301         "SMBUSMASTER 2",
 302         "SMBUSMASTER 3",
 303         "SMBUSMASTER 4",
 304         "SMBUSMASTER 5",
 305         "SMBUSMASTER 6",
 306         "SMBUSMASTER 7",
 307         "PECI Agent 0",
 308         "PECI Agent 1",
 309         "PCH_CHIP_CPU_MAX_TEMP",
 310         "PCH_CHIP_TEMP",
 311         "PCH_CPU_TEMP",
 312         "PCH_MCH_TEMP",
 313         "PCH_DIM0_TEMP",
 314         "PCH_DIM1_TEMP",
 315         "PCH_DIM2_TEMP",
 316         "PCH_DIM3_TEMP",
 317         "BYTE_TEMP"
 318 };
 319
 320 #define NUM_REG_TEMP    ARRAY_SIZE(NCT6775_REG_TEMP)
 321
 322 static inline int is_word_sized(u16 reg)
 323 {
 324         return ((((reg & 0xff00) == 0x100
 325               || (reg & 0xff00) == 0x200)
 326              && ((reg & 0x00ff) == 0x50
 327               || (reg & 0x00ff) == 0x53
 328               || (reg & 0x00ff) == 0x55))
 329              || (reg & 0xfff0) == 0x630
 330              || reg == 0x640 || reg == 0x642
 331              || ((reg & 0xfff0) == 0x650
 332                  && (reg & 0x000f) >= 0x06)
 333              || reg == 0x73 || reg == 0x75 || reg == 0x77
 334                 );
 335 }
 336
 337 /*
 338  * Conversions
 339  */
 340
 341 /* 1 is PWM mode, output in ms */
 342 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
 343 {
 344         return mode ? 100 * reg : 400 * reg;
 345 }
 346
 347 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
 348 {
 349         return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
 350                                                 (msec + 200) / 400), 1, 255);
 351 }
 352
 353 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 354 {
 355         if (reg == 0 || reg == 255)
 356                 return 0;
 357         return 1350000U / (reg << divreg);
 358 }
 359
 360 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 361 {
 362         if ((reg & 0xff1f) == 0xff1f)
 363                 return 0;
 364
 365         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 366
 367         if (reg == 0)
 368                 return 0;
 369
 370         return 1350000U / reg;
 371 }
 372
 373 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 374 {
 375         if (reg == 0 || reg == 0xffff)
 376                 return 0;
 377
 378         /*
 379          * Even though the registers are 16 bit wide, the fan divisor
 380          * still applies.
 381          */
 382         return 1350000U / (reg << divreg);
 383 }
 384
 385 static inline unsigned int
 386 div_from_reg(u8 reg)
 387 {
 388         return 1 << reg;
 389 }
 390
 391 static inline int
 392 temp_from_reg(u16 reg, s16 regval)
 393 {
 394         if (is_word_sized(reg))
 395                 return LM75_TEMP_FROM_REG(regval);
 396         return ((s8)regval) * 1000;
 397 }
 398
 399 static inline u16
 400 temp_to_reg(u16 reg, long temp)
 401 {
 402         if (is_word_sized(reg))
 403                 return LM75_TEMP_TO_REG(temp);
 404         return (s8)DIV_ROUND_CLOSEST(SENSORS_LIMIT(temp, -127000, 128000),
 405                                      1000);
 406 }
 407
 408 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
 409
 410 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
 411
 412 static inline long in_from_reg(u8 reg, u8 nr)
 413 {
 414         return reg * scale_in[nr];
 415 }
 416
 417 static inline u8 in_to_reg(u32 val, u8 nr)
 418 {
 419         return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0,
 420                              255);
 421 }
 422
 423 /*
 424  * Data structures and manipulation thereof
 425  */
 426
 427 struct w83627ehf_data {
 428         int addr;       /* IO base of hw monitor block */
 429         const char *name;
 430
 431         struct device *hwmon_dev;
 432         struct mutex lock;
 433
 434         u16 reg_temp[NUM_REG_TEMP];
 435         u16 reg_temp_over[NUM_REG_TEMP];
 436         u16 reg_temp_hyst[NUM_REG_TEMP];
 437         u16 reg_temp_config[NUM_REG_TEMP];
 438         u8 temp_src[NUM_REG_TEMP];
 439         const char * const *temp_label;
 440
 441         const u16 *REG_PWM;
 442         const u16 *REG_TARGET;
 443         const u16 *REG_FAN;
 444         const u16 *REG_FAN_MIN;
 445         const u16 *REG_FAN_START_OUTPUT;
 446         const u16 *REG_FAN_STOP_OUTPUT;
 447         const u16 *REG_FAN_STOP_TIME;
 448         const u16 *REG_FAN_MAX_OUTPUT;
 449         const u16 *REG_FAN_STEP_OUTPUT;
 450
 451         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 452         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 453
 454         struct mutex update_lock;
 455         char valid;             /* !=0 if following fields are valid */
 456         unsigned long last_updated;     /* In jiffies */
 457
 458         /* Register values */
 459         u8 bank;                /* current register bank */
 460         u8 in_num;              /* number of in inputs we have */
 461         u8 in[10];              /* Register value */
 462         u8 in_max[10];          /* Register value */
 463         u8 in_min[10];          /* Register value */
 464         unsigned int rpm[5];
 465         u16 fan_min[5];
 466         u8 fan_div[5];
 467         u8 has_fan;             /* some fan inputs can be disabled */
 468         u8 has_fan_min;         /* some fans don't have min register */
 469         bool has_fan_div;
 470         u8 temp_type[3];
 471         s16 temp[9];
 472         s16 temp_max[9];
 473         s16 temp_max_hyst[9];
 474         u32 alarms;
 475         u8 caseopen;
 476
 477         u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
 478         u8 pwm_enable[4]; /* 1->manual
 479                              2->thermal cruise mode (also called SmartFan I)
 480                              3->fan speed cruise mode
 481                              4->variable thermal cruise (also called
 482                                 SmartFan III)
 483                              5->enhanced variable thermal cruise (also called
 484                                 SmartFan IV) */
 485         u8 pwm_enable_orig[4];  /* original value of pwm_enable */
 486         u8 pwm_num;             /* number of pwm */
 487         u8 pwm[4];
 488         u8 target_temp[4];
 489         u8 tolerance[4];
 490
 491         u8 fan_start_output[4]; /* minimum fan speed when spinning up */
 492         u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
 493         u8 fan_stop_time[4]; /* time at minimum before disabling fan */
 494         u8 fan_max_output[4]; /* maximum fan speed */
 495         u8 fan_step_output[4]; /* rate of change output value */
 496
 497         u8 vid;
 498         u8 vrm;
 499
 500         u16 have_temp;
 501         u8 in6_skip;
 502 };
 503
 504 struct w83627ehf_sio_data {
 505         int sioreg;
 506         enum kinds kind;
 507 };
 508
 509 /*
 510  * On older chips, only registers 0x50-0x5f are banked.
 511  * On more recent chips, all registers are banked.
 512  * Assume that is the case and set the bank number for each access.
 513  * Cache the bank number so it only needs to be set if it changes.
 514  */
 515 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
 516 {
 517         u8 bank = reg >> 8;
 518         if (data->bank != bank) {
 519                 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
 520                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 521                 data->bank = bank;
 522         }
 523 }
 524
 525 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
 526 {
 527         int res, word_sized = is_word_sized(reg);
 528
 529         mutex_lock(&data->lock);
 530
 531         w83627ehf_set_bank(data, reg);
 532         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 533         res = inb_p(data->addr + DATA_REG_OFFSET);
 534         if (word_sized) {
 535                 outb_p((reg & 0xff) + 1,
 536                        data->addr + ADDR_REG_OFFSET);
 537                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 538         }
 539
 540         mutex_unlock(&data->lock);
 541         return res;
 542 }
 543
 544 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
 545                                  u16 value)
 546 {
 547         int word_sized = is_word_sized(reg);
 548
 549         mutex_lock(&data->lock);
 550
 551         w83627ehf_set_bank(data, reg);
 552         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 553         if (word_sized) {
 554                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 555                 outb_p((reg & 0xff) + 1,
 556                        data->addr + ADDR_REG_OFFSET);
 557         }
 558         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
 559
 560         mutex_unlock(&data->lock);
 561         return 0;
 562 }
 563
 564 /* This function assumes that the caller holds data->update_lock */
 565 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
 566 {
 567         u8 reg;
 568
 569         switch (nr) {
 570         case 0:
 571                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
 572                     | (data->fan_div[0] & 0x7);
 573                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 574                 break;
 575         case 1:
 576                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
 577                     | ((data->fan_div[1] << 4) & 0x70);
 578                 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 579         case 2:
 580                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
 581                     | (data->fan_div[2] & 0x7);
 582                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 583                 break;
 584         case 3:
 585                 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
 586                     | ((data->fan_div[3] << 4) & 0x70);
 587                 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 588                 break;
 589         }
 590 }
 591
 592 /* This function assumes that the caller holds data->update_lock */
 593 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
 594 {
 595         u8 reg;
 596
 597         switch (nr) {
 598         case 0:
 599                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
 600                     | ((data->fan_div[0] & 0x03) << 4);
 601                 /* fan5 input control bit is write only, compute the value */
 602                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 603                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 604                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
 605                     | ((data->fan_div[0] & 0x04) << 3);
 606                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 607                 break;
 608         case 1:
 609                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
 610                     | ((data->fan_div[1] & 0x03) << 6);
 611                 /* fan5 input control bit is write only, compute the value */
 612                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 613                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 614                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
 615                     | ((data->fan_div[1] & 0x04) << 4);
 616                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 617                 break;
 618         case 2:
 619                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
 620                     | ((data->fan_div[2] & 0x03) << 6);
 621                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
 622                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
 623                     | ((data->fan_div[2] & 0x04) << 5);
 624                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 625                 break;
 626         case 3:
 627                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
 628                     | (data->fan_div[3] & 0x03);
 629                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 630                 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
 631                     | ((data->fan_div[3] & 0x04) << 5);
 632                 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
 633                 break;
 634         case 4:
 635                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
 636                     | ((data->fan_div[4] & 0x03) << 2)
 637                     | ((data->fan_div[4] & 0x04) << 5);
 638                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 639                 break;
 640         }
 641 }
 642
 643 static void w83627ehf_write_fan_div_common(struct device *dev,
 644                                            struct w83627ehf_data *data, int nr)
 645 {
 646         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 647
 648         if (sio_data->kind == nct6776)
 649                 ; /* no dividers, do nothing */
 650         else if (sio_data->kind == nct6775)
 651                 nct6775_write_fan_div(data, nr);
 652         else
 653                 w83627ehf_write_fan_div(data, nr);
 654 }
 655
 656 static void nct6775_update_fan_div(struct w83627ehf_data *data)
 657 {
 658         u8 i;
 659
 660         i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
 661         data->fan_div[0] = i & 0x7;
 662         data->fan_div[1] = (i & 0x70) >> 4;
 663         i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
 664         data->fan_div[2] = i & 0x7;
 665         if (data->has_fan & (1<<3))
 666                 data->fan_div[3] = (i & 0x70) >> 4;
 667 }
 668
 669 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
 670 {
 671         int i;
 672
 673         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
 674         data->fan_div[0] = (i >> 4) & 0x03;
 675         data->fan_div[1] = (i >> 6) & 0x03;
 676         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
 677         data->fan_div[2] = (i >> 6) & 0x03;
 678         i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
 679         data->fan_div[0] |= (i >> 3) & 0x04;
 680         data->fan_div[1] |= (i >> 4) & 0x04;
 681         data->fan_div[2] |= (i >> 5) & 0x04;
 682         if (data->has_fan & ((1 << 3) | (1 << 4))) {
 683                 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
 684                 data->fan_div[3] = i & 0x03;
 685                 data->fan_div[4] = ((i >> 2) & 0x03)
 686                                  | ((i >> 5) & 0x04);
 687         }
 688         if (data->has_fan & (1 << 3)) {
 689                 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
 690                 data->fan_div[3] |= (i >> 5) & 0x04;
 691         }
 692 }
 693
 694 static void w83627ehf_update_fan_div_common(struct device *dev,
 695                                             struct w83627ehf_data *data)
 696 {
 697         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 698
 699         if (sio_data->kind == nct6776)
 700                 ; /* no dividers, do nothing */
 701         else if (sio_data->kind == nct6775)
 702                 nct6775_update_fan_div(data);
 703         else
 704                 w83627ehf_update_fan_div(data);
 705 }
 706
 707 static void nct6775_update_pwm(struct w83627ehf_data *data)
 708 {
 709         int i;
 710         int pwmcfg, fanmodecfg;
 711
 712         for (i = 0; i < data->pwm_num; i++) {
 713                 pwmcfg = w83627ehf_read_value(data,
 714                                               W83627EHF_REG_PWM_ENABLE[i]);
 715                 fanmodecfg = w83627ehf_read_value(data,
 716                                                   NCT6775_REG_FAN_MODE[i]);
 717                 data->pwm_mode[i] =
 718                   ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 719                 data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
 720                 data->tolerance[i] = fanmodecfg & 0x0f;
 721                 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 722         }
 723 }
 724
 725 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
 726 {
 727         int i;
 728         int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
 729
 730         for (i = 0; i < data->pwm_num; i++) {
 731                 if (!(data->has_fan & (1 << i)))
 732                         continue;
 733
 734                 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
 735                 if (i != 1) {
 736                         pwmcfg = w83627ehf_read_value(data,
 737                                         W83627EHF_REG_PWM_ENABLE[i]);
 738                         tolerance = w83627ehf_read_value(data,
 739                                         W83627EHF_REG_TOLERANCE[i]);
 740                 }
 741                 data->pwm_mode[i] =
 742                         ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 743                 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
 744                                        & 3) + 1;
 745                 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 746
 747                 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
 748         }
 749 }
 750
 751 static void w83627ehf_update_pwm_common(struct device *dev,
 752                                         struct w83627ehf_data *data)
 753 {
 754         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 755
 756         if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
 757                 nct6775_update_pwm(data);
 758         else
 759                 w83627ehf_update_pwm(data);
 760 }
 761
 762 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
 763 {
 764         struct w83627ehf_data *data = dev_get_drvdata(dev);
 765         struct w83627ehf_sio_data *sio_data = dev->platform_data;
 766
 767         int i;
 768
 769         mutex_lock(&data->update_lock);
 770
 771         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
 772          || !data->valid) {
 773                 /* Fan clock dividers */
 774                 w83627ehf_update_fan_div_common(dev, data);
 775
 776                 /* Measured voltages and limits */
 777                 for (i = 0; i < data->in_num; i++) {
 778                         data->in[i] = w83627ehf_read_value(data,
 779                                       W83627EHF_REG_IN(i));
 780                         data->in_min[i] = w83627ehf_read_value(data,
 781                                           W83627EHF_REG_IN_MIN(i));
 782                         data->in_max[i] = w83627ehf_read_value(data,
 783                                           W83627EHF_REG_IN_MAX(i));
 784                 }
 785
 786                 /* Measured fan speeds and limits */
 787                 for (i = 0; i < 5; i++) {
 788                         u16 reg;
 789
 790                         if (!(data->has_fan & (1 << i)))
 791                                 continue;
 792
 793                         reg = w83627ehf_read_value(data, data->REG_FAN[i]);
 794                         data->rpm[i] = data->fan_from_reg(reg,
 795                                                           data->fan_div[i]);
 796
 797                         if (data->has_fan_min & (1 << i))
 798                                 data->fan_min[i] = w83627ehf_read_value(data,
 799                                            data->REG_FAN_MIN[i]);
 800
 801                         /* If we failed to measure the fan speed and clock
 802                            divider can be increased, let's try that for next
 803                            time */
 804                         if (data->has_fan_div
 805                             && (reg >= 0xff || (sio_data->kind == nct6775
 806                                                 && reg == 0x00))
 807                             && data->fan_div[i] < 0x07) {
 808                                 dev_dbg(dev, "Increasing fan%d "
 809                                         "clock divider from %u to %u\n",
 810                                         i + 1, div_from_reg(data->fan_div[i]),
 811                                         div_from_reg(data->fan_div[i] + 1));
 812                                 data->fan_div[i]++;
 813                                 w83627ehf_write_fan_div_common(dev, data, i);
 814                                 /* Preserve min limit if possible */
 815                                 if ((data->has_fan_min & (1 << i))
 816                                  && data->fan_min[i] >= 2
 817                                  && data->fan_min[i] != 255)
 818                                         w83627ehf_write_value(data,
 819                                                 data->REG_FAN_MIN[i],
 820                                                 (data->fan_min[i] /= 2));
 821                         }
 822                 }
 823
 824                 w83627ehf_update_pwm_common(dev, data);
 825
 826                 for (i = 0; i < data->pwm_num; i++) {
 827                         if (!(data->has_fan & (1 << i)))
 828                                 continue;
 829
 830                         data->fan_start_output[i] =
 831                           w83627ehf_read_value(data,
 832                                                data->REG_FAN_START_OUTPUT[i]);
 833                         data->fan_stop_output[i] =
 834                           w83627ehf_read_value(data,
 835                                                data->REG_FAN_STOP_OUTPUT[i]);
 836                         data->fan_stop_time[i] =
 837                           w83627ehf_read_value(data,
 838                                                data->REG_FAN_STOP_TIME[i]);
 839
 840                         if (data->REG_FAN_MAX_OUTPUT &&
 841                             data->REG_FAN_MAX_OUTPUT[i] != 0xff)
 842                                 data->fan_max_output[i] =
 843                                   w83627ehf_read_value(data,
 844                                                 data->REG_FAN_MAX_OUTPUT[i]);
 845
 846                         if (data->REG_FAN_STEP_OUTPUT &&
 847                             data->REG_FAN_STEP_OUTPUT[i] != 0xff)
 848                                 data->fan_step_output[i] =
 849                                   w83627ehf_read_value(data,
 850                                                 data->REG_FAN_STEP_OUTPUT[i]);
 851
 852                         data->target_temp[i] =
 853                                 w83627ehf_read_value(data,
 854                                         data->REG_TARGET[i]) &
 855                                         (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
 856                 }
 857
 858                 /* Measured temperatures and limits */
 859                 for (i = 0; i < NUM_REG_TEMP; i++) {
 860                         if (!(data->have_temp & (1 << i)))
 861                                 continue;
 862                         data->temp[i] = w83627ehf_read_value(data,
 863                                                 data->reg_temp[i]);
 864                         if (data->reg_temp_over[i])
 865                                 data->temp_max[i]
 866                                   = w83627ehf_read_value(data,
 867                                                 data->reg_temp_over[i]);
 868                         if (data->reg_temp_hyst[i])
 869                                 data->temp_max_hyst[i]
 870                                   = w83627ehf_read_value(data,
 871                                                 data->reg_temp_hyst[i]);
 872                 }
 873
 874                 data->alarms = w83627ehf_read_value(data,
 875                                         W83627EHF_REG_ALARM1) |
 876                                (w83627ehf_read_value(data,
 877                                         W83627EHF_REG_ALARM2) << 8) |
 878                                (w83627ehf_read_value(data,
 879                                         W83627EHF_REG_ALARM3) << 16);
 880
 881                 data->caseopen = w83627ehf_read_value(data,
 882                                                 W83627EHF_REG_CASEOPEN_DET);
 883
 884                 data->last_updated = jiffies;
 885                 data->valid = 1;
 886         }
 887
 888         mutex_unlock(&data->update_lock);
 889         return data;
 890 }
 891
 892 /*
 893  * Sysfs callback functions
 894  */
 895 #define show_in_reg(reg) \
 896 static ssize_t \
 897 show_##reg(struct device *dev, struct device_attribute *attr, \
 898            char *buf) \
 899 { \
 900         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 901         struct sensor_device_attribute *sensor_attr = \
 902                 to_sensor_dev_attr(attr); \
 903         int nr = sensor_attr->index; \
 904         return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
 905 }
 906 show_in_reg(in)
 907 show_in_reg(in_min)
 908 show_in_reg(in_max)
 909
 910 #define store_in_reg(REG, reg) \
 911 static ssize_t \
 912 store_in_##reg(struct device *dev, struct device_attribute *attr, \
 913                const char *buf, size_t count) \
 914 { \
 915         struct w83627ehf_data *data = dev_get_drvdata(dev); \
 916         struct sensor_device_attribute *sensor_attr = \
 917                 to_sensor_dev_attr(attr); \
 918         int nr = sensor_attr->index; \
 919         unsigned long val; \
 920         int err; \
 921         err = strict_strtoul(buf, 10, &val); \
 922         if (err < 0) \
 923                 return err; \
 924         mutex_lock(&data->update_lock); \
 925         data->in_##reg[nr] = in_to_reg(val, nr); \
 926         w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
 927                               data->in_##reg[nr]); \
 928         mutex_unlock(&data->update_lock); \
 929         return count; \
 930 }
 931
 932 store_in_reg(MIN, min)
 933 store_in_reg(MAX, max)
 934
 935 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
 936                           char *buf)
 937 {
 938         struct w83627ehf_data *data = w83627ehf_update_device(dev);
 939         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 940         int nr = sensor_attr->index;
 941         return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
 942 }
 943
 944 static struct sensor_device_attribute sda_in_input[] = {
 945         SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
 946         SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
 947         SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
 948         SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
 949         SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
 950         SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
 951         SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
 952         SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
 953         SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
 954         SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
 955 };
 956
 957 static struct sensor_device_attribute sda_in_alarm[] = {
 958         SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
 959         SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
 960         SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
 961         SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
 962         SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
 963         SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
 964         SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
 965         SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
 966         SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
 967         SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
 968 };
 969
 970 static struct sensor_device_attribute sda_in_min[] = {
 971         SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
 972         SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
 973         SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
 974         SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
 975         SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
 976         SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
 977         SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
 978         SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
 979         SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
 980         SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
 981 };
 982
 983 static struct sensor_device_attribute sda_in_max[] = {
 984         SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
 985         SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
 986         SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
 987         SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
 988         SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
 989         SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
 990         SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
 991         SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
 992         SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
 993         SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
 994 };
 995
 996 static ssize_t
 997 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
 998 {
 999         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1000         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1001         int nr = sensor_attr->index;
1002         return sprintf(buf, "%d\n", data->rpm[nr]);
1003 }
1004
1005 static ssize_t
1006 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1007 {
1008         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1009         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1010         int nr = sensor_attr->index;
1011         return sprintf(buf, "%d\n",
1012                        data->fan_from_reg_min(data->fan_min[nr],
1013                                               data->fan_div[nr]));
1014 }
1015
1016 static ssize_t
1017 show_fan_div(struct device *dev, struct device_attribute *attr,
1018              char *buf)
1019 {
1020         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1021         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1022         int nr = sensor_attr->index;
1023         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1024 }
1025
1026 static ssize_t
1027 store_fan_min(struct device *dev, struct device_attribute *attr,
1028               const char *buf, size_t count)
1029 {
1030         struct w83627ehf_data *data = dev_get_drvdata(dev);
1031         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1032         int nr = sensor_attr->index;
1033         unsigned long val;
1034         int err;
1035         unsigned int reg;
1036         u8 new_div;
1037
1038         err = strict_strtoul(buf, 10, &val);
1039         if (err < 0)
1040                 return err;
1041
1042         mutex_lock(&data->update_lock);
1043         if (!data->has_fan_div) {
1044                 /*
1045                  * Only NCT6776F for now, so we know that this is a 13 bit
1046                  * register
1047                  */
1048                 if (!val) {
1049                         val = 0xff1f;
1050                 } else {
1051                         if (val > 1350000U)
1052                                 val = 135000U;
1053                         val = 1350000U / val;
1054                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1055                 }
1056                 data->fan_min[nr] = val;
1057                 goto done;      /* Leave fan divider alone */
1058         }
1059         if (!val) {
1060                 /* No min limit, alarm disabled */
1061                 data->fan_min[nr] = 255;
1062                 new_div = data->fan_div[nr]; /* No change */
1063                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1064         } else if ((reg = 1350000U / val) >= 128 * 255) {
1065                 /* Speed below this value cannot possibly be represented,
1066                    even with the highest divider (128) */
1067                 data->fan_min[nr] = 254;
1068                 new_div = 7; /* 128 == (1 << 7) */
1069                 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1070                          "minimum\n", nr + 1, val,
1071                          data->fan_from_reg_min(254, 7));
1072         } else if (!reg) {
1073                 /* Speed above this value cannot possibly be represented,
1074                    even with the lowest divider (1) */
1075                 data->fan_min[nr] = 1;
1076                 new_div = 0; /* 1 == (1 << 0) */
1077                 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1078                          "maximum\n", nr + 1, val,
1079                          data->fan_from_reg_min(1, 0));
1080         } else {
1081                 /* Automatically pick the best divider, i.e. the one such
1082                    that the min limit will correspond to a register value
1083                    in the 96..192 range */
1084                 new_div = 0;
1085                 while (reg > 192 && new_div < 7) {
1086                         reg >>= 1;
1087                         new_div++;
1088                 }
1089                 data->fan_min[nr] = reg;
1090         }
1091
1092         /* Write both the fan clock divider (if it changed) and the new
1093            fan min (unconditionally) */
1094         if (new_div != data->fan_div[nr]) {
1095                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1096                         nr + 1, div_from_reg(data->fan_div[nr]),
1097                         div_from_reg(new_div));
1098                 data->fan_div[nr] = new_div;
1099                 w83627ehf_write_fan_div_common(dev, data, nr);
1100                 /* Give the chip time to sample a new speed value */
1101                 data->last_updated = jiffies;
1102         }
1103 done:
1104         w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1105                               data->fan_min[nr]);
1106         mutex_unlock(&data->update_lock);
1107
1108         return count;
1109 }
1110
1111 static struct sensor_device_attribute sda_fan_input[] = {
1112         SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1113         SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1114         SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1115         SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1116         SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1117 };
1118
1119 static struct sensor_device_attribute sda_fan_alarm[] = {
1120         SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1121         SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1122         SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1123         SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1124         SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1125 };
1126
1127 static struct sensor_device_attribute sda_fan_min[] = {
1128         SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1129                     store_fan_min, 0),
1130         SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1131                     store_fan_min, 1),
1132         SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1133                     store_fan_min, 2),
1134         SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1135                     store_fan_min, 3),
1136         SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1137                     store_fan_min, 4),
1138 };
1139
1140 static struct sensor_device_attribute sda_fan_div[] = {
1141         SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1142         SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1143         SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1144         SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1145         SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1146 };
1147
1148 static ssize_t
1149 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1150 {
1151         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1152         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1153         int nr = sensor_attr->index;
1154         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1155 }
1156
1157 #define show_temp_reg(addr, reg) \
1158 static ssize_t \
1159 show_##reg(struct device *dev, struct device_attribute *attr, \
1160            char *buf) \
1161 { \
1162         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1163         struct sensor_device_attribute *sensor_attr = \
1164                 to_sensor_dev_attr(attr); \
1165         int nr = sensor_attr->index; \
1166         return sprintf(buf, "%d\n", \
1167                        temp_from_reg(data->addr[nr], data->reg[nr])); \
1168 }
1169 show_temp_reg(reg_temp, temp);
1170 show_temp_reg(reg_temp_over, temp_max);
1171 show_temp_reg(reg_temp_hyst, temp_max_hyst);
1172
1173 #define store_temp_reg(addr, reg) \
1174 static ssize_t \
1175 store_##reg(struct device *dev, struct device_attribute *attr, \
1176             const char *buf, size_t count) \
1177 { \
1178         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1179         struct sensor_device_attribute *sensor_attr = \
1180                 to_sensor_dev_attr(attr); \
1181         int nr = sensor_attr->index; \
1182         int err; \
1183         long val; \
1184         err = strict_strtol(buf, 10, &val); \
1185         if (err < 0) \
1186                 return err; \
1187         mutex_lock(&data->update_lock); \
1188         data->reg[nr] = temp_to_reg(data->addr[nr], val); \
1189         w83627ehf_write_value(data, data->addr[nr], \
1190                               data->reg[nr]); \
1191         mutex_unlock(&data->update_lock); \
1192         return count; \
1193 }
1194 store_temp_reg(reg_temp_over, temp_max);
1195 store_temp_reg(reg_temp_hyst, temp_max_hyst);
1196
1197 static ssize_t
1198 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1199 {
1200         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1201         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1202         int nr = sensor_attr->index;
1203         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1204 }
1205
1206 static struct sensor_device_attribute sda_temp_input[] = {
1207         SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1208         SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1209         SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1210         SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1211         SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1212         SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1213         SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1214         SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1215         SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1216 };
1217
1218 static struct sensor_device_attribute sda_temp_label[] = {
1219         SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1220         SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1221         SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1222         SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1223         SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1224         SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1225         SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1226         SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1227         SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1228 };
1229
1230 static struct sensor_device_attribute sda_temp_max[] = {
1231         SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1232                     store_temp_max, 0),
1233         SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1234                     store_temp_max, 1),
1235         SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1236                     store_temp_max, 2),
1237         SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1238                     store_temp_max, 3),
1239         SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1240                     store_temp_max, 4),
1241         SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1242                     store_temp_max, 5),
1243         SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1244                     store_temp_max, 6),
1245         SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1246                     store_temp_max, 7),
1247         SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1248                     store_temp_max, 8),
1249 };
1250
1251 static struct sensor_device_attribute sda_temp_max_hyst[] = {
1252         SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1253                     store_temp_max_hyst, 0),
1254         SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1255                     store_temp_max_hyst, 1),
1256         SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1257                     store_temp_max_hyst, 2),
1258         SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1259                     store_temp_max_hyst, 3),
1260         SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1261                     store_temp_max_hyst, 4),
1262         SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1263                     store_temp_max_hyst, 5),
1264         SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1265                     store_temp_max_hyst, 6),
1266         SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1267                     store_temp_max_hyst, 7),
1268         SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1269                     store_temp_max_hyst, 8),
1270 };
1271
1272 static struct sensor_device_attribute sda_temp_alarm[] = {
1273         SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1274         SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1275         SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1276 };
1277
1278 static struct sensor_device_attribute sda_temp_type[] = {
1279         SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1280         SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1281         SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1282 };
1283
1284 #define show_pwm_reg(reg) \
1285 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1286                           char *buf) \
1287 { \
1288         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1289         struct sensor_device_attribute *sensor_attr = \
1290                 to_sensor_dev_attr(attr); \
1291         int nr = sensor_attr->index; \
1292         return sprintf(buf, "%d\n", data->reg[nr]); \
1293 }
1294
1295 show_pwm_reg(pwm_mode)
1296 show_pwm_reg(pwm_enable)
1297 show_pwm_reg(pwm)
1298
1299 static ssize_t
1300 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1301                         const char *buf, size_t count)
1302 {
1303         struct w83627ehf_data *data = dev_get_drvdata(dev);
1304         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1305         int nr = sensor_attr->index;
1306         unsigned long val;
1307         int err;
1308         u16 reg;
1309
1310         err = strict_strtoul(buf, 10, &val);
1311         if (err < 0)
1312                 return err;
1313
1314         if (val > 1)
1315                 return -EINVAL;
1316         mutex_lock(&data->update_lock);
1317         reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1318         data->pwm_mode[nr] = val;
1319         reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1320         if (!val)
1321                 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1322         w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1323         mutex_unlock(&data->update_lock);
1324         return count;
1325 }
1326
1327 static ssize_t
1328 store_pwm(struct device *dev, struct device_attribute *attr,
1329                         const char *buf, size_t count)
1330 {
1331         struct w83627ehf_data *data = dev_get_drvdata(dev);
1332         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1333         int nr = sensor_attr->index;
1334         unsigned long val;
1335         int err;
1336
1337         err = strict_strtoul(buf, 10, &val);
1338         if (err < 0)
1339                 return err;
1340
1341         val = SENSORS_LIMIT(val, 0, 255);
1342
1343         mutex_lock(&data->update_lock);
1344         data->pwm[nr] = val;
1345         w83627ehf_write_value(data, data->REG_PWM[nr], val);
1346         mutex_unlock(&data->update_lock);
1347         return count;
1348 }
1349
1350 static ssize_t
1351 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1352                         const char *buf, size_t count)
1353 {
1354         struct w83627ehf_data *data = dev_get_drvdata(dev);
1355         struct w83627ehf_sio_data *sio_data = dev->platform_data;
1356         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1357         int nr = sensor_attr->index;
1358         unsigned long val;
1359         int err;
1360         u16 reg;
1361
1362         err = strict_strtoul(buf, 10, &val);
1363         if (err < 0)
1364                 return err;
1365
1366         if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1367                 return -EINVAL;
1368         /* SmartFan III mode is not supported on NCT6776F */
1369         if (sio_data->kind == nct6776 && val == 4)
1370                 return -EINVAL;
1371
1372         mutex_lock(&data->update_lock);
1373         data->pwm_enable[nr] = val;
1374         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1375                 reg = w83627ehf_read_value(data,
1376                                            NCT6775_REG_FAN_MODE[nr]);
1377                 reg &= 0x0f;
1378                 reg |= (val - 1) << 4;
1379                 w83627ehf_write_value(data,
1380                                       NCT6775_REG_FAN_MODE[nr], reg);
1381         } else {
1382                 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1383                 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1384                 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1385                 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1386         }
1387         mutex_unlock(&data->update_lock);
1388         return count;
1389 }
1390
1391
1392 #define show_tol_temp(reg) \
1393 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1394                                 char *buf) \
1395 { \
1396         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1397         struct sensor_device_attribute *sensor_attr = \
1398                 to_sensor_dev_attr(attr); \
1399         int nr = sensor_attr->index; \
1400         return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1401 }
1402
1403 show_tol_temp(tolerance)
1404 show_tol_temp(target_temp)
1405
1406 static ssize_t
1407 store_target_temp(struct device *dev, struct device_attribute *attr,
1408                         const char *buf, size_t count)
1409 {
1410         struct w83627ehf_data *data = dev_get_drvdata(dev);
1411         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1412         int nr = sensor_attr->index;
1413         long val;
1414         int err;
1415
1416         err = strict_strtol(buf, 10, &val);
1417         if (err < 0)
1418                 return err;
1419
1420         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1421
1422         mutex_lock(&data->update_lock);
1423         data->target_temp[nr] = val;
1424         w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1425         mutex_unlock(&data->update_lock);
1426         return count;
1427 }
1428
1429 static ssize_t
1430 store_tolerance(struct device *dev, struct device_attribute *attr,
1431                         const char *buf, size_t count)
1432 {
1433         struct w83627ehf_data *data = dev_get_drvdata(dev);
1434         struct w83627ehf_sio_data *sio_data = dev->platform_data;
1435         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1436         int nr = sensor_attr->index;
1437         u16 reg;
1438         long val;
1439         int err;
1440
1441         err = strict_strtol(buf, 10, &val);
1442         if (err < 0)
1443                 return err;
1444
1445         /* Limit the temp to 0C - 15C */
1446         val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1447
1448         mutex_lock(&data->update_lock);
1449         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1450                 /* Limit tolerance further for NCT6776F */
1451                 if (sio_data->kind == nct6776 && val > 7)
1452                         val = 7;
1453                 reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1454                 reg = (reg & 0xf0) | val;
1455                 w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1456         } else {
1457                 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1458                 if (nr == 1)
1459                         reg = (reg & 0x0f) | (val << 4);
1460                 else
1461                         reg = (reg & 0xf0) | val;
1462                 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1463         }
1464         data->tolerance[nr] = val;
1465         mutex_unlock(&data->update_lock);
1466         return count;
1467 }
1468
1469 static struct sensor_device_attribute sda_pwm[] = {
1470         SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1471         SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1472         SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1473         SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1474 };
1475
1476 static struct sensor_device_attribute sda_pwm_mode[] = {
1477         SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1478                     store_pwm_mode, 0),
1479         SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1480                     store_pwm_mode, 1),
1481         SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1482                     store_pwm_mode, 2),
1483         SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1484                     store_pwm_mode, 3),
1485 };
1486
1487 static struct sensor_device_attribute sda_pwm_enable[] = {
1488         SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1489                     store_pwm_enable, 0),
1490         SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1491                     store_pwm_enable, 1),
1492         SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1493                     store_pwm_enable, 2),
1494         SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1495                     store_pwm_enable, 3),
1496 };
1497
1498 static struct sensor_device_attribute sda_target_temp[] = {
1499         SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1500                     store_target_temp, 0),
1501         SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1502                     store_target_temp, 1),
1503         SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1504                     store_target_temp, 2),
1505         SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1506                     store_target_temp, 3),
1507 };
1508
1509 static struct sensor_device_attribute sda_tolerance[] = {
1510         SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1511                     store_tolerance, 0),
1512         SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1513                     store_tolerance, 1),
1514         SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1515                     store_tolerance, 2),
1516         SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1517                     store_tolerance, 3),
1518 };
1519
1520 /* Smart Fan registers */
1521
1522 #define fan_functions(reg, REG) \
1523 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1524                        char *buf) \
1525 { \
1526         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1527         struct sensor_device_attribute *sensor_attr = \
1528                 to_sensor_dev_attr(attr); \
1529         int nr = sensor_attr->index; \
1530         return sprintf(buf, "%d\n", data->reg[nr]); \
1531 } \
1532 static ssize_t \
1533 store_##reg(struct device *dev, struct device_attribute *attr, \
1534                             const char *buf, size_t count) \
1535 { \
1536         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1537         struct sensor_device_attribute *sensor_attr = \
1538                 to_sensor_dev_attr(attr); \
1539         int nr = sensor_attr->index; \
1540         unsigned long val; \
1541         int err; \
1542         err = strict_strtoul(buf, 10, &val); \
1543         if (err < 0) \
1544                 return err; \
1545         val = SENSORS_LIMIT(val, 1, 255); \
1546         mutex_lock(&data->update_lock); \
1547         data->reg[nr] = val; \
1548         w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1549         mutex_unlock(&data->update_lock); \
1550         return count; \
1551 }
1552
1553 fan_functions(fan_start_output, FAN_START_OUTPUT)
1554 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1555 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1556 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1557
1558 #define fan_time_functions(reg, REG) \
1559 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1560                                 char *buf) \
1561 { \
1562         struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1563         struct sensor_device_attribute *sensor_attr = \
1564                 to_sensor_dev_attr(attr); \
1565         int nr = sensor_attr->index; \
1566         return sprintf(buf, "%d\n", \
1567                         step_time_from_reg(data->reg[nr], \
1568                                            data->pwm_mode[nr])); \
1569 } \
1570 \
1571 static ssize_t \
1572 store_##reg(struct device *dev, struct device_attribute *attr, \
1573                         const char *buf, size_t count) \
1574 { \
1575         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1576         struct sensor_device_attribute *sensor_attr = \
1577                 to_sensor_dev_attr(attr); \
1578         int nr = sensor_attr->index; \
1579         unsigned long val; \
1580         int err; \
1581         err = strict_strtoul(buf, 10, &val); \
1582         if (err < 0) \
1583                 return err; \
1584         val = step_time_to_reg(val, data->pwm_mode[nr]); \
1585         mutex_lock(&data->update_lock); \
1586         data->reg[nr] = val; \
1587         w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1588         mutex_unlock(&data->update_lock); \
1589         return count; \
1590 } \
1591
1592 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1593
1594 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1595                          char *buf)
1596 {
1597         struct w83627ehf_data *data = dev_get_drvdata(dev);
1598
1599         return sprintf(buf, "%s\n", data->name);
1600 }
1601 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1602
1603 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1604         SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1605                     store_fan_stop_time, 3),
1606         SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1607                     store_fan_start_output, 3),
1608         SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1609                     store_fan_stop_output, 3),
1610         SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1611                     store_fan_max_output, 3),
1612         SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1613                     store_fan_step_output, 3),
1614 };
1615
1616 static struct sensor_device_attribute sda_sf3_arrays[] = {
1617         SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1618                     store_fan_stop_time, 0),
1619         SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1620                     store_fan_stop_time, 1),
1621         SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1622                     store_fan_stop_time, 2),
1623         SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1624                     store_fan_start_output, 0),
1625         SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1626                     store_fan_start_output, 1),
1627         SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1628                     store_fan_start_output, 2),
1629         SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1630                     store_fan_stop_output, 0),
1631         SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1632                     store_fan_stop_output, 1),
1633         SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1634                     store_fan_stop_output, 2),
1635 };
1636
1637
1638 /*
1639  * pwm1 and pwm3 don't support max and step settings on all chips.
1640  * Need to check support while generating/removing attribute files.
1641  */
1642 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1643         SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1644                     store_fan_max_output, 0),
1645         SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1646                     store_fan_step_output, 0),
1647         SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1648                     store_fan_max_output, 1),
1649         SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1650                     store_fan_step_output, 1),
1651         SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1652                     store_fan_max_output, 2),
1653         SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1654                     store_fan_step_output, 2),
1655 };
1656
1657 static ssize_t
1658 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1659 {
1660         struct w83627ehf_data *data = dev_get_drvdata(dev);
1661         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1662 }
1663 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1664
1665
1666 /* Case open detection */
1667
1668 static ssize_t
1669 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
1670 {
1671         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1672
1673         return sprintf(buf, "%d\n",
1674                 !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
1675 }
1676
1677 static ssize_t
1678 clear_caseopen(struct device *dev, struct device_attribute *attr,
1679                         const char *buf, size_t count)
1680 {
1681         struct w83627ehf_data *data = dev_get_drvdata(dev);
1682         unsigned long val;
1683         u16 reg, mask;
1684
1685         if (strict_strtoul(buf, 10, &val) || val != 0)
1686                 return -EINVAL;
1687
1688         mask = to_sensor_dev_attr_2(attr)->nr;
1689
1690         mutex_lock(&data->update_lock);
1691         reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1692         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1693         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1694         data->valid = 0;        /* Force cache refresh */
1695         mutex_unlock(&data->update_lock);
1696
1697         return count;
1698 }
1699
1700 static struct sensor_device_attribute_2 sda_caseopen[] = {
1701         SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1702                         clear_caseopen, 0x80, 0x10),
1703         SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1704                         clear_caseopen, 0x40, 0x40),
1705 };
1706
1707 /*
1708  * Driver and device management
1709  */
1710
1711 static void w83627ehf_device_remove_files(struct device *dev)
1712 {
1713         /* some entries in the following arrays may not have been used in
1714          * device_create_file(), but device_remove_file() will ignore them */
1715         int i;
1716         struct w83627ehf_data *data = dev_get_drvdata(dev);
1717
1718         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1719                 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1720         for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1721                 struct sensor_device_attribute *attr =
1722                   &sda_sf3_max_step_arrays[i];
1723                 if (data->REG_FAN_STEP_OUTPUT &&
1724                     data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1725                         device_remove_file(dev, &attr->dev_attr);
1726         }
1727         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1728                 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1729         for (i = 0; i < data->in_num; i++) {
1730                 if ((i == 6) && data->in6_skip)
1731                         continue;
1732                 device_remove_file(dev, &sda_in_input[i].dev_attr);
1733                 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1734                 device_remove_file(dev, &sda_in_min[i].dev_attr);
1735                 device_remove_file(dev, &sda_in_max[i].dev_attr);
1736         }
1737         for (i = 0; i < 5; i++) {
1738                 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1739                 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1740                 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1741                 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1742         }
1743         for (i = 0; i < data->pwm_num; i++) {
1744                 device_remove_file(dev, &sda_pwm[i].dev_attr);
1745                 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1746                 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1747                 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1748                 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1749         }
1750         for (i = 0; i < NUM_REG_TEMP; i++) {
1751                 if (!(data->have_temp & (1 << i)))
1752                         continue;
1753                 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1754                 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1755                 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1756                 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1757                 if (i > 2)
1758                         continue;
1759                 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1760                 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1761         }
1762
1763         device_remove_file(dev, &sda_caseopen[0].dev_attr);
1764         device_remove_file(dev, &sda_caseopen[1].dev_attr);
1765
1766         device_remove_file(dev, &dev_attr_name);
1767         device_remove_file(dev, &dev_attr_cpu0_vid);
1768 }
1769
1770 /* Get the monitoring functions started */
1771 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data,
1772                                                    enum kinds kind)
1773 {
1774         int i;
1775         u8 tmp, diode;
1776
1777         /* Start monitoring is needed */
1778         tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1779         if (!(tmp & 0x01))
1780                 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1781                                       tmp | 0x01);
1782
1783         /* Enable temperature sensors if needed */
1784         for (i = 0; i < NUM_REG_TEMP; i++) {
1785                 if (!(data->have_temp & (1 << i)))
1786                         continue;
1787                 if (!data->reg_temp_config[i])
1788                         continue;
1789                 tmp = w83627ehf_read_value(data,
1790                                            data->reg_temp_config[i]);
1791                 if (tmp & 0x01)
1792                         w83627ehf_write_value(data,
1793                                               data->reg_temp_config[i],
1794                                               tmp & 0xfe);
1795         }
1796
1797         /* Enable VBAT monitoring if needed */
1798         tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1799         if (!(tmp & 0x01))
1800                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1801
1802         /* Get thermal sensor types */
1803         switch (kind) {
1804         case w83627ehf:
1805                 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1806                 break;
1807         default:
1808                 diode = 0x70;
1809         }
1810         for (i = 0; i < 3; i++) {
1811                 if ((tmp & (0x02 << i)))
1812                         data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1813                 else
1814                         data->temp_type[i] = 4; /* thermistor */
1815         }
1816 }
1817
1818 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1819                                    int r1, int r2)
1820 {
1821         u16 tmp;
1822
1823         tmp = data->temp_src[r1];
1824         data->temp_src[r1] = data->temp_src[r2];
1825         data->temp_src[r2] = tmp;
1826
1827         tmp = data->reg_temp[r1];
1828         data->reg_temp[r1] = data->reg_temp[r2];
1829         data->reg_temp[r2] = tmp;
1830
1831         tmp = data->reg_temp_over[r1];
1832         data->reg_temp_over[r1] = data->reg_temp_over[r2];
1833         data->reg_temp_over[r2] = tmp;
1834
1835         tmp = data->reg_temp_hyst[r1];
1836         data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];
1837         data->reg_temp_hyst[r2] = tmp;
1838
1839         tmp = data->reg_temp_config[r1];
1840         data->reg_temp_config[r1] = data->reg_temp_config[r2];
1841         data->reg_temp_config[r2] = tmp;
1842 }
1843
1844 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1845 {
1846         struct device *dev = &pdev->dev;
1847         struct w83627ehf_sio_data *sio_data = dev->platform_data;
1848         struct w83627ehf_data *data;
1849         struct resource *res;
1850         u8 fan3pin, fan4pin, fan4min, fan5pin, en_vrm10;
1851         int i, err = 0;
1852
1853         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1854         if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1855                 err = -EBUSY;
1856                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1857                         (unsigned long)res->start,
1858                         (unsigned long)res->start + IOREGION_LENGTH - 1);
1859                 goto exit;
1860         }
1861
1862         data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL);
1863         if (!data) {
1864                 err = -ENOMEM;
1865                 goto exit_release;
1866         }
1867
1868         data->addr = res->start;
1869         mutex_init(&data->lock);
1870         mutex_init(&data->update_lock);
1871         data->name = w83627ehf_device_names[sio_data->kind];
1872         platform_set_drvdata(pdev, data);
1873
1874         /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1875         data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1876         /* 667HG, NCT6775F, and NCT6776F have 3 pwms */
1877         data->pwm_num = (sio_data->kind == w83667hg
1878                          || sio_data->kind == w83667hg_b
1879                          || sio_data->kind == nct6775
1880                          || sio_data->kind == nct6776) ? 3 : 4;
1881
1882         data->have_temp = 0x07;
1883         /* Check temp3 configuration bit for 667HG */
1884         if (sio_data->kind == w83667hg) {
1885                 u8 reg;
1886
1887                 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1888                 if (reg & 0x01)
1889                         data->have_temp &= ~(1 << 2);
1890                 else
1891                         data->in6_skip = 1;     /* either temp3 or in6 */
1892         }
1893
1894         /* Deal with temperature register setup first. */
1895         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1896                 int mask = 0;
1897
1898                 /*
1899                  * Display temperature sensor output only if it monitors
1900                  * a source other than one already reported. Always display
1901                  * first three temperature registers, though.
1902                  */
1903                 for (i = 0; i < NUM_REG_TEMP; i++) {
1904                         u8 src;
1905
1906                         data->reg_temp[i] = NCT6775_REG_TEMP[i];
1907                         data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
1908                         data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
1909                         data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
1910
1911                         src = w83627ehf_read_value(data,
1912                                                    NCT6775_REG_TEMP_SOURCE[i]);
1913                         src &= 0x1f;
1914                         if (src && !(mask & (1 << src))) {
1915                                 data->have_temp |= 1 << i;
1916                                 mask |= 1 << src;
1917                         }
1918
1919                         data->temp_src[i] = src;
1920
1921                         /*
1922                          * Now do some register swapping if index 0..2 don't
1923                          * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
1924                          * Idea is to have the first three attributes
1925                          * report SYSTIN, CPUIN, and AUXIN if possible
1926                          * without overriding the basic system configuration.
1927                          */
1928                         if (i > 0 && data->temp_src[0] != 1
1929                             && data->temp_src[i] == 1)
1930                                 w82627ehf_swap_tempreg(data, 0, i);
1931                         if (i > 1 && data->temp_src[1] != 2
1932                             && data->temp_src[i] == 2)
1933                                 w82627ehf_swap_tempreg(data, 1, i);
1934                         if (i > 2 && data->temp_src[2] != 3
1935                             && data->temp_src[i] == 3)
1936                                 w82627ehf_swap_tempreg(data, 2, i);
1937                 }
1938                 if (sio_data->kind == nct6776) {
1939                         /*
1940                          * On NCT6776, AUXTIN and VIN3 pins are shared.
1941                          * Only way to detect it is to check if AUXTIN is used
1942                          * as a temperature source, and if that source is
1943                          * enabled.
1944                          *
1945                          * If that is the case, disable in6, which reports VIN3.
1946                          * Otherwise disable temp3.
1947                          */
1948                         if (data->temp_src[2] == 3) {
1949                                 u8 reg;
1950
1951                                 if (data->reg_temp_config[2])
1952                                         reg = w83627ehf_read_value(data,
1953                                                 data->reg_temp_config[2]);
1954                                 else
1955                                         reg = 0; /* Assume AUXTIN is used */
1956
1957                                 if (reg & 0x01)
1958                                         data->have_temp &= ~(1 << 2);
1959                                 else
1960                                         data->in6_skip = 1;
1961                         }
1962                         data->temp_label = nct6776_temp_label;
1963                 } else {
1964                         data->temp_label = nct6775_temp_label;
1965                 }
1966         } else if (sio_data->kind == w83667hg_b) {
1967                 u8 reg;
1968
1969                 /*
1970                  * Temperature sources are selected with bank 0, registers 0x49
1971                  * and 0x4a.
1972                  */
1973                 for (i = 0; i < ARRAY_SIZE(W83627EHF_REG_TEMP); i++) {
1974                         data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1975                         data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1976                         data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1977                         data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1978                 }
1979                 reg = w83627ehf_read_value(data, 0x4a);
1980                 data->temp_src[0] = reg >> 5;
1981                 reg = w83627ehf_read_value(data, 0x49);
1982                 data->temp_src[1] = reg & 0x07;
1983                 data->temp_src[2] = (reg >> 4) & 0x07;
1984
1985                 /*
1986                  * W83667HG-B has another temperature register at 0x7e.
1987                  * The temperature source is selected with register 0x7d.
1988                  * Support it if the source differs from already reported
1989                  * sources.
1990                  */
1991                 reg = w83627ehf_read_value(data, 0x7d);
1992                 reg &= 0x07;
1993                 if (reg != data->temp_src[0] && reg != data->temp_src[1]
1994                     && reg != data->temp_src[2]) {
1995                         data->temp_src[3] = reg;
1996                         data->have_temp |= 1 << 3;
1997                 }
1998
1999                 /*
2000                  * Chip supports either AUXTIN or VIN3. Try to find out which
2001                  * one.
2002                  */
2003                 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
2004                 if (data->temp_src[2] == 2 && (reg & 0x01))
2005                         data->have_temp &= ~(1 << 2);
2006
2007                 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
2008                     || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
2009                         data->in6_skip = 1;
2010
2011                 data->temp_label = w83667hg_b_temp_label;
2012         } else {
2013                 /* Temperature sources are fixed */
2014                 for (i = 0; i < 3; i++) {
2015                         data->reg_temp[i] = W83627EHF_REG_TEMP[i];
2016                         data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
2017                         data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
2018                         data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
2019                 }
2020         }
2021
2022         if (sio_data->kind == nct6775) {
2023                 data->has_fan_div = true;
2024                 data->fan_from_reg = fan_from_reg16;
2025                 data->fan_from_reg_min = fan_from_reg8;
2026                 data->REG_PWM = NCT6775_REG_PWM;
2027                 data->REG_TARGET = NCT6775_REG_TARGET;
2028                 data->REG_FAN = NCT6775_REG_FAN;
2029                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2030                 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2031                 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2032                 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2033                 data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
2034                 data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
2035         } else if (sio_data->kind == nct6776) {
2036                 data->has_fan_div = false;
2037                 data->fan_from_reg = fan_from_reg13;
2038                 data->fan_from_reg_min = fan_from_reg13;
2039                 data->REG_PWM = NCT6775_REG_PWM;
2040                 data->REG_TARGET = NCT6775_REG_TARGET;
2041                 data->REG_FAN = NCT6775_REG_FAN;
2042                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2043                 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2044                 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2045                 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2046         } else if (sio_data->kind == w83667hg_b) {
2047                 data->has_fan_div = true;
2048                 data->fan_from_reg = fan_from_reg8;
2049                 data->fan_from_reg_min = fan_from_reg8;
2050                 data->REG_PWM = W83627EHF_REG_PWM;
2051                 data->REG_TARGET = W83627EHF_REG_TARGET;
2052                 data->REG_FAN = W83627EHF_REG_FAN;
2053                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2054                 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2055                 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2056                 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2057                 data->REG_FAN_MAX_OUTPUT =
2058                   W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
2059                 data->REG_FAN_STEP_OUTPUT =
2060                   W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2061         } else {
2062                 data->has_fan_div = true;
2063                 data->fan_from_reg = fan_from_reg8;
2064                 data->fan_from_reg_min = fan_from_reg8;
2065                 data->REG_PWM = W83627EHF_REG_PWM;
2066                 data->REG_TARGET = W83627EHF_REG_TARGET;
2067                 data->REG_FAN = W83627EHF_REG_FAN;
2068                 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2069                 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2070                 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2071                 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2072                 data->REG_FAN_MAX_OUTPUT =
2073                   W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2074                 data->REG_FAN_STEP_OUTPUT =
2075                   W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2076         }
2077
2078         /* Initialize the chip */
2079         w83627ehf_init_device(data, sio_data->kind);
2080
2081         data->vrm = vid_which_vrm();
2082         superio_enter(sio_data->sioreg);
2083         /* Read VID value */
2084         if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2085             sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2086                 /* W83667HG has different pins for VID input and output, so
2087                 we can get the VID input values directly at logical device D
2088                 0xe3. */
2089                 superio_select(sio_data->sioreg, W83667HG_LD_VID);
2090                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2091                 err = device_create_file(dev, &dev_attr_cpu0_vid);
2092                 if (err)
2093                         goto exit_release;
2094         } else {
2095                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2096                 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2097                         /* Set VID input sensibility if needed. In theory the
2098                            BIOS should have set it, but in practice it's not
2099                            always the case. We only do it for the W83627EHF/EHG
2100                            because the W83627DHG is more complex in this
2101                            respect. */
2102                         if (sio_data->kind == w83627ehf) {
2103                                 en_vrm10 = superio_inb(sio_data->sioreg,
2104                                                        SIO_REG_EN_VRM10);
2105                                 if ((en_vrm10 & 0x08) && data->vrm == 90) {
2106                                         dev_warn(dev, "Setting VID input "
2107                                                  "voltage to TTL\n");
2108                                         superio_outb(sio_data->sioreg,
2109                                                      SIO_REG_EN_VRM10,
2110                                                      en_vrm10 & ~0x08);
2111                                 } else if (!(en_vrm10 & 0x08)
2112                                            && data->vrm == 100) {
2113                                         dev_warn(dev, "Setting VID input "
2114                                                  "voltage to VRM10\n");
2115                                         superio_outb(sio_data->sioreg,
2116                                                      SIO_REG_EN_VRM10,
2117                                                      en_vrm10 | 0x08);
2118                                 }
2119                         }
2120
2121                         data->vid = superio_inb(sio_data->sioreg,
2122                                                 SIO_REG_VID_DATA);
2123                         if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2124                                 data->vid &= 0x3f;
2125
2126                         err = device_create_file(dev, &dev_attr_cpu0_vid);
2127                         if (err)
2128                                 goto exit_release;
2129                 } else {
2130                         dev_info(dev, "VID pins in output mode, CPU VID not "
2131                                  "available\n");
2132                 }
2133         }
2134
2135         /* fan4 and fan5 share some pins with the GPIO and serial flash */
2136         if (sio_data->kind == nct6775) {
2137                 /* On NCT6775, fan4 shares pins with the fdc interface */
2138                 fan3pin = 1;
2139                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2140                 fan4min = 0;
2141                 fan5pin = 0;
2142         } else if (sio_data->kind == nct6776) {
2143                 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2144                 fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
2145                 fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
2146                 fan4min = fan4pin;
2147         } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
2148                 fan3pin = 1;
2149                 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
2150                 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
2151                 fan4min = fan4pin;
2152         } else {
2153                 fan3pin = 1;
2154                 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
2155                 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
2156                 fan4min = fan4pin;
2157         }
2158
2159         if (fan_debounce &&
2160             (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2161                 u8 tmp;
2162
2163                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2164                 tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2165                 if (sio_data->kind == nct6776)
2166                         superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2167                                      0x3e | tmp);
2168                 else
2169                         superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2170                                      0x1e | tmp);
2171                 pr_info("Enabled fan debounce for chip %s\n", data->name);
2172         }
2173
2174         superio_exit(sio_data->sioreg);
2175
2176         /* It looks like fan4 and fan5 pins can be alternatively used
2177            as fan on/off switches, but fan5 control is write only :/
2178            We assume that if the serial interface is disabled, designers
2179            connected fan5 as input unless they are emitting log 1, which
2180            is not the default. */
2181
2182         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2183
2184         data->has_fan |= (fan3pin << 2);
2185         data->has_fan_min |= (fan3pin << 2);
2186
2187         /*
2188          * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1 register
2189          */
2190         if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2191                 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2192                 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2193         } else {
2194                 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
2195                 if ((i & (1 << 2)) && fan4pin) {
2196                         data->has_fan |= (1 << 3);
2197                         data->has_fan_min |= (1 << 3);
2198                 }
2199                 if (!(i & (1 << 1)) && fan5pin) {
2200                         data->has_fan |= (1 << 4);
2201                         data->has_fan_min |= (1 << 4);
2202                 }
2203         }
2204
2205         /* Read fan clock dividers immediately */
2206         w83627ehf_update_fan_div_common(dev, data);
2207
2208         /* Read pwm data to save original values */
2209         w83627ehf_update_pwm_common(dev, data);
2210         for (i = 0; i < data->pwm_num; i++)
2211                 data->pwm_enable_orig[i] = data->pwm_enable[i];
2212
2213         /* Read pwm data to save original values */
2214         w83627ehf_update_pwm_common(dev, data);
2215         for (i = 0; i < data->pwm_num; i++)
2216                 data->pwm_enable_orig[i] = data->pwm_enable[i];
2217
2218         /* Register sysfs hooks */
2219         for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2220                 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2221                 if (err)
2222                         goto exit_remove;
2223         }
2224
2225         for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2226                 struct sensor_device_attribute *attr =
2227                   &sda_sf3_max_step_arrays[i];
2228                 if (data->REG_FAN_STEP_OUTPUT &&
2229                     data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2230                         err = device_create_file(dev, &attr->dev_attr);
2231                         if (err)
2232                                 goto exit_remove;
2233                 }
2234         }
2235         /* if fan4 is enabled create the sf3 files for it */
2236         if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2237                 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2238                         err = device_create_file(dev,
2239                                         &sda_sf3_arrays_fan4[i].dev_attr);
2240                         if (err)
2241                                 goto exit_remove;
2242                 }
2243
2244         for (i = 0; i < data->in_num; i++) {
2245                 if ((i == 6) && data->in6_skip)
2246                         continue;
2247                 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2248                         || (err = device_create_file(dev,
2249                                 &sda_in_alarm[i].dev_attr))
2250                         || (err = device_create_file(dev,
2251                                 &sda_in_min[i].dev_attr))
2252                         || (err = device_create_file(dev,
2253                                 &sda_in_max[i].dev_attr)))
2254                         goto exit_remove;
2255         }
2256
2257         for (i = 0; i < 5; i++) {
2258                 if (data->has_fan & (1 << i)) {
2259                         if ((err = device_create_file(dev,
2260                                         &sda_fan_input[i].dev_attr))
2261                                 || (err = device_create_file(dev,
2262                                         &sda_fan_alarm[i].dev_attr)))
2263                                 goto exit_remove;
2264                         if (sio_data->kind != nct6776) {
2265                                 err = device_create_file(dev,
2266                                                 &sda_fan_div[i].dev_attr);
2267                                 if (err)
2268                                         goto exit_remove;
2269                         }
2270                         if (data->has_fan_min & (1 << i)) {
2271                                 err = device_create_file(dev,
2272                                                 &sda_fan_min[i].dev_attr);
2273                                 if (err)
2274                                         goto exit_remove;
2275                         }
2276                         if (i < data->pwm_num &&
2277                                 ((err = device_create_file(dev,
2278                                         &sda_pwm[i].dev_attr))
2279                                 || (err = device_create_file(dev,
2280                                         &sda_pwm_mode[i].dev_attr))
2281                                 || (err = device_create_file(dev,
2282                                         &sda_pwm_enable[i].dev_attr))
2283                                 || (err = device_create_file(dev,
2284                                         &sda_target_temp[i].dev_attr))
2285                                 || (err = device_create_file(dev,
2286                                         &sda_tolerance[i].dev_attr))))
2287                                 goto exit_remove;
2288                 }
2289         }
2290
2291         for (i = 0; i < NUM_REG_TEMP; i++) {
2292                 if (!(data->have_temp & (1 << i)))
2293                         continue;
2294                 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2295                 if (err)
2296                         goto exit_remove;
2297                 if (data->temp_label) {
2298                         err = device_create_file(dev,
2299                                                  &sda_temp_label[i].dev_attr);
2300                         if (err)
2301                                 goto exit_remove;
2302                 }
2303                 if (data->reg_temp_over[i]) {
2304                         err = device_create_file(dev,
2305                                 &sda_temp_max[i].dev_attr);
2306                         if (err)
2307                                 goto exit_remove;
2308                 }
2309                 if (data->reg_temp_hyst[i]) {
2310                         err = device_create_file(dev,
2311                                 &sda_temp_max_hyst[i].dev_attr);
2312                         if (err)
2313                                 goto exit_remove;
2314                 }
2315                 if (i > 2)
2316                         continue;
2317                 if ((err = device_create_file(dev,
2318                                 &sda_temp_alarm[i].dev_attr))
2319                         || (err = device_create_file(dev,
2320                                 &sda_temp_type[i].dev_attr)))
2321                         goto exit_remove;
2322         }
2323
2324         err = device_create_file(dev, &sda_caseopen[0].dev_attr);
2325         if (err)
2326                 goto exit_remove;
2327
2328         if (sio_data->kind == nct6776) {
2329                 err = device_create_file(dev, &sda_caseopen[1].dev_attr);
2330                 if (err)
2331                         goto exit_remove;
2332         }
2333
2334         err = device_create_file(dev, &dev_attr_name);
2335         if (err)
2336                 goto exit_remove;
2337
2338         data->hwmon_dev = hwmon_device_register(dev);
2339         if (IS_ERR(data->hwmon_dev)) {
2340                 err = PTR_ERR(data->hwmon_dev);
2341                 goto exit_remove;
2342         }
2343
2344         return 0;
2345
2346 exit_remove:
2347         w83627ehf_device_remove_files(dev);
2348         kfree(data);
2349         platform_set_drvdata(pdev, NULL);
2350 exit_release:
2351         release_region(res->start, IOREGION_LENGTH);
2352 exit:
2353         return err;
2354 }
2355
2356 static int __devexit w83627ehf_remove(struct platform_device *pdev)
2357 {
2358         struct w83627ehf_data *data = platform_get_drvdata(pdev);
2359
2360         hwmon_device_unregister(data->hwmon_dev);
2361         w83627ehf_device_remove_files(&pdev->dev);
2362         release_region(data->addr, IOREGION_LENGTH);
2363         platform_set_drvdata(pdev, NULL);
2364         kfree(data);
2365
2366         return 0;
2367 }
2368
2369 static struct platform_driver w83627ehf_driver = {
2370         .driver = {
2371                 .owner  = THIS_MODULE,
2372                 .name   = DRVNAME,
2373         },
2374         .probe          = w83627ehf_probe,
2375         .remove         = __devexit_p(w83627ehf_remove),
2376 };
2377
2378 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2379 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2380                                  struct w83627ehf_sio_data *sio_data)
2381 {
2382         static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
2383         static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
2384         static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
2385         static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
2386         static const char __initdata sio_name_W83667HG[] = "W83667HG";
2387         static const char __initdata sio_name_W83667HG_B[] = "W83667HG-B";
2388         static const char __initdata sio_name_NCT6775[] = "NCT6775F";
2389         static const char __initdata sio_name_NCT6776[] = "NCT6776F";
2390
2391         u16 val;
2392         const char *sio_name;
2393
2394         superio_enter(sioaddr);
2395
2396         if (force_id)
2397                 val = force_id;
2398         else
2399                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2400                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2401         switch (val & SIO_ID_MASK) {
2402         case SIO_W83627EHF_ID:
2403                 sio_data->kind = w83627ehf;
2404                 sio_name = sio_name_W83627EHF;
2405                 break;
2406         case SIO_W83627EHG_ID:
2407                 sio_data->kind = w83627ehf;
2408                 sio_name = sio_name_W83627EHG;
2409                 break;
2410         case SIO_W83627DHG_ID:
2411                 sio_data->kind = w83627dhg;
2412                 sio_name = sio_name_W83627DHG;
2413                 break;
2414         case SIO_W83627DHG_P_ID:
2415                 sio_data->kind = w83627dhg_p;
2416                 sio_name = sio_name_W83627DHG_P;
2417                 break;
2418         case SIO_W83667HG_ID:
2419                 sio_data->kind = w83667hg;
2420                 sio_name = sio_name_W83667HG;
2421                 break;
2422         case SIO_W83667HG_B_ID:
2423                 sio_data->kind = w83667hg_b;
2424                 sio_name = sio_name_W83667HG_B;
2425                 break;
2426         case SIO_NCT6775_ID:
2427                 sio_data->kind = nct6775;
2428                 sio_name = sio_name_NCT6775;
2429                 break;
2430         case SIO_NCT6776_ID:
2431                 sio_data->kind = nct6776;
2432                 sio_name = sio_name_NCT6776;
2433                 break;
2434         default:
2435                 if (val != 0xffff)
2436                         pr_debug("unsupported chip ID: 0x%04x\n", val);
2437                 superio_exit(sioaddr);
2438                 return -ENODEV;
2439         }
2440
2441         /* We have a known chip, find the HWM I/O address */
2442         superio_select(sioaddr, W83627EHF_LD_HWM);
2443         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2444             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2445         *addr = val & IOREGION_ALIGNMENT;
2446         if (*addr == 0) {
2447                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2448                 superio_exit(sioaddr);
2449                 return -ENODEV;
2450         }
2451
2452         /* Activate logical device if needed */
2453         val = superio_inb(sioaddr, SIO_REG_ENABLE);
2454         if (!(val & 0x01)) {
2455                 pr_warn("Forcibly enabling Super-I/O. "
2456                         "Sensor is probably unusable.\n");
2457                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2458         }
2459
2460         superio_exit(sioaddr);
2461         pr_info("Found %s chip at %#x\n", sio_name, *addr);
2462         sio_data->sioreg = sioaddr;
2463
2464         return 0;
2465 }
2466
2467 /* when Super-I/O functions move to a separate file, the Super-I/O
2468  * bus will manage the lifetime of the device and this module will only keep
2469  * track of the w83627ehf driver. But since we platform_device_alloc(), we
2470  * must keep track of the device */
2471 static struct platform_device *pdev;
2472
2473 static int __init sensors_w83627ehf_init(void)
2474 {
2475         int err;
2476         unsigned short address;
2477         struct resource res;
2478         struct w83627ehf_sio_data sio_data;
2479
2480         /* initialize sio_data->kind and sio_data->sioreg.
2481          *
2482          * when Super-I/O functions move to a separate file, the Super-I/O
2483          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2484          * w83627ehf hardware monitor, and call probe() */
2485         if (w83627ehf_find(0x2e, &address, &sio_data) &&
2486             w83627ehf_find(0x4e, &address, &sio_data))
2487                 return -ENODEV;
2488
2489         err = platform_driver_register(&w83627ehf_driver);
2490         if (err)
2491                 goto exit;
2492
2493         pdev = platform_device_alloc(DRVNAME, address);
2494         if (!pdev) {
2495                 err = -ENOMEM;
2496                 pr_err("Device allocation failed\n");
2497                 goto exit_unregister;
2498         }
2499
2500         err = platform_device_add_data(pdev, &sio_data,
2501                                        sizeof(struct w83627ehf_sio_data));
2502         if (err) {
2503                 pr_err("Platform data allocation failed\n");
2504                 goto exit_device_put;
2505         }
2506
2507         memset(&res, 0, sizeof(res));
2508         res.name = DRVNAME;
2509         res.start = address + IOREGION_OFFSET;
2510         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2511         res.flags = IORESOURCE_IO;
2512
2513         err = acpi_check_resource_conflict(&res);
2514         if (err)
2515                 goto exit_device_put;
2516
2517         err = platform_device_add_resources(pdev, &res, 1);
2518         if (err) {
2519                 pr_err("Device resource addition failed (%d)\n", err);
2520                 goto exit_device_put;
2521         }
2522
2523         /* platform_device_add calls probe() */
2524         err = platform_device_add(pdev);
2525         if (err) {
2526                 pr_err("Device addition failed (%d)\n", err);
2527                 goto exit_device_put;
2528         }
2529
2530         return 0;
2531
2532 exit_device_put:
2533         platform_device_put(pdev);
2534 exit_unregister:
2535         platform_driver_unregister(&w83627ehf_driver);
2536 exit:
2537         return err;
2538 }
2539
2540 static void __exit sensors_w83627ehf_exit(void)
2541 {
2542         platform_device_unregister(pdev);
2543         platform_driver_unregister(&w83627ehf_driver);
2544 }
2545
2546 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
2547 MODULE_DESCRIPTION("W83627EHF driver");
2548 MODULE_LICENSE("GPL");
2549
2550 module_init(sensors_w83627ehf_init);
2551 module_exit(sensors_w83627ehf_exit);