3 * Texas Instruments, <www.ti.com>
4 * Syed Mohammed Khasim <khasim@ti.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation's version 2 of
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #ifndef MMC_PROTOCOL_H
26 #define MMC_PROTOCOL_H
28 #include "mmc_host_def.h"
31 #define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK)
32 #define RSP_TYPE_R1 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK)
33 #define RSP_TYPE_R1B (RSP_TYPE_LGHT48B | CCCE_CHECK | CICE_CHECK)
34 #define RSP_TYPE_R2 (RSP_TYPE_LGHT136 | CCCE_CHECK | CICE_NOCHECK)
35 #define RSP_TYPE_R3 (RSP_TYPE_LGHT48 | CCCE_NOCHECK | CICE_NOCHECK)
36 #define RSP_TYPE_R4 (RSP_TYPE_LGHT48 | CCCE_NOCHECK | CICE_NOCHECK)
37 #define RSP_TYPE_R5 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK)
38 #define RSP_TYPE_R6 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK)
39 #define RSP_TYPE_R7 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK)
41 /* All supported commands */
42 #define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
43 #define MMC_CMD1 (INDEX(1) | RSP_TYPE_R3 | DP_NO_DATA | DDIR_WRITE)
44 #define MMC_CMD2 (INDEX(2) | RSP_TYPE_R2 | DP_NO_DATA | DDIR_WRITE)
45 #define MMC_CMD3 (INDEX(3) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
46 #define MMC_SDCMD3 (INDEX(3) | RSP_TYPE_R6 | DP_NO_DATA | DDIR_WRITE)
47 #define MMC_CMD4 (INDEX(4) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
48 #define MMC_CMD6 (INDEX(6) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE)
49 #define MMC_CMD7_SELECT (INDEX(7) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE)
50 #define MMC_CMD7_DESELECT \
51 (INDEX(7) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
52 #define MMC_CMD8 (INDEX(8) | RSP_TYPE_R1 | DP_DATA | DDIR_READ)
53 #define MMC_SDCMD8 (INDEX(8) | RSP_TYPE_R7 | DP_NO_DATA | DDIR_WRITE)
54 #define MMC_CMD9 (INDEX(9) | RSP_TYPE_R2 | DP_NO_DATA | DDIR_WRITE)
55 #define MMC_CMD12 (INDEX(12) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE)
56 #define MMC_CMD13 (INDEX(13) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
57 #define MMC_CMD15 (INDEX(15) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
58 #define MMC_CMD16 (INDEX(16) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
59 #define MMC_CMD17 (INDEX(17) | RSP_TYPE_R1 | DP_DATA | DDIR_READ)
60 #define MMC_CMD24 (INDEX(24) | RSP_TYPE_R1 | DP_DATA | DDIR_WRITE)
61 #define MMC_ACMD6 (INDEX(6) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
62 #define MMC_ACMD41 (INDEX(41) | RSP_TYPE_R3 | DP_NO_DATA | DDIR_WRITE)
63 #define MMC_ACMD51 (INDEX(51) | RSP_TYPE_R1 | DP_DATA | DDIR_READ)
64 #define MMC_CMD55 (INDEX(55) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
66 #define MMC_AC_CMD_RCA_MASK (unsigned int)(0xFFFF << 16)
67 #define MMC_BC_CMD_DSR_MASK (unsigned int)(0xFFFF << 16)
68 #define MMC_DSR_DEFAULT (0x0404)
69 #define SD_CMD8_CHECK_PATTERN (0xAA)
70 #define SD_CMD8_2_7_3_6_V_RANGE (0x01 << 8)
72 /* Clock Configurations and Macros */
74 #define MMC_CLOCK_REFERENCE (96)
75 #define MMC_RELATIVE_CARD_ADDRESS (0x1234)
76 #define MMC_INIT_SEQ_CLK (MMC_CLOCK_REFERENCE * 1000 / 80)
77 #define MMC_400kHz_CLK (MMC_CLOCK_REFERENCE * 1000 / 400)
78 #define CLKDR(r, f, u) ((((r)*100) / ((f)*(u))) + 1)
79 #define CLKD(f, u) (CLKDR(MMC_CLOCK_REFERENCE, f, u))
81 #define MMC_OCR_REG_ACCESS_MODE_MASK (0x3 << 29)
82 #define MMC_OCR_REG_ACCESS_MODE_BYTE (0x0 << 29)
83 #define MMC_OCR_REG_ACCESS_MODE_SECTOR (0x2 << 29)
85 #define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK (0x1 << 30)
86 #define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE (0x0 << 30)
87 #define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR (0x1 << 30)
89 #define MMC_SD2_CSD_C_SIZE_LSB_MASK (0xFFFF)
90 #define MMC_SD2_CSD_C_SIZE_MSB_MASK (0x003F)
91 #define MMC_SD2_CSD_C_SIZE_MSB_OFFSET (16)
92 #define MMC_CSD_C_SIZE_LSB_MASK (0x0003)
93 #define MMC_CSD_C_SIZE_MSB_MASK (0x03FF)
94 #define MMC_CSD_C_SIZE_MSB_OFFSET (2)
96 #define MMC_CSD_TRAN_SPEED_UNIT_MASK (0x07 << 0)
97 #define MMC_CSD_TRAN_SPEED_FACTOR_MASK (0x0F << 3)
98 #define MMC_CSD_TRAN_SPEED_UNIT_100MHZ (0x3 << 0)
99 #define MMC_CSD_TRAN_SPEED_FACTOR_1_0 (0x01 << 3)
100 #define MMC_CSD_TRAN_SPEED_FACTOR_8_0 (0x0F << 3)
102 static const unsigned int tran_exp[] = {
103 10000, 100000, 1000000, 10000000,
107 static const unsigned char tran_mant[] = {
108 0, 10, 12, 13, 15, 20, 25, 30,
109 35, 40, 45, 50, 55, 60, 70, 80,
116 unsigned file_format:2;
117 unsigned tmp_write_protect:1;
118 unsigned perm_write_protect:1;
120 unsigned file_format_grp:1;
121 unsigned content_prot_app:1;
122 unsigned reserved_1:4;
123 unsigned write_bl_partial:1;
124 unsigned write_bl_len:4;
125 unsigned r2w_factor:3;
126 unsigned default_ecc:2;
127 unsigned wp_grp_enable:1;
128 unsigned wp_grp_size:5;
129 unsigned erase_grp_mult:5;
130 unsigned erase_grp_size:5;
131 unsigned c_size_mult:3;
132 unsigned vdd_w_curr_max:3;
133 unsigned vdd_w_curr_min:3;
134 unsigned vdd_r_curr_max:3;
135 unsigned vdd_r_curr_min:3;
136 unsigned c_size_lsb:2;
137 unsigned c_size_msb:10;
138 unsigned reserved_2:2;
140 unsigned read_blk_misalign:1;
141 unsigned write_blk_misalign:1;
142 unsigned read_bl_partial:1;
143 unsigned read_bl_len:4;
145 unsigned tran_speed:8;
148 unsigned reserved_3:2;
149 unsigned spec_vers:4;
150 unsigned csd_structure:2;
157 unsigned reserved_1:2;
158 unsigned file_format:2;
159 unsigned tmp_write_protect:1;
160 unsigned perm_write_protect:1;
162 unsigned file_format_grp:1;
163 unsigned reserved_2:5;
164 unsigned write_bl_partial:1;
165 unsigned write_bl_len:4;
166 unsigned r2w_factor:3;
167 unsigned reserved_3:2;
168 unsigned wp_grp_enable:1;
169 unsigned wp_grp_size:7;
170 unsigned sector_size:7;
171 unsigned erase_blk_len:1;
172 unsigned reserved_4:1;
173 unsigned c_size_lsb:16;
174 unsigned c_size_msb:6;
175 unsigned reserved_5:6;
177 unsigned read_blk_misalign:1;
178 unsigned write_blk_misalign:1;
179 unsigned read_bl_partial:1;
180 unsigned read_bl_len:4;
182 unsigned tran_speed:8;
185 unsigned reserved_6:6;
186 unsigned csd_structure:2;
189 /* extended csd - 512 bytes long */
191 unsigned char reserved_1[181];
192 unsigned char erasedmemorycontent;
193 unsigned char reserved_2;
194 unsigned char buswidthmode;
195 unsigned char reserved_3;
196 unsigned char highspeedinterfacetiming;
197 unsigned char reserved_4;
198 unsigned char powerclass;
199 unsigned char reserved_5;
200 unsigned char commandsetrevision;
201 unsigned char reserved_6;
202 unsigned char commandset;
203 unsigned char extendedcsdrevision;
204 unsigned char reserved_7;
205 unsigned char csdstructureversion;
206 unsigned char reserved_8;
207 unsigned char cardtype;
208 unsigned char reserved_9[3];
209 unsigned char powerclass_52mhz_1_95v;
210 unsigned char powerclass_26mhz_1_95v;
211 unsigned char powerclass_52mhz_3_6v;
212 unsigned char powerclass_26mhz_3_6v;
213 unsigned char reserved_10;
214 unsigned char minreadperf_4b_26mhz;
215 unsigned char minwriteperf_4b_26mhz;
216 unsigned char minreadperf_8b_26mhz_4b_52mhz;
217 unsigned char minwriteperf_8b_26mhz_4b_52mhz;
218 unsigned char minreadperf_8b_52mhz;
219 unsigned char minwriteperf_8b_52mhz;
220 unsigned char reserved_11;
221 unsigned int sectorcount;
222 unsigned char reserved_12[288];
223 unsigned char supportedcommandsets;
224 unsigned char reserved_13[7];
225 } mmc_extended_csd_reg_t;
227 /* mmc sd responce */
233 unsigned short cardstatus;
234 unsigned short newpublishedrca;
237 extern mmc_card_data mmc_dev;
239 unsigned char mmc_lowlevel_init(void);
240 unsigned char mmc_send_command(unsigned int cmd, unsigned int arg,
241 unsigned int *response);
242 unsigned char mmc_setup_clock(unsigned int iclk, unsigned short clkd);
243 unsigned char mmc_set_opendrain(unsigned char state);
244 unsigned char mmc_read_data(unsigned int *output_buf);
246 #endif /*MMC_PROTOCOL_H */