1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2017 Tuomas Tynkkynen
9 #include <asm/armv8/mmu.h>
11 static struct mm_region qemu_arm64_mem_map[] = {
17 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
20 /* Lowmem peripherals */
24 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
26 PTE_BLOCK_PXN | PTE_BLOCK_UXN
31 .size = 255UL * SZ_1G,
32 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
35 /* Highmem PCI-E ECAM memory area */
36 .virt = 0x4010000000ULL,
37 .phys = 0x4010000000ULL,
39 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
41 PTE_BLOCK_PXN | PTE_BLOCK_UXN
43 /* Highmem PCI-E MMIO memory area */
44 .virt = 0x8000000000ULL,
45 .phys = 0x8000000000ULL,
46 .size = 0x8000000000ULL,
47 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
49 PTE_BLOCK_PXN | PTE_BLOCK_UXN
56 struct mm_region *mem_map = qemu_arm64_mem_map;
66 if (fdtdec_setup_mem_size_base() != 0)
72 int dram_init_banksize(void)
74 fdtdec_setup_memory_banksize();
79 void *board_fdt_blob_setup(void)
81 /* QEMU loads a generated DTB for us at the start of RAM. */
82 return (void *)CONFIG_SYS_SDRAM_BASE;