arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <linux/pci.h>
  48 #include <trace/events/kvm.h>
  49
  50 #define CREATE_TRACE_POINTS
  51 #include "trace.h"
  52
  53 #include <asm/debugreg.h>
  54 #include <asm/msr.h>
  55 #include <asm/desc.h>
  56 #include <asm/mtrr.h>
  57 #include <asm/mce.h>
  58 #include <asm/i387.h>
  59 #include <asm/xcr.h>
  60 #include <asm/pvclock.h>
  61 #include <asm/div64.h>
  62
  63 #define MAX_IO_MSRS 256
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  66
  67 #define emul_to_vcpu(ctxt) \
  68         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  69
  70 /* EFER defaults:
  71  * - enable syscall per default because its emulated by KVM
  72  * - enable LME and LMA per default on 64 bit KVM
  73  */
  74 #ifdef CONFIG_X86_64
  75 static
  76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 int ignore_msrs = 0;
  93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 bool kvm_has_tsc_control;
  96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  97 u32  kvm_max_guest_tsc_khz;
  98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  99
 100 #define KVM_NR_SHARED_MSRS 16
 101
 102 struct kvm_shared_msrs_global {
 103         int nr;
 104         u32 msrs[KVM_NR_SHARED_MSRS];
 105 };
 106
 107 struct kvm_shared_msrs {
 108         struct user_return_notifier urn;
 109         bool registered;
 110         struct kvm_shared_msr_values {
 111                 u64 host;
 112                 u64 curr;
 113         } values[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 117 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 118
 119 struct kvm_stats_debugfs_item debugfs_entries[] = {
 120         { "pf_fixed", VCPU_STAT(pf_fixed) },
 121         { "pf_guest", VCPU_STAT(pf_guest) },
 122         { "tlb_flush", VCPU_STAT(tlb_flush) },
 123         { "invlpg", VCPU_STAT(invlpg) },
 124         { "exits", VCPU_STAT(exits) },
 125         { "io_exits", VCPU_STAT(io_exits) },
 126         { "mmio_exits", VCPU_STAT(mmio_exits) },
 127         { "signal_exits", VCPU_STAT(signal_exits) },
 128         { "irq_window", VCPU_STAT(irq_window_exits) },
 129         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 130         { "halt_exits", VCPU_STAT(halt_exits) },
 131         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 132         { "hypercalls", VCPU_STAT(hypercalls) },
 133         { "request_irq", VCPU_STAT(request_irq_exits) },
 134         { "irq_exits", VCPU_STAT(irq_exits) },
 135         { "host_state_reload", VCPU_STAT(host_state_reload) },
 136         { "efer_reload", VCPU_STAT(efer_reload) },
 137         { "fpu_reload", VCPU_STAT(fpu_reload) },
 138         { "insn_emulation", VCPU_STAT(insn_emulation) },
 139         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 140         { "irq_injections", VCPU_STAT(irq_injections) },
 141         { "nmi_injections", VCPU_STAT(nmi_injections) },
 142         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 143         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 144         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 145         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 146         { "mmu_flooded", VM_STAT(mmu_flooded) },
 147         { "mmu_recycled", VM_STAT(mmu_recycled) },
 148         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 149         { "mmu_unsync", VM_STAT(mmu_unsync) },
 150         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 151         { "largepages", VM_STAT(lpages) },
 152         { NULL }
 153 };
 154
 155 u64 __read_mostly host_xcr0;
 156
 157 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 338 {
 339         if (err)
 340                 kvm_inject_gp(vcpu, 0);
 341         else
 342                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 345
 346 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 347 {
 348         ++vcpu->stat.pf_guest;
 349         vcpu->arch.cr2 = fault->address;
 350         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 351 }
 352 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 353
 354 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 355 {
 356         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 357                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 358         else
 359                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 360 }
 361
 362 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 363 {
 364         atomic_inc(&vcpu->arch.nmi_queued);
 365         kvm_make_request(KVM_REQ_NMI, vcpu);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 368
 369 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 374
 375 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 376 {
 377         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 380
 381 /*
 382  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 383  * a #GP and return false.
 384  */
 385 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 386 {
 387         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 388                 return true;
 389         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 390         return false;
 391 }
 392 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 393
 394 /*
 395  * This function will be used to read from the physical memory of the currently
 396  * running guest. The difference to kvm_read_guest_page is that this function
 397  * can read from guest physical or from the guest's guest physical memory.
 398  */
 399 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 400                             gfn_t ngfn, void *data, int offset, int len,
 401                             u32 access)
 402 {
 403         gfn_t real_gfn;
 404         gpa_t ngpa;
 405
 406         ngpa     = gfn_to_gpa(ngfn);
 407         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 408         if (real_gfn == UNMAPPED_GVA)
 409                 return -EFAULT;
 410
 411         real_gfn = gpa_to_gfn(real_gfn);
 412
 413         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 416
 417 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 418                                void *data, int offset, int len, u32 access)
 419 {
 420         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 421                                        data, offset, len, access);
 422 }
 423
 424 /*
 425  * Load the pae pdptrs.  Return true is they are all valid.
 426  */
 427 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 428 {
 429         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 430         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 431         int i;
 432         int ret;
 433         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 434
 435         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 436                                       offset * sizeof(u64), sizeof(pdpte),
 437                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 438         if (ret < 0) {
 439                 ret = 0;
 440                 goto out;
 441         }
 442         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 443                 if (is_present_gpte(pdpte[i]) &&
 444                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 445                         ret = 0;
 446                         goto out;
 447                 }
 448         }
 449         ret = 1;
 450
 451         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_avail);
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_dirty);
 456 out:
 457
 458         return ret;
 459 }
 460 EXPORT_SYMBOL_GPL(load_pdptrs);
 461
 462 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 463 {
 464         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 465         bool changed = true;
 466         int offset;
 467         gfn_t gfn;
 468         int r;
 469
 470         if (is_long_mode(vcpu) || !is_pae(vcpu))
 471                 return false;
 472
 473         if (!test_bit(VCPU_EXREG_PDPTR,
 474                       (unsigned long *)&vcpu->arch.regs_avail))
 475                 return true;
 476
 477         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 478         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 479         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 480                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 481         if (r < 0)
 482                 goto out;
 483         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 484 out:
 485
 486         return changed;
 487 }
 488
 489 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 490 {
 491         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 492         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 493                                     X86_CR0_CD | X86_CR0_NW;
 494
 495         cr0 |= X86_CR0_ET;
 496
 497 #ifdef CONFIG_X86_64
 498         if (cr0 & 0xffffffff00000000UL)
 499                 return 1;
 500 #endif
 501
 502         cr0 &= ~CR0_RESERVED_BITS;
 503
 504         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 505                 return 1;
 506
 507         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 508                 return 1;
 509
 510         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 511 #ifdef CONFIG_X86_64
 512                 if ((vcpu->arch.efer & EFER_LME)) {
 513                         int cs_db, cs_l;
 514
 515                         if (!is_pae(vcpu))
 516                                 return 1;
 517                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 518                         if (cs_l)
 519                                 return 1;
 520                 } else
 521 #endif
 522                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 523                                                  kvm_read_cr3(vcpu)))
 524                         return 1;
 525         }
 526
 527         kvm_x86_ops->set_cr0(vcpu, cr0);
 528
 529         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 530                 kvm_clear_async_pf_completion_queue(vcpu);
 531                 kvm_async_pf_hash_reset(vcpu);
 532         }
 533
 534         if ((cr0 ^ old_cr0) & update_bits)
 535                 kvm_mmu_reset_context(vcpu);
 536         return 0;
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 539
 540 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 541 {
 542         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 543 }
 544 EXPORT_SYMBOL_GPL(kvm_lmsw);
 545
 546 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 547 {
 548         u64 xcr0;
 549
 550         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 551         if (index != XCR_XFEATURE_ENABLED_MASK)
 552                 return 1;
 553         xcr0 = xcr;
 554         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 555                 return 1;
 556         if (!(xcr0 & XSTATE_FP))
 557                 return 1;
 558         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 559                 return 1;
 560         if (xcr0 & ~host_xcr0)
 561                 return 1;
 562         vcpu->arch.xcr0 = xcr0;
 563         vcpu->guest_xcr0_loaded = 0;
 564         return 0;
 565 }
 566
 567 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 568 {
 569         if (__kvm_set_xcr(vcpu, index, xcr)) {
 570                 kvm_inject_gp(vcpu, 0);
 571                 return 1;
 572         }
 573         return 0;
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 576
 577 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 578 {
 579         struct kvm_cpuid_entry2 *best;
 580
 581         if (!static_cpu_has(X86_FEATURE_XSAVE))
 582                 return 0;
 583
 584         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 585         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 586 }
 587
 588 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 589 {
 590         struct kvm_cpuid_entry2 *best;
 591
 592         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 593         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 594 }
 595
 596 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 597 {
 598         struct kvm_cpuid_entry2 *best;
 599
 600         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 601         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 602 }
 603
 604 static void update_cpuid(struct kvm_vcpu *vcpu)
 605 {
 606         struct kvm_cpuid_entry2 *best;
 607         struct kvm_lapic *apic = vcpu->arch.apic;
 608
 609         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 610         if (!best)
 611                 return;
 612
 613         /* Update OSXSAVE bit */
 614         if (cpu_has_xsave && best->function == 0x1) {
 615                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 616                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 617                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 618         }
 619
 620         if (apic) {
 621                 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
 622                         apic->lapic_timer.timer_mode_mask = 3 << 17;
 623                 else
 624                         apic->lapic_timer.timer_mode_mask = 1 << 17;
 625         }
 626 }
 627
 628 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 629 {
 630         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 631         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 632                                    X86_CR4_PAE | X86_CR4_SMEP;
 633         if (cr4 & CR4_RESERVED_BITS)
 634                 return 1;
 635
 636         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 637                 return 1;
 638
 639         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 640                 return 1;
 641
 642         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 643                 return 1;
 644
 645         if (is_long_mode(vcpu)) {
 646                 if (!(cr4 & X86_CR4_PAE))
 647                         return 1;
 648         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 649                    && ((cr4 ^ old_cr4) & pdptr_bits)
 650                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 651                                    kvm_read_cr3(vcpu)))
 652                 return 1;
 653
 654         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 655                 return 1;
 656
 657         if ((cr4 ^ old_cr4) & pdptr_bits)
 658                 kvm_mmu_reset_context(vcpu);
 659
 660         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 661                 update_cpuid(vcpu);
 662
 663         return 0;
 664 }
 665 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 666
 667 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 668 {
 669         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 670                 kvm_mmu_sync_roots(vcpu);
 671                 kvm_mmu_flush_tlb(vcpu);
 672                 return 0;
 673         }
 674
 675         if (is_long_mode(vcpu)) {
 676                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 677                         return 1;
 678         } else {
 679                 if (is_pae(vcpu)) {
 680                         if (cr3 & CR3_PAE_RESERVED_BITS)
 681                                 return 1;
 682                         if (is_paging(vcpu) &&
 683                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 684                                 return 1;
 685                 }
 686                 /*
 687                  * We don't check reserved bits in nonpae mode, because
 688                  * this isn't enforced, and VMware depends on this.
 689                  */
 690         }
 691
 692         /*
 693          * Does the new cr3 value map to physical memory? (Note, we
 694          * catch an invalid cr3 even in real-mode, because it would
 695          * cause trouble later on when we turn on paging anyway.)
 696          *
 697          * A real CPU would silently accept an invalid cr3 and would
 698          * attempt to use it - with largely undefined (and often hard
 699          * to debug) behavior on the guest side.
 700          */
 701         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 702                 return 1;
 703         vcpu->arch.cr3 = cr3;
 704         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 705         vcpu->arch.mmu.new_cr3(vcpu);
 706         return 0;
 707 }
 708 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 709
 710 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 711 {
 712         if (cr8 & CR8_RESERVED_BITS)
 713                 return 1;
 714         if (irqchip_in_kernel(vcpu->kvm))
 715                 kvm_lapic_set_tpr(vcpu, cr8);
 716         else
 717                 vcpu->arch.cr8 = cr8;
 718         return 0;
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 721
 722 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 723 {
 724         if (irqchip_in_kernel(vcpu->kvm))
 725                 return kvm_lapic_get_cr8(vcpu);
 726         else
 727                 return vcpu->arch.cr8;
 728 }
 729 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 730
 731 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 732 {
 733         switch (dr) {
 734         case 0 ... 3:
 735                 vcpu->arch.db[dr] = val;
 736                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 737                         vcpu->arch.eff_db[dr] = val;
 738                 break;
 739         case 4:
 740                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 741                         return 1; /* #UD */
 742                 /* fall through */
 743         case 6:
 744                 if (val & 0xffffffff00000000ULL)
 745                         return -1; /* #GP */
 746                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 747                 break;
 748         case 5:
 749                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 750                         return 1; /* #UD */
 751                 /* fall through */
 752         default: /* 7 */
 753                 if (val & 0xffffffff00000000ULL)
 754                         return -1; /* #GP */
 755                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 756                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 757                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 758                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 759                 }
 760                 break;
 761         }
 762
 763         return 0;
 764 }
 765
 766 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 767 {
 768         int res;
 769
 770         res = __kvm_set_dr(vcpu, dr, val);
 771         if (res > 0)
 772                 kvm_queue_exception(vcpu, UD_VECTOR);
 773         else if (res < 0)
 774                 kvm_inject_gp(vcpu, 0);
 775
 776         return res;
 777 }
 778 EXPORT_SYMBOL_GPL(kvm_set_dr);
 779
 780 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 781 {
 782         switch (dr) {
 783         case 0 ... 3:
 784                 *val = vcpu->arch.db[dr];
 785                 break;
 786         case 4:
 787                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 788                         return 1;
 789                 /* fall through */
 790         case 6:
 791                 *val = vcpu->arch.dr6;
 792                 break;
 793         case 5:
 794                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 795                         return 1;
 796                 /* fall through */
 797         default: /* 7 */
 798                 *val = vcpu->arch.dr7;
 799                 break;
 800         }
 801
 802         return 0;
 803 }
 804
 805 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 806 {
 807         if (_kvm_get_dr(vcpu, dr, val)) {
 808                 kvm_queue_exception(vcpu, UD_VECTOR);
 809                 return 1;
 810         }
 811         return 0;
 812 }
 813 EXPORT_SYMBOL_GPL(kvm_get_dr);
 814
 815 /*
 816  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 817  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 818  *
 819  * This list is modified at module load time to reflect the
 820  * capabilities of the host cpu. This capabilities test skips MSRs that are
 821  * kvm-specific. Those are put in the beginning of the list.
 822  */
 823
 824 #define KVM_SAVE_MSRS_BEGIN     9
 825 static u32 msrs_to_save[] = {
 826         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 827         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 828         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 829         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 830         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 831         MSR_STAR,
 832 #ifdef CONFIG_X86_64
 833         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 834 #endif
 835         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 836 };
 837
 838 static unsigned num_msrs_to_save;
 839
 840 static u32 emulated_msrs[] = {
 841         MSR_IA32_TSCDEADLINE,
 842         MSR_IA32_MISC_ENABLE,
 843         MSR_IA32_MCG_STATUS,
 844         MSR_IA32_MCG_CTL,
 845 };
 846
 847 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 848 {
 849         u64 old_efer = vcpu->arch.efer;
 850
 851         if (efer & efer_reserved_bits)
 852                 return 1;
 853
 854         if (is_paging(vcpu)
 855             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 856                 return 1;
 857
 858         if (efer & EFER_FFXSR) {
 859                 struct kvm_cpuid_entry2 *feat;
 860
 861                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 862                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 863                         return 1;
 864         }
 865
 866         if (efer & EFER_SVME) {
 867                 struct kvm_cpuid_entry2 *feat;
 868
 869                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 870                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 871                         return 1;
 872         }
 873
 874         efer &= ~EFER_LMA;
 875         efer |= vcpu->arch.efer & EFER_LMA;
 876
 877         kvm_x86_ops->set_efer(vcpu, efer);
 878
 879         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 880
 881         /* Update reserved bits */
 882         if ((efer ^ old_efer) & EFER_NX)
 883                 kvm_mmu_reset_context(vcpu);
 884
 885         return 0;
 886 }
 887
 888 void kvm_enable_efer_bits(u64 mask)
 889 {
 890        efer_reserved_bits &= ~mask;
 891 }
 892 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 893
 894
 895 /*
 896  * Writes msr value into into the appropriate "register".
 897  * Returns 0 on success, non-0 otherwise.
 898  * Assumes vcpu_load() was already called.
 899  */
 900 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 901 {
 902         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 903 }
 904
 905 /*
 906  * Adapt set_msr() to msr_io()'s calling convention
 907  */
 908 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 909 {
 910         return kvm_set_msr(vcpu, index, *data);
 911 }
 912
 913 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 914 {
 915         int version;
 916         int r;
 917         struct pvclock_wall_clock wc;
 918         struct timespec boot;
 919
 920         if (!wall_clock)
 921                 return;
 922
 923         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 924         if (r)
 925                 return;
 926
 927         if (version & 1)
 928                 ++version;  /* first time write, random junk */
 929
 930         ++version;
 931
 932         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 933
 934         /*
 935          * The guest calculates current wall clock time by adding
 936          * system time (updated by kvm_guest_time_update below) to the
 937          * wall clock specified here.  guest system time equals host
 938          * system time for us, thus we must fill in host boot time here.
 939          */
 940         getboottime(&boot);
 941
 942         wc.sec = boot.tv_sec;
 943         wc.nsec = boot.tv_nsec;
 944         wc.version = version;
 945
 946         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 947
 948         version++;
 949         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 950 }
 951
 952 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 953 {
 954         uint32_t quotient, remainder;
 955
 956         /* Don't try to replace with do_div(), this one calculates
 957          * "(dividend << 32) / divisor" */
 958         __asm__ ( "divl %4"
 959                   : "=a" (quotient), "=d" (remainder)
 960                   : "0" (0), "1" (dividend), "r" (divisor) );
 961         return quotient;
 962 }
 963
 964 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 965                                s8 *pshift, u32 *pmultiplier)
 966 {
 967         uint64_t scaled64;
 968         int32_t  shift = 0;
 969         uint64_t tps64;
 970         uint32_t tps32;
 971
 972         tps64 = base_khz * 1000LL;
 973         scaled64 = scaled_khz * 1000LL;
 974         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 975                 tps64 >>= 1;
 976                 shift--;
 977         }
 978
 979         tps32 = (uint32_t)tps64;
 980         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 981                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 982                         scaled64 >>= 1;
 983                 else
 984                         tps32 <<= 1;
 985                 shift++;
 986         }
 987
 988         *pshift = shift;
 989         *pmultiplier = div_frac(scaled64, tps32);
 990
 991         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 992                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 993 }
 994
 995 static inline u64 get_kernel_ns(void)
 996 {
 997         struct timespec ts;
 998
 999         WARN_ON(preemptible());
1000         ktime_get_ts(&ts);
1001         monotonic_to_bootbased(&ts);
1002         return timespec_to_ns(&ts);
1003 }
1004
1005 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1006 unsigned long max_tsc_khz;
1007
1008 static inline int kvm_tsc_changes_freq(void)
1009 {
1010         int cpu = get_cpu();
1011         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
1012                   cpufreq_quick_get(cpu) != 0;
1013         put_cpu();
1014         return ret;
1015 }
1016
1017 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1018 {
1019         if (vcpu->arch.virtual_tsc_khz)
1020                 return vcpu->arch.virtual_tsc_khz;
1021         else
1022                 return __this_cpu_read(cpu_tsc_khz);
1023 }
1024
1025 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1026 {
1027         u64 ret;
1028
1029         WARN_ON(preemptible());
1030         if (kvm_tsc_changes_freq())
1031                 printk_once(KERN_WARNING
1032                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1033         ret = nsec * vcpu_tsc_khz(vcpu);
1034         do_div(ret, USEC_PER_SEC);
1035         return ret;
1036 }
1037
1038 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1039 {
1040         /* Compute a scale to convert nanoseconds in TSC cycles */
1041         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1042                            &vcpu->arch.tsc_catchup_shift,
1043                            &vcpu->arch.tsc_catchup_mult);
1044 }
1045
1046 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1047 {
1048         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1049                                       vcpu->arch.tsc_catchup_mult,
1050                                       vcpu->arch.tsc_catchup_shift);
1051         tsc += vcpu->arch.last_tsc_write;
1052         return tsc;
1053 }
1054
1055 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1056 {
1057         struct kvm *kvm = vcpu->kvm;
1058         u64 offset, ns, elapsed;
1059         unsigned long flags;
1060         s64 sdiff;
1061
1062         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1063         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1064         ns = get_kernel_ns();
1065         elapsed = ns - kvm->arch.last_tsc_nsec;
1066         sdiff = data - kvm->arch.last_tsc_write;
1067         if (sdiff < 0)
1068                 sdiff = -sdiff;
1069
1070         /*
1071          * Special case: close write to TSC within 5 seconds of
1072          * another CPU is interpreted as an attempt to synchronize
1073          * The 5 seconds is to accommodate host load / swapping as
1074          * well as any reset of TSC during the boot process.
1075          *
1076          * In that case, for a reliable TSC, we can match TSC offsets,
1077          * or make a best guest using elapsed value.
1078          */
1079         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1080             elapsed < 5ULL * NSEC_PER_SEC) {
1081                 if (!check_tsc_unstable()) {
1082                         offset = kvm->arch.last_tsc_offset;
1083                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1084                 } else {
1085                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1086                         offset += delta;
1087                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1088                 }
1089                 ns = kvm->arch.last_tsc_nsec;
1090         }
1091         kvm->arch.last_tsc_nsec = ns;
1092         kvm->arch.last_tsc_write = data;
1093         kvm->arch.last_tsc_offset = offset;
1094         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1095         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1096
1097         /* Reset of TSC must disable overshoot protection below */
1098         vcpu->arch.hv_clock.tsc_timestamp = 0;
1099         vcpu->arch.last_tsc_write = data;
1100         vcpu->arch.last_tsc_nsec = ns;
1101 }
1102 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1103
1104 static int kvm_guest_time_update(struct kvm_vcpu *v)
1105 {
1106         unsigned long flags;
1107         struct kvm_vcpu_arch *vcpu = &v->arch;
1108         unsigned long this_tsc_khz;
1109         s64 kernel_ns, max_kernel_ns;
1110         u64 tsc_timestamp;
1111
1112         /* Keep irq disabled to prevent changes to the clock */
1113         local_irq_save(flags);
1114         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1115         kernel_ns = get_kernel_ns();
1116         this_tsc_khz = vcpu_tsc_khz(v);
1117         if (unlikely(this_tsc_khz == 0)) {
1118                 local_irq_restore(flags);
1119                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1120                 return 1;
1121         }
1122
1123         /*
1124          * We may have to catch up the TSC to match elapsed wall clock
1125          * time for two reasons, even if kvmclock is used.
1126          *   1) CPU could have been running below the maximum TSC rate
1127          *   2) Broken TSC compensation resets the base at each VCPU
1128          *      entry to avoid unknown leaps of TSC even when running
1129          *      again on the same CPU.  This may cause apparent elapsed
1130          *      time to disappear, and the guest to stand still or run
1131          *      very slowly.
1132          */
1133         if (vcpu->tsc_catchup) {
1134                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1135                 if (tsc > tsc_timestamp) {
1136                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1137                         tsc_timestamp = tsc;
1138                 }
1139         }
1140
1141         local_irq_restore(flags);
1142
1143         if (!vcpu->pv_time_enabled)
1144                 return 0;
1145
1146         /*
1147          * Time as measured by the TSC may go backwards when resetting the base
1148          * tsc_timestamp.  The reason for this is that the TSC resolution is
1149          * higher than the resolution of the other clock scales.  Thus, many
1150          * possible measurments of the TSC correspond to one measurement of any
1151          * other clock, and so a spread of values is possible.  This is not a
1152          * problem for the computation of the nanosecond clock; with TSC rates
1153          * around 1GHZ, there can only be a few cycles which correspond to one
1154          * nanosecond value, and any path through this code will inevitably
1155          * take longer than that.  However, with the kernel_ns value itself,
1156          * the precision may be much lower, down to HZ granularity.  If the
1157          * first sampling of TSC against kernel_ns ends in the low part of the
1158          * range, and the second in the high end of the range, we can get:
1159          *
1160          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1161          *
1162          * As the sampling errors potentially range in the thousands of cycles,
1163          * it is possible such a time value has already been observed by the
1164          * guest.  To protect against this, we must compute the system time as
1165          * observed by the guest and ensure the new system time is greater.
1166          */
1167         max_kernel_ns = 0;
1168         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1169                 max_kernel_ns = vcpu->last_guest_tsc -
1170                                 vcpu->hv_clock.tsc_timestamp;
1171                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1172                                     vcpu->hv_clock.tsc_to_system_mul,
1173                                     vcpu->hv_clock.tsc_shift);
1174                 max_kernel_ns += vcpu->last_kernel_ns;
1175         }
1176
1177         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1178                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1179                                    &vcpu->hv_clock.tsc_shift,
1180                                    &vcpu->hv_clock.tsc_to_system_mul);
1181                 vcpu->hw_tsc_khz = this_tsc_khz;
1182         }
1183
1184         if (max_kernel_ns > kernel_ns)
1185                 kernel_ns = max_kernel_ns;
1186
1187         /* With all the info we got, fill in the values */
1188         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1189         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1190         vcpu->last_kernel_ns = kernel_ns;
1191         vcpu->last_guest_tsc = tsc_timestamp;
1192         vcpu->hv_clock.flags = 0;
1193
1194         /*
1195          * The interface expects us to write an even number signaling that the
1196          * update is finished. Since the guest won't see the intermediate
1197          * state, we just increase by 2 at the end.
1198          */
1199         vcpu->hv_clock.version += 2;
1200
1201         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1202                                 &vcpu->hv_clock,
1203                                 sizeof(vcpu->hv_clock));
1204         return 0;
1205 }
1206
1207 static bool msr_mtrr_valid(unsigned msr)
1208 {
1209         switch (msr) {
1210         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1211         case MSR_MTRRfix64K_00000:
1212         case MSR_MTRRfix16K_80000:
1213         case MSR_MTRRfix16K_A0000:
1214         case MSR_MTRRfix4K_C0000:
1215         case MSR_MTRRfix4K_C8000:
1216         case MSR_MTRRfix4K_D0000:
1217         case MSR_MTRRfix4K_D8000:
1218         case MSR_MTRRfix4K_E0000:
1219         case MSR_MTRRfix4K_E8000:
1220         case MSR_MTRRfix4K_F0000:
1221         case MSR_MTRRfix4K_F8000:
1222         case MSR_MTRRdefType:
1223         case MSR_IA32_CR_PAT:
1224                 return true;
1225         case 0x2f8:
1226                 return true;
1227         }
1228         return false;
1229 }
1230
1231 static bool valid_pat_type(unsigned t)
1232 {
1233         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1234 }
1235
1236 static bool valid_mtrr_type(unsigned t)
1237 {
1238         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1239 }
1240
1241 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1242 {
1243         int i;
1244
1245         if (!msr_mtrr_valid(msr))
1246                 return false;
1247
1248         if (msr == MSR_IA32_CR_PAT) {
1249                 for (i = 0; i < 8; i++)
1250                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1251                                 return false;
1252                 return true;
1253         } else if (msr == MSR_MTRRdefType) {
1254                 if (data & ~0xcff)
1255                         return false;
1256                 return valid_mtrr_type(data & 0xff);
1257         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1258                 for (i = 0; i < 8 ; i++)
1259                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1260                                 return false;
1261                 return true;
1262         }
1263
1264         /* variable MTRRs */
1265         return valid_mtrr_type(data & 0xff);
1266 }
1267
1268 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1269 {
1270         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1271
1272         if (!mtrr_valid(vcpu, msr, data))
1273                 return 1;
1274
1275         if (msr == MSR_MTRRdefType) {
1276                 vcpu->arch.mtrr_state.def_type = data;
1277                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1278         } else if (msr == MSR_MTRRfix64K_00000)
1279                 p[0] = data;
1280         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1281                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1282         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1283                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1284         else if (msr == MSR_IA32_CR_PAT)
1285                 vcpu->arch.pat = data;
1286         else {  /* Variable MTRRs */
1287                 int idx, is_mtrr_mask;
1288                 u64 *pt;
1289
1290                 idx = (msr - 0x200) / 2;
1291                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1292                 if (!is_mtrr_mask)
1293                         pt =
1294                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1295                 else
1296                         pt =
1297                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1298                 *pt = data;
1299         }
1300
1301         kvm_mmu_reset_context(vcpu);
1302         return 0;
1303 }
1304
1305 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1306 {
1307         u64 mcg_cap = vcpu->arch.mcg_cap;
1308         unsigned bank_num = mcg_cap & 0xff;
1309
1310         switch (msr) {
1311         case MSR_IA32_MCG_STATUS:
1312                 vcpu->arch.mcg_status = data;
1313                 break;
1314         case MSR_IA32_MCG_CTL:
1315                 if (!(mcg_cap & MCG_CTL_P))
1316                         return 1;
1317                 if (data != 0 && data != ~(u64)0)
1318                         return -1;
1319                 vcpu->arch.mcg_ctl = data;
1320                 break;
1321         default:
1322                 if (msr >= MSR_IA32_MC0_CTL &&
1323                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1324                         u32 offset = msr - MSR_IA32_MC0_CTL;
1325                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1326                          * some Linux kernels though clear bit 10 in bank 4 to
1327                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1328                          * this to avoid an uncatched #GP in the guest
1329                          */
1330                         if ((offset & 0x3) == 0 &&
1331                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1332                                 return -1;
1333                         vcpu->arch.mce_banks[offset] = data;
1334                         break;
1335                 }
1336                 return 1;
1337         }
1338         return 0;
1339 }
1340
1341 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1342 {
1343         struct kvm *kvm = vcpu->kvm;
1344         int lm = is_long_mode(vcpu);
1345         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1346                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1347         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1348                 : kvm->arch.xen_hvm_config.blob_size_32;
1349         u32 page_num = data & ~PAGE_MASK;
1350         u64 page_addr = data & PAGE_MASK;
1351         u8 *page;
1352         int r;
1353
1354         r = -E2BIG;
1355         if (page_num >= blob_size)
1356                 goto out;
1357         r = -ENOMEM;
1358         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1359         if (!page)
1360                 goto out;
1361         r = -EFAULT;
1362         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1363                 goto out_free;
1364         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1365                 goto out_free;
1366         r = 0;
1367 out_free:
1368         kfree(page);
1369 out:
1370         return r;
1371 }
1372
1373 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1374 {
1375         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1376 }
1377
1378 static bool kvm_hv_msr_partition_wide(u32 msr)
1379 {
1380         bool r = false;
1381         switch (msr) {
1382         case HV_X64_MSR_GUEST_OS_ID:
1383         case HV_X64_MSR_HYPERCALL:
1384                 r = true;
1385                 break;
1386         }
1387
1388         return r;
1389 }
1390
1391 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1392 {
1393         struct kvm *kvm = vcpu->kvm;
1394
1395         switch (msr) {
1396         case HV_X64_MSR_GUEST_OS_ID:
1397                 kvm->arch.hv_guest_os_id = data;
1398                 /* setting guest os id to zero disables hypercall page */
1399                 if (!kvm->arch.hv_guest_os_id)
1400                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1401                 break;
1402         case HV_X64_MSR_HYPERCALL: {
1403                 u64 gfn;
1404                 unsigned long addr;
1405                 u8 instructions[4];
1406
1407                 /* if guest os id is not set hypercall should remain disabled */
1408                 if (!kvm->arch.hv_guest_os_id)
1409                         break;
1410                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1411                         kvm->arch.hv_hypercall = data;
1412                         break;
1413                 }
1414                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1415                 addr = gfn_to_hva(kvm, gfn);
1416                 if (kvm_is_error_hva(addr))
1417                         return 1;
1418                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1419                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1420                 if (__copy_to_user((void __user *)addr, instructions, 4))
1421                         return 1;
1422                 kvm->arch.hv_hypercall = data;
1423                 break;
1424         }
1425         default:
1426                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1427                           "data 0x%llx\n", msr, data);
1428                 return 1;
1429         }
1430         return 0;
1431 }
1432
1433 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1434 {
1435         switch (msr) {
1436         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1437                 unsigned long addr;
1438
1439                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1440                         vcpu->arch.hv_vapic = data;
1441                         break;
1442                 }
1443                 addr = gfn_to_hva(vcpu->kvm, data >>
1444                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1445                 if (kvm_is_error_hva(addr))
1446                         return 1;
1447                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1448                         return 1;
1449                 vcpu->arch.hv_vapic = data;
1450                 break;
1451         }
1452         case HV_X64_MSR_EOI:
1453                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1454         case HV_X64_MSR_ICR:
1455                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1456         case HV_X64_MSR_TPR:
1457                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1458         default:
1459                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1460                           "data 0x%llx\n", msr, data);
1461                 return 1;
1462         }
1463
1464         return 0;
1465 }
1466
1467 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1468 {
1469         gpa_t gpa = data & ~0x3f;
1470
1471         /* Bits 2:5 are resrved, Should be zero */
1472         if (data & 0x3c)
1473                 return 1;
1474
1475         vcpu->arch.apf.msr_val = data;
1476
1477         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1478                 kvm_clear_async_pf_completion_queue(vcpu);
1479                 kvm_async_pf_hash_reset(vcpu);
1480                 return 0;
1481         }
1482
1483         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1484                                         sizeof(u32)))
1485                 return 1;
1486
1487         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1488         kvm_async_pf_wakeup_all(vcpu);
1489         return 0;
1490 }
1491
1492 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1493 {
1494         vcpu->arch.pv_time_enabled = false;
1495 }
1496
1497 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1498 {
1499         u64 delta;
1500
1501         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1502                 return;
1503
1504         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1505         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1506         vcpu->arch.st.accum_steal = delta;
1507 }
1508
1509 static void record_steal_time(struct kvm_vcpu *vcpu)
1510 {
1511         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1512                 return;
1513
1514         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1515                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1516                 return;
1517
1518         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1519         vcpu->arch.st.steal.version += 2;
1520         vcpu->arch.st.accum_steal = 0;
1521
1522         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1523                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1524 }
1525
1526 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1527 {
1528         switch (msr) {
1529         case MSR_EFER:
1530                 return set_efer(vcpu, data);
1531         case MSR_K7_HWCR:
1532                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1533                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1534                 if (data != 0) {
1535                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1536                                 data);
1537                         return 1;
1538                 }
1539                 break;
1540         case MSR_FAM10H_MMIO_CONF_BASE:
1541                 if (data != 0) {
1542                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1543                                 "0x%llx\n", data);
1544                         return 1;
1545                 }
1546                 break;
1547         case MSR_AMD64_NB_CFG:
1548                 break;
1549         case MSR_IA32_DEBUGCTLMSR:
1550                 if (!data) {
1551                         /* We support the non-activated case already */
1552                         break;
1553                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1554                         /* Values other than LBR and BTF are vendor-specific,
1555                            thus reserved and should throw a #GP */
1556                         return 1;
1557                 }
1558                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1559                         __func__, data);
1560                 break;
1561         case MSR_IA32_UCODE_REV:
1562         case MSR_IA32_UCODE_WRITE:
1563         case MSR_VM_HSAVE_PA:
1564         case MSR_AMD64_PATCH_LOADER:
1565                 break;
1566         case 0x200 ... 0x2ff:
1567                 return set_msr_mtrr(vcpu, msr, data);
1568         case MSR_IA32_APICBASE:
1569                 kvm_set_apic_base(vcpu, data);
1570                 break;
1571         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1572                 return kvm_x2apic_msr_write(vcpu, msr, data);
1573         case MSR_IA32_TSCDEADLINE:
1574                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1575                 break;
1576         case MSR_IA32_MISC_ENABLE:
1577                 vcpu->arch.ia32_misc_enable_msr = data;
1578                 break;
1579         case MSR_KVM_WALL_CLOCK_NEW:
1580         case MSR_KVM_WALL_CLOCK:
1581                 vcpu->kvm->arch.wall_clock = data;
1582                 kvm_write_wall_clock(vcpu->kvm, data);
1583                 break;
1584         case MSR_KVM_SYSTEM_TIME_NEW:
1585         case MSR_KVM_SYSTEM_TIME: {
1586                 u64 gpa_offset;
1587                 kvmclock_reset(vcpu);
1588
1589                 vcpu->arch.time = data;
1590                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1591
1592                 /* we verify if the enable bit is set... */
1593                 if (!(data & 1))
1594                         break;
1595
1596                 gpa_offset = data & ~(PAGE_MASK | 1);
1597
1598                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1599                      &vcpu->arch.pv_time, data & ~1ULL,
1600                      sizeof(struct pvclock_vcpu_time_info)))
1601                         vcpu->arch.pv_time_enabled = false;
1602                 else
1603                         vcpu->arch.pv_time_enabled = true;
1604                 break;
1605         }
1606         case MSR_KVM_ASYNC_PF_EN:
1607                 if (kvm_pv_enable_async_pf(vcpu, data))
1608                         return 1;
1609                 break;
1610         case MSR_KVM_STEAL_TIME:
1611
1612                 if (unlikely(!sched_info_on()))
1613                         return 1;
1614
1615                 if (data & KVM_STEAL_RESERVED_MASK)
1616                         return 1;
1617
1618                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1619                                                 data & KVM_STEAL_VALID_BITS,
1620                                                 sizeof(struct kvm_steal_time)))
1621                         return 1;
1622
1623                 vcpu->arch.st.msr_val = data;
1624
1625                 if (!(data & KVM_MSR_ENABLED))
1626                         break;
1627
1628                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1629
1630                 preempt_disable();
1631                 accumulate_steal_time(vcpu);
1632                 preempt_enable();
1633
1634                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1635
1636                 break;
1637
1638         case MSR_IA32_MCG_CTL:
1639         case MSR_IA32_MCG_STATUS:
1640         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1641                 return set_msr_mce(vcpu, msr, data);
1642
1643         /* Performance counters are not protected by a CPUID bit,
1644          * so we should check all of them in the generic path for the sake of
1645          * cross vendor migration.
1646          * Writing a zero into the event select MSRs disables them,
1647          * which we perfectly emulate ;-). Any other value should be at least
1648          * reported, some guests depend on them.
1649          */
1650         case MSR_P6_EVNTSEL0:
1651         case MSR_P6_EVNTSEL1:
1652         case MSR_K7_EVNTSEL0:
1653         case MSR_K7_EVNTSEL1:
1654         case MSR_K7_EVNTSEL2:
1655         case MSR_K7_EVNTSEL3:
1656                 if (data != 0)
1657                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1658                                 "0x%x data 0x%llx\n", msr, data);
1659                 break;
1660         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1661          * so we ignore writes to make it happy.
1662          */
1663         case MSR_P6_PERFCTR0:
1664         case MSR_P6_PERFCTR1:
1665         case MSR_K7_PERFCTR0:
1666         case MSR_K7_PERFCTR1:
1667         case MSR_K7_PERFCTR2:
1668         case MSR_K7_PERFCTR3:
1669                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1670                         "0x%x data 0x%llx\n", msr, data);
1671                 break;
1672         case MSR_K7_CLK_CTL:
1673                 /*
1674                  * Ignore all writes to this no longer documented MSR.
1675                  * Writes are only relevant for old K7 processors,
1676                  * all pre-dating SVM, but a recommended workaround from
1677                  * AMD for these chips. It is possible to speicify the
1678                  * affected processor models on the command line, hence
1679                  * the need to ignore the workaround.
1680                  */
1681                 break;
1682         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1683                 if (kvm_hv_msr_partition_wide(msr)) {
1684                         int r;
1685                         mutex_lock(&vcpu->kvm->lock);
1686                         r = set_msr_hyperv_pw(vcpu, msr, data);
1687                         mutex_unlock(&vcpu->kvm->lock);
1688                         return r;
1689                 } else
1690                         return set_msr_hyperv(vcpu, msr, data);
1691                 break;
1692         case MSR_IA32_BBL_CR_CTL3:
1693                 /* Drop writes to this legacy MSR -- see rdmsr
1694                  * counterpart for further detail.
1695                  */
1696                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1697                 break;
1698         default:
1699                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1700                         return xen_hvm_config(vcpu, data);
1701                 if (!ignore_msrs) {
1702                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1703                                 msr, data);
1704                         return 1;
1705                 } else {
1706                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1707                                 msr, data);
1708                         break;
1709                 }
1710         }
1711         return 0;
1712 }
1713 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1714
1715
1716 /*
1717  * Reads an msr value (of 'msr_index') into 'pdata'.
1718  * Returns 0 on success, non-0 otherwise.
1719  * Assumes vcpu_load() was already called.
1720  */
1721 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1722 {
1723         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1724 }
1725
1726 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1727 {
1728         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1729
1730         if (!msr_mtrr_valid(msr))
1731                 return 1;
1732
1733         if (msr == MSR_MTRRdefType)
1734                 *pdata = vcpu->arch.mtrr_state.def_type +
1735                          (vcpu->arch.mtrr_state.enabled << 10);
1736         else if (msr == MSR_MTRRfix64K_00000)
1737                 *pdata = p[0];
1738         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1739                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1740         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1741                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1742         else if (msr == MSR_IA32_CR_PAT)
1743                 *pdata = vcpu->arch.pat;
1744         else {  /* Variable MTRRs */
1745                 int idx, is_mtrr_mask;
1746                 u64 *pt;
1747
1748                 idx = (msr - 0x200) / 2;
1749                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1750                 if (!is_mtrr_mask)
1751                         pt =
1752                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1753                 else
1754                         pt =
1755                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1756                 *pdata = *pt;
1757         }
1758
1759         return 0;
1760 }
1761
1762 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1763 {
1764         u64 data;
1765         u64 mcg_cap = vcpu->arch.mcg_cap;
1766         unsigned bank_num = mcg_cap & 0xff;
1767
1768         switch (msr) {
1769         case MSR_IA32_P5_MC_ADDR:
1770         case MSR_IA32_P5_MC_TYPE:
1771                 data = 0;
1772                 break;
1773         case MSR_IA32_MCG_CAP:
1774                 data = vcpu->arch.mcg_cap;
1775                 break;
1776         case MSR_IA32_MCG_CTL:
1777                 if (!(mcg_cap & MCG_CTL_P))
1778                         return 1;
1779                 data = vcpu->arch.mcg_ctl;
1780                 break;
1781         case MSR_IA32_MCG_STATUS:
1782                 data = vcpu->arch.mcg_status;
1783                 break;
1784         default:
1785                 if (msr >= MSR_IA32_MC0_CTL &&
1786                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1787                         u32 offset = msr - MSR_IA32_MC0_CTL;
1788                         data = vcpu->arch.mce_banks[offset];
1789                         break;
1790                 }
1791                 return 1;
1792         }
1793         *pdata = data;
1794         return 0;
1795 }
1796
1797 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1798 {
1799         u64 data = 0;
1800         struct kvm *kvm = vcpu->kvm;
1801
1802         switch (msr) {
1803         case HV_X64_MSR_GUEST_OS_ID:
1804                 data = kvm->arch.hv_guest_os_id;
1805                 break;
1806         case HV_X64_MSR_HYPERCALL:
1807                 data = kvm->arch.hv_hypercall;
1808                 break;
1809         default:
1810                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1811                 return 1;
1812         }
1813
1814         *pdata = data;
1815         return 0;
1816 }
1817
1818 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1819 {
1820         u64 data = 0;
1821
1822         switch (msr) {
1823         case HV_X64_MSR_VP_INDEX: {
1824                 int r;
1825                 struct kvm_vcpu *v;
1826                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1827                         if (v == vcpu)
1828                                 data = r;
1829                 break;
1830         }
1831         case HV_X64_MSR_EOI:
1832                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1833         case HV_X64_MSR_ICR:
1834                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1835         case HV_X64_MSR_TPR:
1836                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1837         case HV_X64_MSR_APIC_ASSIST_PAGE:
1838                 data = vcpu->arch.hv_vapic;
1839                 break;
1840         default:
1841                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1842                 return 1;
1843         }
1844         *pdata = data;
1845         return 0;
1846 }
1847
1848 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1849 {
1850         u64 data;
1851
1852         switch (msr) {
1853         case MSR_IA32_PLATFORM_ID:
1854         case MSR_IA32_EBL_CR_POWERON:
1855         case MSR_IA32_DEBUGCTLMSR:
1856         case MSR_IA32_LASTBRANCHFROMIP:
1857         case MSR_IA32_LASTBRANCHTOIP:
1858         case MSR_IA32_LASTINTFROMIP:
1859         case MSR_IA32_LASTINTTOIP:
1860         case MSR_K8_SYSCFG:
1861         case MSR_K7_HWCR:
1862         case MSR_VM_HSAVE_PA:
1863         case MSR_P6_PERFCTR0:
1864         case MSR_P6_PERFCTR1:
1865         case MSR_P6_EVNTSEL0:
1866         case MSR_P6_EVNTSEL1:
1867         case MSR_K7_EVNTSEL0:
1868         case MSR_K7_PERFCTR0:
1869         case MSR_K8_INT_PENDING_MSG:
1870         case MSR_AMD64_NB_CFG:
1871         case MSR_FAM10H_MMIO_CONF_BASE:
1872                 data = 0;
1873                 break;
1874         case MSR_IA32_UCODE_REV:
1875                 data = 0x100000000ULL;
1876                 break;
1877         case MSR_MTRRcap:
1878                 data = 0x500 | KVM_NR_VAR_MTRR;
1879                 break;
1880         case 0x200 ... 0x2ff:
1881                 return get_msr_mtrr(vcpu, msr, pdata);
1882         case 0xcd: /* fsb frequency */
1883                 data = 3;
1884                 break;
1885                 /*
1886                  * MSR_EBC_FREQUENCY_ID
1887                  * Conservative value valid for even the basic CPU models.
1888                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1889                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1890                  * and 266MHz for model 3, or 4. Set Core Clock
1891                  * Frequency to System Bus Frequency Ratio to 1 (bits
1892                  * 31:24) even though these are only valid for CPU
1893                  * models > 2, however guests may end up dividing or
1894                  * multiplying by zero otherwise.
1895                  */
1896         case MSR_EBC_FREQUENCY_ID:
1897                 data = 1 << 24;
1898                 break;
1899         case MSR_IA32_APICBASE:
1900                 data = kvm_get_apic_base(vcpu);
1901                 break;
1902         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1903                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1904                 break;
1905         case MSR_IA32_TSCDEADLINE:
1906                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1907                 break;
1908         case MSR_IA32_MISC_ENABLE:
1909                 data = vcpu->arch.ia32_misc_enable_msr;
1910                 break;
1911         case MSR_IA32_PERF_STATUS:
1912                 /* TSC increment by tick */
1913                 data = 1000ULL;
1914                 /* CPU multiplier */
1915                 data |= (((uint64_t)4ULL) << 40);
1916                 break;
1917         case MSR_EFER:
1918                 data = vcpu->arch.efer;
1919                 break;
1920         case MSR_KVM_WALL_CLOCK:
1921         case MSR_KVM_WALL_CLOCK_NEW:
1922                 data = vcpu->kvm->arch.wall_clock;
1923                 break;
1924         case MSR_KVM_SYSTEM_TIME:
1925         case MSR_KVM_SYSTEM_TIME_NEW:
1926                 data = vcpu->arch.time;
1927                 break;
1928         case MSR_KVM_ASYNC_PF_EN:
1929                 data = vcpu->arch.apf.msr_val;
1930                 break;
1931         case MSR_KVM_STEAL_TIME:
1932                 data = vcpu->arch.st.msr_val;
1933                 break;
1934         case MSR_IA32_P5_MC_ADDR:
1935         case MSR_IA32_P5_MC_TYPE:
1936         case MSR_IA32_MCG_CAP:
1937         case MSR_IA32_MCG_CTL:
1938         case MSR_IA32_MCG_STATUS:
1939         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1940                 return get_msr_mce(vcpu, msr, pdata);
1941         case MSR_K7_CLK_CTL:
1942                 /*
1943                  * Provide expected ramp-up count for K7. All other
1944                  * are set to zero, indicating minimum divisors for
1945                  * every field.
1946                  *
1947                  * This prevents guest kernels on AMD host with CPU
1948                  * type 6, model 8 and higher from exploding due to
1949                  * the rdmsr failing.
1950                  */
1951                 data = 0x20000000;
1952                 break;
1953         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1954                 if (kvm_hv_msr_partition_wide(msr)) {
1955                         int r;
1956                         mutex_lock(&vcpu->kvm->lock);
1957                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1958                         mutex_unlock(&vcpu->kvm->lock);
1959                         return r;
1960                 } else
1961                         return get_msr_hyperv(vcpu, msr, pdata);
1962                 break;
1963         case MSR_IA32_BBL_CR_CTL3:
1964                 /* This legacy MSR exists but isn't fully documented in current
1965                  * silicon.  It is however accessed by winxp in very narrow
1966                  * scenarios where it sets bit #19, itself documented as
1967                  * a "reserved" bit.  Best effort attempt to source coherent
1968                  * read data here should the balance of the register be
1969                  * interpreted by the guest:
1970                  *
1971                  * L2 cache control register 3: 64GB range, 256KB size,
1972                  * enabled, latency 0x1, configured
1973                  */
1974                 data = 0xbe702111;
1975                 break;
1976         default:
1977                 if (!ignore_msrs) {
1978                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1979                         return 1;
1980                 } else {
1981                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1982                         data = 0;
1983                 }
1984                 break;
1985         }
1986         *pdata = data;
1987         return 0;
1988 }
1989 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1990
1991 /*
1992  * Read or write a bunch of msrs. All parameters are kernel addresses.
1993  *
1994  * @return number of msrs set successfully.
1995  */
1996 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1997                     struct kvm_msr_entry *entries,
1998                     int (*do_msr)(struct kvm_vcpu *vcpu,
1999                                   unsigned index, u64 *data))
2000 {
2001         int i, idx;
2002
2003         idx = srcu_read_lock(&vcpu->kvm->srcu);
2004         for (i = 0; i < msrs->nmsrs; ++i)
2005                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2006                         break;
2007         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2008
2009         return i;
2010 }
2011
2012 /*
2013  * Read or write a bunch of msrs. Parameters are user addresses.
2014  *
2015  * @return number of msrs set successfully.
2016  */
2017 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2018                   int (*do_msr)(struct kvm_vcpu *vcpu,
2019                                 unsigned index, u64 *data),
2020                   int writeback)
2021 {
2022         struct kvm_msrs msrs;
2023         struct kvm_msr_entry *entries;
2024         int r, n;
2025         unsigned size;
2026
2027         r = -EFAULT;
2028         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2029                 goto out;
2030
2031         r = -E2BIG;
2032         if (msrs.nmsrs >= MAX_IO_MSRS)
2033                 goto out;
2034
2035         r = -ENOMEM;
2036         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2037         entries = kmalloc(size, GFP_KERNEL);
2038         if (!entries)
2039                 goto out;
2040
2041         r = -EFAULT;
2042         if (copy_from_user(entries, user_msrs->entries, size))
2043                 goto out_free;
2044
2045         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2046         if (r < 0)
2047                 goto out_free;
2048
2049         r = -EFAULT;
2050         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2051                 goto out_free;
2052
2053         r = n;
2054
2055 out_free:
2056         kfree(entries);
2057 out:
2058         return r;
2059 }
2060
2061 int kvm_dev_ioctl_check_extension(long ext)
2062 {
2063         int r;
2064
2065         switch (ext) {
2066         case KVM_CAP_IRQCHIP:
2067         case KVM_CAP_HLT:
2068         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2069         case KVM_CAP_SET_TSS_ADDR:
2070         case KVM_CAP_EXT_CPUID:
2071         case KVM_CAP_CLOCKSOURCE:
2072         case KVM_CAP_PIT:
2073         case KVM_CAP_NOP_IO_DELAY:
2074         case KVM_CAP_MP_STATE:
2075         case KVM_CAP_SYNC_MMU:
2076         case KVM_CAP_USER_NMI:
2077         case KVM_CAP_REINJECT_CONTROL:
2078         case KVM_CAP_IRQ_INJECT_STATUS:
2079         case KVM_CAP_ASSIGN_DEV_IRQ:
2080         case KVM_CAP_IRQFD:
2081         case KVM_CAP_IOEVENTFD:
2082         case KVM_CAP_PIT2:
2083         case KVM_CAP_PIT_STATE2:
2084         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2085         case KVM_CAP_XEN_HVM:
2086         case KVM_CAP_ADJUST_CLOCK:
2087         case KVM_CAP_VCPU_EVENTS:
2088         case KVM_CAP_HYPERV:
2089         case KVM_CAP_HYPERV_VAPIC:
2090         case KVM_CAP_HYPERV_SPIN:
2091         case KVM_CAP_PCI_SEGMENT:
2092         case KVM_CAP_DEBUGREGS:
2093         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2094         case KVM_CAP_XSAVE:
2095         case KVM_CAP_ASYNC_PF:
2096         case KVM_CAP_GET_TSC_KHZ:
2097                 r = 1;
2098                 break;
2099         case KVM_CAP_COALESCED_MMIO:
2100                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2101                 break;
2102         case KVM_CAP_VAPIC:
2103                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2104                 break;
2105         case KVM_CAP_NR_VCPUS:
2106                 r = KVM_SOFT_MAX_VCPUS;
2107                 break;
2108         case KVM_CAP_MAX_VCPUS:
2109                 r = KVM_MAX_VCPUS;
2110                 break;
2111         case KVM_CAP_NR_MEMSLOTS:
2112                 r = KVM_MEMORY_SLOTS;
2113                 break;
2114         case KVM_CAP_PV_MMU:    /* obsolete */
2115                 r = 0;
2116                 break;
2117         case KVM_CAP_IOMMU:
2118                 r = iommu_present(&pci_bus_type);
2119                 break;
2120         case KVM_CAP_MCE:
2121                 r = KVM_MAX_MCE_BANKS;
2122                 break;
2123         case KVM_CAP_XCRS:
2124                 r = cpu_has_xsave;
2125                 break;
2126         case KVM_CAP_TSC_CONTROL:
2127                 r = kvm_has_tsc_control;
2128                 break;
2129         case KVM_CAP_TSC_DEADLINE_TIMER:
2130                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2131                 break;
2132         default:
2133                 r = 0;
2134                 break;
2135         }
2136         return r;
2137
2138 }
2139
2140 long kvm_arch_dev_ioctl(struct file *filp,
2141                         unsigned int ioctl, unsigned long arg)
2142 {
2143         void __user *argp = (void __user *)arg;
2144         long r;
2145
2146         switch (ioctl) {
2147         case KVM_GET_MSR_INDEX_LIST: {
2148                 struct kvm_msr_list __user *user_msr_list = argp;
2149                 struct kvm_msr_list msr_list;
2150                 unsigned n;
2151
2152                 r = -EFAULT;
2153                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2154                         goto out;
2155                 n = msr_list.nmsrs;
2156                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2157                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2158                         goto out;
2159                 r = -E2BIG;
2160                 if (n < msr_list.nmsrs)
2161                         goto out;
2162                 r = -EFAULT;
2163                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2164                                  num_msrs_to_save * sizeof(u32)))
2165                         goto out;
2166                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2167                                  &emulated_msrs,
2168                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2169                         goto out;
2170                 r = 0;
2171                 break;
2172         }
2173         case KVM_GET_SUPPORTED_CPUID: {
2174                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2175                 struct kvm_cpuid2 cpuid;
2176
2177                 r = -EFAULT;
2178                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2179                         goto out;
2180                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2181                                                       cpuid_arg->entries);
2182                 if (r)
2183                         goto out;
2184
2185                 r = -EFAULT;
2186                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2187                         goto out;
2188                 r = 0;
2189                 break;
2190         }
2191         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2192                 u64 mce_cap;
2193
2194                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2195                 r = -EFAULT;
2196                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2197                         goto out;
2198                 r = 0;
2199                 break;
2200         }
2201         default:
2202                 r = -EINVAL;
2203         }
2204 out:
2205         return r;
2206 }
2207
2208 static void wbinvd_ipi(void *garbage)
2209 {
2210         wbinvd();
2211 }
2212
2213 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2214 {
2215         return vcpu->kvm->arch.iommu_domain &&
2216                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2217 }
2218
2219 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2220 {
2221         /* Address WBINVD may be executed by guest */
2222         if (need_emulate_wbinvd(vcpu)) {
2223                 if (kvm_x86_ops->has_wbinvd_exit())
2224                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2225                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2226                         smp_call_function_single(vcpu->cpu,
2227                                         wbinvd_ipi, NULL, 1);
2228         }
2229
2230         kvm_x86_ops->vcpu_load(vcpu, cpu);
2231         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2232                 /* Make sure TSC doesn't go backwards */
2233                 s64 tsc_delta;
2234                 u64 tsc;
2235
2236                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2237                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2238                              tsc - vcpu->arch.last_guest_tsc;
2239
2240                 if (tsc_delta < 0)
2241                         mark_tsc_unstable("KVM discovered backwards TSC");
2242                 if (check_tsc_unstable()) {
2243                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2244                         vcpu->arch.tsc_catchup = 1;
2245                 }
2246                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2247                 if (vcpu->cpu != cpu)
2248                         kvm_migrate_timers(vcpu);
2249                 vcpu->cpu = cpu;
2250         }
2251
2252         accumulate_steal_time(vcpu);
2253         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2254 }
2255
2256 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2257 {
2258         kvm_x86_ops->vcpu_put(vcpu);
2259         kvm_put_guest_fpu(vcpu);
2260         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2261 }
2262
2263 static int is_efer_nx(void)
2264 {
2265         unsigned long long efer = 0;
2266
2267         rdmsrl_safe(MSR_EFER, &efer);
2268         return efer & EFER_NX;
2269 }
2270
2271 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2272 {
2273         int i;
2274         struct kvm_cpuid_entry2 *e, *entry;
2275
2276         entry = NULL;
2277         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2278                 e = &vcpu->arch.cpuid_entries[i];
2279                 if (e->function == 0x80000001) {
2280                         entry = e;
2281                         break;
2282                 }
2283         }
2284         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2285                 entry->edx &= ~(1 << 20);
2286                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2287         }
2288 }
2289
2290 /* when an old userspace process fills a new kernel module */
2291 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2292                                     struct kvm_cpuid *cpuid,
2293                                     struct kvm_cpuid_entry __user *entries)
2294 {
2295         int r, i;
2296         struct kvm_cpuid_entry *cpuid_entries;
2297
2298         r = -E2BIG;
2299         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2300                 goto out;
2301         r = -ENOMEM;
2302         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2303         if (!cpuid_entries)
2304                 goto out;
2305         r = -EFAULT;
2306         if (copy_from_user(cpuid_entries, entries,
2307                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2308                 goto out_free;
2309         for (i = 0; i < cpuid->nent; i++) {
2310                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2311                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2312                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2313                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2314                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2315                 vcpu->arch.cpuid_entries[i].index = 0;
2316                 vcpu->arch.cpuid_entries[i].flags = 0;
2317                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2318                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2319                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2320         }
2321         vcpu->arch.cpuid_nent = cpuid->nent;
2322         cpuid_fix_nx_cap(vcpu);
2323         r = 0;
2324         kvm_apic_set_version(vcpu);
2325         kvm_x86_ops->cpuid_update(vcpu);
2326         update_cpuid(vcpu);
2327
2328 out_free:
2329         vfree(cpuid_entries);
2330 out:
2331         return r;
2332 }
2333
2334 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2335                                      struct kvm_cpuid2 *cpuid,
2336                                      struct kvm_cpuid_entry2 __user *entries)
2337 {
2338         int r;
2339
2340         r = -E2BIG;
2341         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2342                 goto out;
2343         r = -EFAULT;
2344         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2345                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2346                 goto out;
2347         vcpu->arch.cpuid_nent = cpuid->nent;
2348         kvm_apic_set_version(vcpu);
2349         kvm_x86_ops->cpuid_update(vcpu);
2350         update_cpuid(vcpu);
2351         return 0;
2352
2353 out:
2354         return r;
2355 }
2356
2357 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2358                                      struct kvm_cpuid2 *cpuid,
2359                                      struct kvm_cpuid_entry2 __user *entries)
2360 {
2361         int r;
2362
2363         r = -E2BIG;
2364         if (cpuid->nent < vcpu->arch.cpuid_nent)
2365                 goto out;
2366         r = -EFAULT;
2367         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2368                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2369                 goto out;
2370         return 0;
2371
2372 out:
2373         cpuid->nent = vcpu->arch.cpuid_nent;
2374         return r;
2375 }
2376
2377 static void cpuid_mask(u32 *word, int wordnum)
2378 {
2379         *word &= boot_cpu_data.x86_capability[wordnum];
2380 }
2381
2382 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2383                            u32 index)
2384 {
2385         entry->function = function;
2386         entry->index = index;
2387         cpuid_count(entry->function, entry->index,
2388                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2389         entry->flags = 0;
2390 }
2391
2392 static bool supported_xcr0_bit(unsigned bit)
2393 {
2394         u64 mask = ((u64)1 << bit);
2395
2396         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2397 }
2398
2399 #define F(x) bit(X86_FEATURE_##x)
2400
2401 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2402                          u32 index, int *nent, int maxnent)
2403 {
2404         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2405 #ifdef CONFIG_X86_64
2406         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2407                                 ? F(GBPAGES) : 0;
2408         unsigned f_lm = F(LM);
2409 #else
2410         unsigned f_gbpages = 0;
2411         unsigned f_lm = 0;
2412 #endif
2413         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2414
2415         /* cpuid 1.edx */
2416         const u32 kvm_supported_word0_x86_features =
2417                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2418                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2419                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2420                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2421                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2422                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2423                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2424                 0 /* HTT, TM, Reserved, PBE */;
2425         /* cpuid 0x80000001.edx */
2426         const u32 kvm_supported_word1_x86_features =
2427                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2428                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2429                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2430                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2431                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2432                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2433                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2434                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2435         /* cpuid 1.ecx */
2436         const u32 kvm_supported_word4_x86_features =
2437                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2438                 0 /* DS-CPL, VMX, SMX, EST */ |
2439                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2440                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2441                 0 /* Reserved, DCA */ | F(XMM4_1) |
2442                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2443                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2444                 F(F16C) | F(RDRAND);
2445         /* cpuid 0x80000001.ecx */
2446         const u32 kvm_supported_word6_x86_features =
2447                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2448                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2449                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2450                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2451
2452         /* cpuid 0xC0000001.edx */
2453         const u32 kvm_supported_word5_x86_features =
2454                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2455                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2456                 F(PMM) | F(PMM_EN);
2457
2458         /* cpuid 7.0.ebx */
2459         const u32 kvm_supported_word9_x86_features =
2460                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2461
2462         /* all calls to cpuid_count() should be made on the same cpu */
2463         get_cpu();
2464         do_cpuid_1_ent(entry, function, index);
2465         ++*nent;
2466
2467         switch (function) {
2468         case 0:
2469                 entry->eax = min(entry->eax, (u32)0xd);
2470                 break;
2471         case 1:
2472                 entry->edx &= kvm_supported_word0_x86_features;
2473                 cpuid_mask(&entry->edx, 0);
2474                 entry->ecx &= kvm_supported_word4_x86_features;
2475                 cpuid_mask(&entry->ecx, 4);
2476                 /* we support x2apic emulation even if host does not support
2477                  * it since we emulate x2apic in software */
2478                 entry->ecx |= F(X2APIC);
2479                 break;
2480         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2481          * may return different values. This forces us to get_cpu() before
2482          * issuing the first command, and also to emulate this annoying behavior
2483          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2484         case 2: {
2485                 int t, times = entry->eax & 0xff;
2486
2487                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2488                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2489                 for (t = 1; t < times && *nent < maxnent; ++t) {
2490                         do_cpuid_1_ent(&entry[t], function, 0);
2491                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2492                         ++*nent;
2493                 }
2494                 break;
2495         }
2496         /* function 4 has additional index. */
2497         case 4: {
2498                 int i, cache_type;
2499
2500                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2501                 /* read more entries until cache_type is zero */
2502                 for (i = 1; *nent < maxnent; ++i) {
2503                         cache_type = entry[i - 1].eax & 0x1f;
2504                         if (!cache_type)
2505                                 break;
2506                         do_cpuid_1_ent(&entry[i], function, i);
2507                         entry[i].flags |=
2508                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2509                         ++*nent;
2510                 }
2511                 break;
2512         }
2513         case 7: {
2514                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2515                 /* Mask ebx against host capbability word 9 */
2516                 if (index == 0) {
2517                         entry->ebx &= kvm_supported_word9_x86_features;
2518                         cpuid_mask(&entry->ebx, 9);
2519                 } else
2520                         entry->ebx = 0;
2521                 entry->eax = 0;
2522                 entry->ecx = 0;
2523                 entry->edx = 0;
2524                 break;
2525         }
2526         case 9:
2527                 break;
2528         /* function 0xb has additional index. */
2529         case 0xb: {
2530                 int i, level_type;
2531
2532                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2533                 /* read more entries until level_type is zero */
2534                 for (i = 1; *nent < maxnent; ++i) {
2535                         level_type = entry[i - 1].ecx & 0xff00;
2536                         if (!level_type)
2537                                 break;
2538                         do_cpuid_1_ent(&entry[i], function, i);
2539                         entry[i].flags |=
2540                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2541                         ++*nent;
2542                 }
2543                 break;
2544         }
2545         case 0xd: {
2546                 int idx, i;
2547
2548                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2549                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2550                         do_cpuid_1_ent(&entry[i], function, idx);
2551                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2552                                 continue;
2553                         entry[i].flags |=
2554                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2555                         ++*nent;
2556                         ++i;
2557                 }
2558                 break;
2559         }
2560         case KVM_CPUID_SIGNATURE: {
2561                 char signature[12] = "KVMKVMKVM\0\0";
2562                 u32 *sigptr = (u32 *)signature;
2563                 entry->eax = 0;
2564                 entry->ebx = sigptr[0];
2565                 entry->ecx = sigptr[1];
2566                 entry->edx = sigptr[2];
2567                 break;
2568         }
2569         case KVM_CPUID_FEATURES:
2570                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2571                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2572                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2573                              (1 << KVM_FEATURE_ASYNC_PF) |
2574                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2575
2576                 if (sched_info_on())
2577                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2578
2579                 entry->ebx = 0;
2580                 entry->ecx = 0;
2581                 entry->edx = 0;
2582                 break;
2583         case 0x80000000:
2584                 entry->eax = min(entry->eax, 0x8000001a);
2585                 break;
2586         case 0x80000001:
2587                 entry->edx &= kvm_supported_word1_x86_features;
2588                 cpuid_mask(&entry->edx, 1);
2589                 entry->ecx &= kvm_supported_word6_x86_features;
2590                 cpuid_mask(&entry->ecx, 6);
2591                 break;
2592         case 0x80000008: {
2593                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2594                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2595                 unsigned phys_as = entry->eax & 0xff;
2596
2597                 if (!g_phys_as)
2598                         g_phys_as = phys_as;
2599                 entry->eax = g_phys_as | (virt_as << 8);
2600                 entry->ebx = entry->edx = 0;
2601                 break;
2602         }
2603         case 0x80000019:
2604                 entry->ecx = entry->edx = 0;
2605                 break;
2606         case 0x8000001a:
2607                 break;
2608         case 0x8000001d:
2609                 break;
2610         /*Add support for Centaur's CPUID instruction*/
2611         case 0xC0000000:
2612                 /*Just support up to 0xC0000004 now*/
2613                 entry->eax = min(entry->eax, 0xC0000004);
2614                 break;
2615         case 0xC0000001:
2616                 entry->edx &= kvm_supported_word5_x86_features;
2617                 cpuid_mask(&entry->edx, 5);
2618                 break;
2619         case 3: /* Processor serial number */
2620         case 5: /* MONITOR/MWAIT */
2621         case 6: /* Thermal management */
2622         case 0xA: /* Architectural Performance Monitoring */
2623         case 0x80000007: /* Advanced power management */
2624         case 0xC0000002:
2625         case 0xC0000003:
2626         case 0xC0000004:
2627         default:
2628                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2629                 break;
2630         }
2631
2632         kvm_x86_ops->set_supported_cpuid(function, entry);
2633
2634         put_cpu();
2635 }
2636
2637 #undef F
2638
2639 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2640                                      struct kvm_cpuid_entry2 __user *entries)
2641 {
2642         struct kvm_cpuid_entry2 *cpuid_entries;
2643         int limit, nent = 0, r = -E2BIG;
2644         u32 func;
2645
2646         if (cpuid->nent < 1)
2647                 goto out;
2648         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2649                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2650         r = -ENOMEM;
2651         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2652         if (!cpuid_entries)
2653                 goto out;
2654
2655         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2656         limit = cpuid_entries[0].eax;
2657         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2658                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2659                              &nent, cpuid->nent);
2660         r = -E2BIG;
2661         if (nent >= cpuid->nent)
2662                 goto out_free;
2663
2664         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2665         limit = cpuid_entries[nent - 1].eax;
2666         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2667                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2668                              &nent, cpuid->nent);
2669
2670
2671
2672         r = -E2BIG;
2673         if (nent >= cpuid->nent)
2674                 goto out_free;
2675
2676         /* Add support for Centaur's CPUID instruction. */
2677         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2678                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2679                                 &nent, cpuid->nent);
2680
2681                 r = -E2BIG;
2682                 if (nent >= cpuid->nent)
2683                         goto out_free;
2684
2685                 limit = cpuid_entries[nent - 1].eax;
2686                 for (func = 0xC0000001;
2687                         func <= limit && nent < cpuid->nent; ++func)
2688                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2689                                         &nent, cpuid->nent);
2690
2691                 r = -E2BIG;
2692                 if (nent >= cpuid->nent)
2693                         goto out_free;
2694         }
2695
2696         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2697                      cpuid->nent);
2698
2699         r = -E2BIG;
2700         if (nent >= cpuid->nent)
2701                 goto out_free;
2702
2703         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2704                      cpuid->nent);
2705
2706         r = -E2BIG;
2707         if (nent >= cpuid->nent)
2708                 goto out_free;
2709
2710         r = -EFAULT;
2711         if (copy_to_user(entries, cpuid_entries,
2712                          nent * sizeof(struct kvm_cpuid_entry2)))
2713                 goto out_free;
2714         cpuid->nent = nent;
2715         r = 0;
2716
2717 out_free:
2718         vfree(cpuid_entries);
2719 out:
2720         return r;
2721 }
2722
2723 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2724                                     struct kvm_lapic_state *s)
2725 {
2726         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2727
2728         return 0;
2729 }
2730
2731 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2732                                     struct kvm_lapic_state *s)
2733 {
2734         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2735         kvm_apic_post_state_restore(vcpu);
2736         update_cr8_intercept(vcpu);
2737
2738         return 0;
2739 }
2740
2741 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2742                                     struct kvm_interrupt *irq)
2743 {
2744         if (irq->irq < 0 || irq->irq >= 256)
2745                 return -EINVAL;
2746         if (irqchip_in_kernel(vcpu->kvm))
2747                 return -ENXIO;
2748
2749         kvm_queue_interrupt(vcpu, irq->irq, false);
2750         kvm_make_request(KVM_REQ_EVENT, vcpu);
2751
2752         return 0;
2753 }
2754
2755 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2756 {
2757         kvm_inject_nmi(vcpu);
2758
2759         return 0;
2760 }
2761
2762 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2763                                            struct kvm_tpr_access_ctl *tac)
2764 {
2765         if (tac->flags)
2766                 return -EINVAL;
2767         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2768         return 0;
2769 }
2770
2771 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2772                                         u64 mcg_cap)
2773 {
2774         int r;
2775         unsigned bank_num = mcg_cap & 0xff, bank;
2776
2777         r = -EINVAL;
2778         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2779                 goto out;
2780         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2781                 goto out;
2782         r = 0;
2783         vcpu->arch.mcg_cap = mcg_cap;
2784         /* Init IA32_MCG_CTL to all 1s */
2785         if (mcg_cap & MCG_CTL_P)
2786                 vcpu->arch.mcg_ctl = ~(u64)0;
2787         /* Init IA32_MCi_CTL to all 1s */
2788         for (bank = 0; bank < bank_num; bank++)
2789                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2790 out:
2791         return r;
2792 }
2793
2794 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2795                                       struct kvm_x86_mce *mce)
2796 {
2797         u64 mcg_cap = vcpu->arch.mcg_cap;
2798         unsigned bank_num = mcg_cap & 0xff;
2799         u64 *banks = vcpu->arch.mce_banks;
2800
2801         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2802                 return -EINVAL;
2803         /*
2804          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2805          * reporting is disabled
2806          */
2807         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2808             vcpu->arch.mcg_ctl != ~(u64)0)
2809                 return 0;
2810         banks += 4 * mce->bank;
2811         /*
2812          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2813          * reporting is disabled for the bank
2814          */
2815         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2816                 return 0;
2817         if (mce->status & MCI_STATUS_UC) {
2818                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2819                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2820                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2821                         return 0;
2822                 }
2823                 if (banks[1] & MCI_STATUS_VAL)
2824                         mce->status |= MCI_STATUS_OVER;
2825                 banks[2] = mce->addr;
2826                 banks[3] = mce->misc;
2827                 vcpu->arch.mcg_status = mce->mcg_status;
2828                 banks[1] = mce->status;
2829                 kvm_queue_exception(vcpu, MC_VECTOR);
2830         } else if (!(banks[1] & MCI_STATUS_VAL)
2831                    || !(banks[1] & MCI_STATUS_UC)) {
2832                 if (banks[1] & MCI_STATUS_VAL)
2833                         mce->status |= MCI_STATUS_OVER;
2834                 banks[2] = mce->addr;
2835                 banks[3] = mce->misc;
2836                 banks[1] = mce->status;
2837         } else
2838                 banks[1] |= MCI_STATUS_OVER;
2839         return 0;
2840 }
2841
2842 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2843                                                struct kvm_vcpu_events *events)
2844 {
2845         process_nmi(vcpu);
2846         events->exception.injected =
2847                 vcpu->arch.exception.pending &&
2848                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2849         events->exception.nr = vcpu->arch.exception.nr;
2850         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2851         events->exception.pad = 0;
2852         events->exception.error_code = vcpu->arch.exception.error_code;
2853
2854         events->interrupt.injected =
2855                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2856         events->interrupt.nr = vcpu->arch.interrupt.nr;
2857         events->interrupt.soft = 0;
2858         events->interrupt.shadow =
2859                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2860                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2861
2862         events->nmi.injected = vcpu->arch.nmi_injected;
2863         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2864         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2865         events->nmi.pad = 0;
2866
2867         events->sipi_vector = vcpu->arch.sipi_vector;
2868
2869         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2870                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2871                          | KVM_VCPUEVENT_VALID_SHADOW);
2872         memset(&events->reserved, 0, sizeof(events->reserved));
2873 }
2874
2875 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2876                                               struct kvm_vcpu_events *events)
2877 {
2878         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2879                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2880                               | KVM_VCPUEVENT_VALID_SHADOW))
2881                 return -EINVAL;
2882
2883         process_nmi(vcpu);
2884         vcpu->arch.exception.pending = events->exception.injected;
2885         vcpu->arch.exception.nr = events->exception.nr;
2886         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2887         vcpu->arch.exception.error_code = events->exception.error_code;
2888
2889         vcpu->arch.interrupt.pending = events->interrupt.injected;
2890         vcpu->arch.interrupt.nr = events->interrupt.nr;
2891         vcpu->arch.interrupt.soft = events->interrupt.soft;
2892         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2893                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2894                                                   events->interrupt.shadow);
2895
2896         vcpu->arch.nmi_injected = events->nmi.injected;
2897         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2898                 vcpu->arch.nmi_pending = events->nmi.pending;
2899         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2900
2901         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2902                 vcpu->arch.sipi_vector = events->sipi_vector;
2903
2904         kvm_make_request(KVM_REQ_EVENT, vcpu);
2905
2906         return 0;
2907 }
2908
2909 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2910                                              struct kvm_debugregs *dbgregs)
2911 {
2912         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2913         dbgregs->dr6 = vcpu->arch.dr6;
2914         dbgregs->dr7 = vcpu->arch.dr7;
2915         dbgregs->flags = 0;
2916         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2917 }
2918
2919 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2920                                             struct kvm_debugregs *dbgregs)
2921 {
2922         if (dbgregs->flags)
2923                 return -EINVAL;
2924
2925         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2926         vcpu->arch.dr6 = dbgregs->dr6;
2927         vcpu->arch.dr7 = dbgregs->dr7;
2928
2929         return 0;
2930 }
2931
2932 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2933                                          struct kvm_xsave *guest_xsave)
2934 {
2935         if (cpu_has_xsave)
2936                 memcpy(guest_xsave->region,
2937                         &vcpu->arch.guest_fpu.state->xsave,
2938                         xstate_size);
2939         else {
2940                 memcpy(guest_xsave->region,
2941                         &vcpu->arch.guest_fpu.state->fxsave,
2942                         sizeof(struct i387_fxsave_struct));
2943                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2944                         XSTATE_FPSSE;
2945         }
2946 }
2947
2948 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2949                                         struct kvm_xsave *guest_xsave)
2950 {
2951         u64 xstate_bv =
2952                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2953
2954         if (cpu_has_xsave)
2955                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2956                         guest_xsave->region, xstate_size);
2957         else {
2958                 if (xstate_bv & ~XSTATE_FPSSE)
2959                         return -EINVAL;
2960                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2961                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2962         }
2963         return 0;
2964 }
2965
2966 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2967                                         struct kvm_xcrs *guest_xcrs)
2968 {
2969         if (!cpu_has_xsave) {
2970                 guest_xcrs->nr_xcrs = 0;
2971                 return;
2972         }
2973
2974         guest_xcrs->nr_xcrs = 1;
2975         guest_xcrs->flags = 0;
2976         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2977         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2978 }
2979
2980 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2981                                        struct kvm_xcrs *guest_xcrs)
2982 {
2983         int i, r = 0;
2984
2985         if (!cpu_has_xsave)
2986                 return -EINVAL;
2987
2988         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2989                 return -EINVAL;
2990
2991         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2992                 /* Only support XCR0 currently */
2993                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2994                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2995                                 guest_xcrs->xcrs[0].value);
2996                         break;
2997                 }
2998         if (r)
2999                 r = -EINVAL;
3000         return r;
3001 }
3002
3003 long kvm_arch_vcpu_ioctl(struct file *filp,
3004                          unsigned int ioctl, unsigned long arg)
3005 {
3006         struct kvm_vcpu *vcpu = filp->private_data;
3007         void __user *argp = (void __user *)arg;
3008         int r;
3009         union {
3010                 struct kvm_lapic_state *lapic;
3011                 struct kvm_xsave *xsave;
3012                 struct kvm_xcrs *xcrs;
3013                 void *buffer;
3014         } u;
3015
3016         u.buffer = NULL;
3017         switch (ioctl) {
3018         case KVM_GET_LAPIC: {
3019                 r = -EINVAL;
3020                 if (!vcpu->arch.apic)
3021                         goto out;
3022                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3023
3024                 r = -ENOMEM;
3025                 if (!u.lapic)
3026                         goto out;
3027                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3028                 if (r)
3029                         goto out;
3030                 r = -EFAULT;
3031                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3032                         goto out;
3033                 r = 0;
3034                 break;
3035         }
3036         case KVM_SET_LAPIC: {
3037                 r = -EINVAL;
3038                 if (!vcpu->arch.apic)
3039                         goto out;
3040                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3041                 r = -ENOMEM;
3042                 if (!u.lapic)
3043                         goto out;
3044                 r = -EFAULT;
3045                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3046                         goto out;
3047                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3048                 if (r)
3049                         goto out;
3050                 r = 0;
3051                 break;
3052         }
3053         case KVM_INTERRUPT: {
3054                 struct kvm_interrupt irq;
3055
3056                 r = -EFAULT;
3057                 if (copy_from_user(&irq, argp, sizeof irq))
3058                         goto out;
3059                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3060                 if (r)
3061                         goto out;
3062                 r = 0;
3063                 break;
3064         }
3065         case KVM_NMI: {
3066                 r = kvm_vcpu_ioctl_nmi(vcpu);
3067                 if (r)
3068                         goto out;
3069                 r = 0;
3070                 break;
3071         }
3072         case KVM_SET_CPUID: {
3073                 struct kvm_cpuid __user *cpuid_arg = argp;
3074                 struct kvm_cpuid cpuid;
3075
3076                 r = -EFAULT;
3077                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3078                         goto out;
3079                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3080                 if (r)
3081                         goto out;
3082                 break;
3083         }
3084         case KVM_SET_CPUID2: {
3085                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3086                 struct kvm_cpuid2 cpuid;
3087
3088                 r = -EFAULT;
3089                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3090                         goto out;
3091                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3092                                               cpuid_arg->entries);
3093                 if (r)
3094                         goto out;
3095                 break;
3096         }
3097         case KVM_GET_CPUID2: {
3098                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3099                 struct kvm_cpuid2 cpuid;
3100
3101                 r = -EFAULT;
3102                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3103                         goto out;
3104                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3105                                               cpuid_arg->entries);
3106                 if (r)
3107                         goto out;
3108                 r = -EFAULT;
3109                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3110                         goto out;
3111                 r = 0;
3112                 break;
3113         }
3114         case KVM_GET_MSRS:
3115                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3116                 break;
3117         case KVM_SET_MSRS:
3118                 r = msr_io(vcpu, argp, do_set_msr, 0);
3119                 break;
3120         case KVM_TPR_ACCESS_REPORTING: {
3121                 struct kvm_tpr_access_ctl tac;
3122
3123                 r = -EFAULT;
3124                 if (copy_from_user(&tac, argp, sizeof tac))
3125                         goto out;
3126                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3127                 if (r)
3128                         goto out;
3129                 r = -EFAULT;
3130                 if (copy_to_user(argp, &tac, sizeof tac))
3131                         goto out;
3132                 r = 0;
3133                 break;
3134         };
3135         case KVM_SET_VAPIC_ADDR: {
3136                 struct kvm_vapic_addr va;
3137
3138                 r = -EINVAL;
3139                 if (!irqchip_in_kernel(vcpu->kvm))
3140                         goto out;
3141                 r = -EFAULT;
3142                 if (copy_from_user(&va, argp, sizeof va))
3143                         goto out;
3144                 r = 0;
3145                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3146                 break;
3147         }
3148         case KVM_X86_SETUP_MCE: {
3149                 u64 mcg_cap;
3150
3151                 r = -EFAULT;
3152                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3153                         goto out;
3154                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3155                 break;
3156         }
3157         case KVM_X86_SET_MCE: {
3158                 struct kvm_x86_mce mce;
3159
3160                 r = -EFAULT;
3161                 if (copy_from_user(&mce, argp, sizeof mce))
3162                         goto out;
3163                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3164                 break;
3165         }
3166         case KVM_GET_VCPU_EVENTS: {
3167                 struct kvm_vcpu_events events;
3168
3169                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3170
3171                 r = -EFAULT;
3172                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3173                         break;
3174                 r = 0;
3175                 break;
3176         }
3177         case KVM_SET_VCPU_EVENTS: {
3178                 struct kvm_vcpu_events events;
3179
3180                 r = -EFAULT;
3181                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3182                         break;
3183
3184                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3185                 break;
3186         }
3187         case KVM_GET_DEBUGREGS: {
3188                 struct kvm_debugregs dbgregs;
3189
3190                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3191
3192                 r = -EFAULT;
3193                 if (copy_to_user(argp, &dbgregs,
3194                                  sizeof(struct kvm_debugregs)))
3195                         break;
3196                 r = 0;
3197                 break;
3198         }
3199         case KVM_SET_DEBUGREGS: {
3200                 struct kvm_debugregs dbgregs;
3201
3202                 r = -EFAULT;
3203                 if (copy_from_user(&dbgregs, argp,
3204                                    sizeof(struct kvm_debugregs)))
3205                         break;
3206
3207                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3208                 break;
3209         }
3210         case KVM_GET_XSAVE: {
3211                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3212                 r = -ENOMEM;
3213                 if (!u.xsave)
3214                         break;
3215
3216                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3217
3218                 r = -EFAULT;
3219                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3220                         break;
3221                 r = 0;
3222                 break;
3223         }
3224         case KVM_SET_XSAVE: {
3225                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3226                 r = -ENOMEM;
3227                 if (!u.xsave)
3228                         break;
3229
3230                 r = -EFAULT;
3231                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3232                         break;
3233
3234                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3235                 break;
3236         }
3237         case KVM_GET_XCRS: {
3238                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3239                 r = -ENOMEM;
3240                 if (!u.xcrs)
3241                         break;
3242
3243                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3244
3245                 r = -EFAULT;
3246                 if (copy_to_user(argp, u.xcrs,
3247                                  sizeof(struct kvm_xcrs)))
3248                         break;
3249                 r = 0;
3250                 break;
3251         }
3252         case KVM_SET_XCRS: {
3253                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3254                 r = -ENOMEM;
3255                 if (!u.xcrs)
3256                         break;
3257
3258                 r = -EFAULT;
3259                 if (copy_from_user(u.xcrs, argp,
3260                                    sizeof(struct kvm_xcrs)))
3261                         break;
3262
3263                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3264                 break;
3265         }
3266         case KVM_SET_TSC_KHZ: {
3267                 u32 user_tsc_khz;
3268
3269                 r = -EINVAL;
3270                 if (!kvm_has_tsc_control)
3271                         break;
3272
3273                 user_tsc_khz = (u32)arg;
3274
3275                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3276                         goto out;
3277
3278                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3279
3280                 r = 0;
3281                 goto out;
3282         }
3283         case KVM_GET_TSC_KHZ: {
3284                 r = -EIO;
3285                 if (check_tsc_unstable())
3286                         goto out;
3287
3288                 r = vcpu_tsc_khz(vcpu);
3289
3290                 goto out;
3291         }
3292         default:
3293                 r = -EINVAL;
3294         }
3295 out:
3296         kfree(u.buffer);
3297         return r;
3298 }
3299
3300 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3301 {
3302         int ret;
3303
3304         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3305                 return -1;
3306         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3307         return ret;
3308 }
3309
3310 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3311                                               u64 ident_addr)
3312 {
3313         kvm->arch.ept_identity_map_addr = ident_addr;
3314         return 0;
3315 }
3316
3317 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3318                                           u32 kvm_nr_mmu_pages)
3319 {
3320         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3321                 return -EINVAL;
3322
3323         mutex_lock(&kvm->slots_lock);
3324         spin_lock(&kvm->mmu_lock);
3325
3326         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3327         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3328
3329         spin_unlock(&kvm->mmu_lock);
3330         mutex_unlock(&kvm->slots_lock);
3331         return 0;
3332 }
3333
3334 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3335 {
3336         return kvm->arch.n_max_mmu_pages;
3337 }
3338
3339 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3340 {
3341         int r;
3342
3343         r = 0;
3344         switch (chip->chip_id) {
3345         case KVM_IRQCHIP_PIC_MASTER:
3346                 memcpy(&chip->chip.pic,
3347                         &pic_irqchip(kvm)->pics[0],
3348                         sizeof(struct kvm_pic_state));
3349                 break;
3350         case KVM_IRQCHIP_PIC_SLAVE:
3351                 memcpy(&chip->chip.pic,
3352                         &pic_irqchip(kvm)->pics[1],
3353                         sizeof(struct kvm_pic_state));
3354                 break;
3355         case KVM_IRQCHIP_IOAPIC:
3356                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3357                 break;
3358         default:
3359                 r = -EINVAL;
3360                 break;
3361         }
3362         return r;
3363 }
3364
3365 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3366 {
3367         int r;
3368
3369         r = 0;
3370         switch (chip->chip_id) {
3371         case KVM_IRQCHIP_PIC_MASTER:
3372                 spin_lock(&pic_irqchip(kvm)->lock);
3373                 memcpy(&pic_irqchip(kvm)->pics[0],
3374                         &chip->chip.pic,
3375                         sizeof(struct kvm_pic_state));
3376                 spin_unlock(&pic_irqchip(kvm)->lock);
3377                 break;
3378         case KVM_IRQCHIP_PIC_SLAVE:
3379                 spin_lock(&pic_irqchip(kvm)->lock);
3380                 memcpy(&pic_irqchip(kvm)->pics[1],
3381                         &chip->chip.pic,
3382                         sizeof(struct kvm_pic_state));
3383                 spin_unlock(&pic_irqchip(kvm)->lock);
3384                 break;
3385         case KVM_IRQCHIP_IOAPIC:
3386                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3387                 break;
3388         default:
3389                 r = -EINVAL;
3390                 break;
3391         }
3392         kvm_pic_update_irq(pic_irqchip(kvm));
3393         return r;
3394 }
3395
3396 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3397 {
3398         int r = 0;
3399
3400         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3401         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3402         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3403         return r;
3404 }
3405
3406 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3407 {
3408         int r = 0;
3409
3410         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3411         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3412         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3413         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3414         return r;
3415 }
3416
3417 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3418 {
3419         int r = 0;
3420
3421         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3422         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3423                 sizeof(ps->channels));
3424         ps->flags = kvm->arch.vpit->pit_state.flags;
3425         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3426         memset(&ps->reserved, 0, sizeof(ps->reserved));
3427         return r;
3428 }
3429
3430 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3431 {
3432         int r = 0, start = 0;
3433         u32 prev_legacy, cur_legacy;
3434         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3435         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3436         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3437         if (!prev_legacy && cur_legacy)
3438                 start = 1;
3439         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3440                sizeof(kvm->arch.vpit->pit_state.channels));
3441         kvm->arch.vpit->pit_state.flags = ps->flags;
3442         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3443         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3444         return r;
3445 }
3446
3447 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3448                                  struct kvm_reinject_control *control)
3449 {
3450         if (!kvm->arch.vpit)
3451                 return -ENXIO;
3452         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3453         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3454         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3455         return 0;
3456 }
3457
3458 /*
3459  * Get (and clear) the dirty memory log for a memory slot.
3460  */
3461 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3462                                       struct kvm_dirty_log *log)
3463 {
3464         int r, i;
3465         struct kvm_memory_slot *memslot;
3466         unsigned long n;
3467         unsigned long is_dirty = 0;
3468
3469         mutex_lock(&kvm->slots_lock);
3470
3471         r = -EINVAL;
3472         if (log->slot >= KVM_MEMORY_SLOTS)
3473                 goto out;
3474
3475         memslot = &kvm->memslots->memslots[log->slot];
3476         r = -ENOENT;
3477         if (!memslot->dirty_bitmap)
3478                 goto out;
3479
3480         n = kvm_dirty_bitmap_bytes(memslot);
3481
3482         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3483                 is_dirty = memslot->dirty_bitmap[i];
3484
3485         /* If nothing is dirty, don't bother messing with page tables. */
3486         if (is_dirty) {
3487                 struct kvm_memslots *slots, *old_slots;
3488                 unsigned long *dirty_bitmap;
3489
3490                 dirty_bitmap = memslot->dirty_bitmap_head;
3491                 if (memslot->dirty_bitmap == dirty_bitmap)
3492                         dirty_bitmap += n / sizeof(long);
3493                 memset(dirty_bitmap, 0, n);
3494
3495                 r = -ENOMEM;
3496                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3497                 if (!slots)
3498                         goto out;
3499                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3500                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3501                 slots->generation++;
3502
3503                 old_slots = kvm->memslots;
3504                 rcu_assign_pointer(kvm->memslots, slots);
3505                 synchronize_srcu_expedited(&kvm->srcu);
3506                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3507                 kfree(old_slots);
3508
3509                 spin_lock(&kvm->mmu_lock);
3510                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3511                 spin_unlock(&kvm->mmu_lock);
3512
3513                 r = -EFAULT;
3514                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3515                         goto out;
3516         } else {
3517                 r = -EFAULT;
3518                 if (clear_user(log->dirty_bitmap, n))
3519                         goto out;
3520         }
3521
3522         r = 0;
3523 out:
3524         mutex_unlock(&kvm->slots_lock);
3525         return r;
3526 }
3527
3528 long kvm_arch_vm_ioctl(struct file *filp,
3529                        unsigned int ioctl, unsigned long arg)
3530 {
3531         struct kvm *kvm = filp->private_data;
3532         void __user *argp = (void __user *)arg;
3533         int r = -ENOTTY;
3534         /*
3535          * This union makes it completely explicit to gcc-3.x
3536          * that these two variables' stack usage should be
3537          * combined, not added together.
3538          */
3539         union {
3540                 struct kvm_pit_state ps;
3541                 struct kvm_pit_state2 ps2;
3542                 struct kvm_pit_config pit_config;
3543         } u;
3544
3545         switch (ioctl) {
3546         case KVM_SET_TSS_ADDR:
3547                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3548                 if (r < 0)
3549                         goto out;
3550                 break;
3551         case KVM_SET_IDENTITY_MAP_ADDR: {
3552                 u64 ident_addr;
3553
3554                 r = -EFAULT;
3555                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3556                         goto out;
3557                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3558                 if (r < 0)
3559                         goto out;
3560                 break;
3561         }
3562         case KVM_SET_NR_MMU_PAGES:
3563                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3564                 if (r)
3565                         goto out;
3566                 break;
3567         case KVM_GET_NR_MMU_PAGES:
3568                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3569                 break;
3570         case KVM_CREATE_IRQCHIP: {
3571                 struct kvm_pic *vpic;
3572
3573                 mutex_lock(&kvm->lock);
3574                 r = -EEXIST;
3575                 if (kvm->arch.vpic)
3576                         goto create_irqchip_unlock;
3577                 r = -EINVAL;
3578                 if (atomic_read(&kvm->online_vcpus))
3579                         goto create_irqchip_unlock;
3580                 r = -ENOMEM;
3581                 vpic = kvm_create_pic(kvm);
3582                 if (vpic) {
3583                         r = kvm_ioapic_init(kvm);
3584                         if (r) {
3585                                 mutex_lock(&kvm->slots_lock);
3586                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3587                                                           &vpic->dev_master);
3588                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3589                                                           &vpic->dev_slave);
3590                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3591                                                           &vpic->dev_eclr);
3592                                 mutex_unlock(&kvm->slots_lock);
3593                                 kfree(vpic);
3594                                 goto create_irqchip_unlock;
3595                         }
3596                 } else
3597                         goto create_irqchip_unlock;
3598                 smp_wmb();
3599                 kvm->arch.vpic = vpic;
3600                 smp_wmb();
3601                 r = kvm_setup_default_irq_routing(kvm);
3602                 if (r) {
3603                         mutex_lock(&kvm->slots_lock);
3604                         mutex_lock(&kvm->irq_lock);
3605                         kvm_ioapic_destroy(kvm);
3606                         kvm_destroy_pic(kvm);
3607                         mutex_unlock(&kvm->irq_lock);
3608                         mutex_unlock(&kvm->slots_lock);
3609                 }
3610         create_irqchip_unlock:
3611                 mutex_unlock(&kvm->lock);
3612                 break;
3613         }
3614         case KVM_CREATE_PIT:
3615                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3616                 goto create_pit;
3617         case KVM_CREATE_PIT2:
3618                 r = -EFAULT;
3619                 if (copy_from_user(&u.pit_config, argp,
3620                                    sizeof(struct kvm_pit_config)))
3621                         goto out;
3622         create_pit:
3623                 mutex_lock(&kvm->slots_lock);
3624                 r = -EEXIST;
3625                 if (kvm->arch.vpit)
3626                         goto create_pit_unlock;
3627                 r = -ENOMEM;
3628                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3629                 if (kvm->arch.vpit)
3630                         r = 0;
3631         create_pit_unlock:
3632                 mutex_unlock(&kvm->slots_lock);
3633                 break;
3634         case KVM_IRQ_LINE_STATUS:
3635         case KVM_IRQ_LINE: {
3636                 struct kvm_irq_level irq_event;
3637
3638                 r = -EFAULT;
3639                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3640                         goto out;
3641                 r = -ENXIO;
3642                 if (irqchip_in_kernel(kvm)) {
3643                         __s32 status;
3644                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3645                                         irq_event.irq, irq_event.level);
3646                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3647                                 r = -EFAULT;
3648                                 irq_event.status = status;
3649                                 if (copy_to_user(argp, &irq_event,
3650                                                         sizeof irq_event))
3651                                         goto out;
3652                         }
3653                         r = 0;
3654                 }
3655                 break;
3656         }
3657         case KVM_GET_IRQCHIP: {
3658                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3659                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3660
3661                 r = -ENOMEM;
3662                 if (!chip)
3663                         goto out;
3664                 r = -EFAULT;
3665                 if (copy_from_user(chip, argp, sizeof *chip))
3666                         goto get_irqchip_out;
3667                 r = -ENXIO;
3668                 if (!irqchip_in_kernel(kvm))
3669                         goto get_irqchip_out;
3670                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3671                 if (r)
3672                         goto get_irqchip_out;
3673                 r = -EFAULT;
3674                 if (copy_to_user(argp, chip, sizeof *chip))
3675                         goto get_irqchip_out;
3676                 r = 0;
3677         get_irqchip_out:
3678                 kfree(chip);
3679                 if (r)
3680                         goto out;
3681                 break;
3682         }
3683         case KVM_SET_IRQCHIP: {
3684                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3685                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3686
3687                 r = -ENOMEM;
3688                 if (!chip)
3689                         goto out;
3690                 r = -EFAULT;
3691                 if (copy_from_user(chip, argp, sizeof *chip))
3692                         goto set_irqchip_out;
3693                 r = -ENXIO;
3694                 if (!irqchip_in_kernel(kvm))
3695                         goto set_irqchip_out;
3696                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3697                 if (r)
3698                         goto set_irqchip_out;
3699                 r = 0;
3700         set_irqchip_out:
3701                 kfree(chip);
3702                 if (r)
3703                         goto out;
3704                 break;
3705         }
3706         case KVM_GET_PIT: {
3707                 r = -EFAULT;
3708                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3709                         goto out;
3710                 r = -ENXIO;
3711                 if (!kvm->arch.vpit)
3712                         goto out;
3713                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3714                 if (r)
3715                         goto out;
3716                 r = -EFAULT;
3717                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3718                         goto out;
3719                 r = 0;
3720                 break;
3721         }
3722         case KVM_SET_PIT: {
3723                 r = -EFAULT;
3724                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3725                         goto out;
3726                 r = -ENXIO;
3727                 if (!kvm->arch.vpit)
3728                         goto out;
3729                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3730                 if (r)
3731                         goto out;
3732                 r = 0;
3733                 break;
3734         }
3735         case KVM_GET_PIT2: {
3736                 r = -ENXIO;
3737                 if (!kvm->arch.vpit)
3738                         goto out;
3739                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3740                 if (r)
3741                         goto out;
3742                 r = -EFAULT;
3743                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3744                         goto out;
3745                 r = 0;
3746                 break;
3747         }
3748         case KVM_SET_PIT2: {
3749                 r = -EFAULT;
3750                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3751                         goto out;
3752                 r = -ENXIO;
3753                 if (!kvm->arch.vpit)
3754                         goto out;
3755                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3756                 if (r)
3757                         goto out;
3758                 r = 0;
3759                 break;
3760         }
3761         case KVM_REINJECT_CONTROL: {
3762                 struct kvm_reinject_control control;
3763                 r =  -EFAULT;
3764                 if (copy_from_user(&control, argp, sizeof(control)))
3765                         goto out;
3766                 r = kvm_vm_ioctl_reinject(kvm, &control);
3767                 if (r)
3768                         goto out;
3769                 r = 0;
3770                 break;
3771         }
3772         case KVM_XEN_HVM_CONFIG: {
3773                 r = -EFAULT;
3774                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3775                                    sizeof(struct kvm_xen_hvm_config)))
3776                         goto out;
3777                 r = -EINVAL;
3778                 if (kvm->arch.xen_hvm_config.flags)
3779                         goto out;
3780                 r = 0;
3781                 break;
3782         }
3783         case KVM_SET_CLOCK: {
3784                 struct kvm_clock_data user_ns;
3785                 u64 now_ns;
3786                 s64 delta;
3787
3788                 r = -EFAULT;
3789                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3790                         goto out;
3791
3792                 r = -EINVAL;
3793                 if (user_ns.flags)
3794                         goto out;
3795
3796                 r = 0;
3797                 local_irq_disable();
3798                 now_ns = get_kernel_ns();
3799                 delta = user_ns.clock - now_ns;
3800                 local_irq_enable();
3801                 kvm->arch.kvmclock_offset = delta;
3802                 break;
3803         }
3804         case KVM_GET_CLOCK: {
3805                 struct kvm_clock_data user_ns;
3806                 u64 now_ns;
3807
3808                 local_irq_disable();
3809                 now_ns = get_kernel_ns();
3810                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3811                 local_irq_enable();
3812                 user_ns.flags = 0;
3813                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3814
3815                 r = -EFAULT;
3816                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3817                         goto out;
3818                 r = 0;
3819                 break;
3820         }
3821
3822         default:
3823                 ;
3824         }
3825 out:
3826         return r;
3827 }
3828
3829 static void kvm_init_msr_list(void)
3830 {
3831         u32 dummy[2];
3832         unsigned i, j;
3833
3834         /* skip the first msrs in the list. KVM-specific */
3835         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3836                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3837                         continue;
3838                 if (j < i)
3839                         msrs_to_save[j] = msrs_to_save[i];
3840                 j++;
3841         }
3842         num_msrs_to_save = j;
3843 }
3844
3845 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3846                            const void *v)
3847 {
3848         int handled = 0;
3849         int n;
3850
3851         do {
3852                 n = min(len, 8);
3853                 if (!(vcpu->arch.apic &&
3854                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3855                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3856                         break;
3857                 handled += n;
3858                 addr += n;
3859                 len -= n;
3860                 v += n;
3861         } while (len);
3862
3863         return handled;
3864 }
3865
3866 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3867 {
3868         int handled = 0;
3869         int n;
3870
3871         do {
3872                 n = min(len, 8);
3873                 if (!(vcpu->arch.apic &&
3874                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3875                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3876                         break;
3877                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3878                 handled += n;
3879                 addr += n;
3880                 len -= n;
3881                 v += n;
3882         } while (len);
3883
3884         return handled;
3885 }
3886
3887 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3888                         struct kvm_segment *var, int seg)
3889 {
3890         kvm_x86_ops->set_segment(vcpu, var, seg);
3891 }
3892
3893 void kvm_get_segment(struct kvm_vcpu *vcpu,
3894                      struct kvm_segment *var, int seg)
3895 {
3896         kvm_x86_ops->get_segment(vcpu, var, seg);
3897 }
3898
3899 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3900 {
3901         return gpa;
3902 }
3903
3904 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3905 {
3906         gpa_t t_gpa;
3907         struct x86_exception exception;
3908
3909         BUG_ON(!mmu_is_nested(vcpu));
3910
3911         /* NPT walks are always user-walks */
3912         access |= PFERR_USER_MASK;
3913         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3914
3915         return t_gpa;
3916 }
3917
3918 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3919                               struct x86_exception *exception)
3920 {
3921         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3922         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3923 }
3924
3925  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3926                                 struct x86_exception *exception)
3927 {
3928         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3929         access |= PFERR_FETCH_MASK;
3930         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3931 }
3932
3933 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3934                                struct x86_exception *exception)
3935 {
3936         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3937         access |= PFERR_WRITE_MASK;
3938         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3939 }
3940
3941 /* uses this to access any guest's mapped memory without checking CPL */
3942 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3943                                 struct x86_exception *exception)
3944 {
3945         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3946 }
3947
3948 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3949                                       struct kvm_vcpu *vcpu, u32 access,
3950                                       struct x86_exception *exception)
3951 {
3952         void *data = val;
3953         int r = X86EMUL_CONTINUE;
3954
3955         while (bytes) {
3956                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3957                                                             exception);
3958                 unsigned offset = addr & (PAGE_SIZE-1);
3959                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3960                 int ret;
3961
3962                 if (gpa == UNMAPPED_GVA)
3963                         return X86EMUL_PROPAGATE_FAULT;
3964                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3965                 if (ret < 0) {
3966                         r = X86EMUL_IO_NEEDED;
3967                         goto out;
3968                 }
3969
3970                 bytes -= toread;
3971                 data += toread;
3972                 addr += toread;
3973         }
3974 out:
3975         return r;
3976 }
3977
3978 /* used for instruction fetching */
3979 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3980                                 gva_t addr, void *val, unsigned int bytes,
3981                                 struct x86_exception *exception)
3982 {
3983         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3984         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3985
3986         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3987                                           access | PFERR_FETCH_MASK,
3988                                           exception);
3989 }
3990
3991 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3992                                gva_t addr, void *val, unsigned int bytes,
3993                                struct x86_exception *exception)
3994 {
3995         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3996         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3997
3998         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3999                                           exception);
4000 }
4001 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4002
4003 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4004                                       gva_t addr, void *val, unsigned int bytes,
4005                                       struct x86_exception *exception)
4006 {
4007         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4008         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4009 }
4010
4011 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4012                                        gva_t addr, void *val,
4013                                        unsigned int bytes,
4014                                        struct x86_exception *exception)
4015 {
4016         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4017         void *data = val;
4018         int r = X86EMUL_CONTINUE;
4019
4020         while (bytes) {
4021                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4022                                                              PFERR_WRITE_MASK,
4023                                                              exception);
4024                 unsigned offset = addr & (PAGE_SIZE-1);
4025                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4026                 int ret;
4027
4028                 if (gpa == UNMAPPED_GVA)
4029                         return X86EMUL_PROPAGATE_FAULT;
4030                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4031                 if (ret < 0) {
4032                         r = X86EMUL_IO_NEEDED;
4033                         goto out;
4034                 }
4035
4036                 bytes -= towrite;
4037                 data += towrite;
4038                 addr += towrite;
4039         }
4040 out:
4041         return r;
4042 }
4043 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4044
4045 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4046                                 gpa_t *gpa, struct x86_exception *exception,
4047                                 bool write)
4048 {
4049         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4050
4051         if (vcpu_match_mmio_gva(vcpu, gva) &&
4052                   check_write_user_access(vcpu, write, access,
4053                   vcpu->arch.access)) {
4054                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4055                                         (gva & (PAGE_SIZE - 1));
4056                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4057                 return 1;
4058         }
4059
4060         if (write)
4061                 access |= PFERR_WRITE_MASK;
4062
4063         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4064
4065         if (*gpa == UNMAPPED_GVA)
4066                 return -1;
4067
4068         /* For APIC access vmexit */
4069         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4070                 return 1;
4071
4072         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4073                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4074                 return 1;
4075         }
4076
4077         return 0;
4078 }
4079
4080 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4081                         const void *val, int bytes)
4082 {
4083         int ret;
4084
4085         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4086         if (ret < 0)
4087                 return 0;
4088         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4089         return 1;
4090 }
4091
4092 struct read_write_emulator_ops {
4093         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4094                                   int bytes);
4095         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4096                                   void *val, int bytes);
4097         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4098                                int bytes, void *val);
4099         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4100                                     void *val, int bytes);
4101         bool write;
4102 };
4103
4104 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4105 {
4106         if (vcpu->mmio_read_completed) {
4107                 memcpy(val, vcpu->mmio_data, bytes);
4108                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4109                                vcpu->mmio_phys_addr, *(u64 *)val);
4110                 vcpu->mmio_read_completed = 0;
4111                 return 1;
4112         }
4113
4114         return 0;
4115 }
4116
4117 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4118                         void *val, int bytes)
4119 {
4120         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4121 }
4122
4123 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4124                          void *val, int bytes)
4125 {
4126         return emulator_write_phys(vcpu, gpa, val, bytes);
4127 }
4128
4129 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4130 {
4131         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4132         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4133 }
4134
4135 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4136                           void *val, int bytes)
4137 {
4138         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4139         return X86EMUL_IO_NEEDED;
4140 }
4141
4142 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4143                            void *val, int bytes)
4144 {
4145         memcpy(vcpu->mmio_data, val, bytes);
4146         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4147         return X86EMUL_CONTINUE;
4148 }
4149
4150 static struct read_write_emulator_ops read_emultor = {
4151         .read_write_prepare = read_prepare,
4152         .read_write_emulate = read_emulate,
4153         .read_write_mmio = vcpu_mmio_read,
4154         .read_write_exit_mmio = read_exit_mmio,
4155 };
4156
4157 static struct read_write_emulator_ops write_emultor = {
4158         .read_write_emulate = write_emulate,
4159         .read_write_mmio = write_mmio,
4160         .read_write_exit_mmio = write_exit_mmio,
4161         .write = true,
4162 };
4163
4164 static int emulator_read_write_onepage(unsigned long addr, void *val,
4165                                        unsigned int bytes,
4166                                        struct x86_exception *exception,
4167                                        struct kvm_vcpu *vcpu,
4168                                        struct read_write_emulator_ops *ops)
4169 {
4170         gpa_t gpa;
4171         int handled, ret;
4172         bool write = ops->write;
4173
4174         if (ops->read_write_prepare &&
4175                   ops->read_write_prepare(vcpu, val, bytes))
4176                 return X86EMUL_CONTINUE;
4177
4178         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4179
4180         if (ret < 0)
4181                 return X86EMUL_PROPAGATE_FAULT;
4182
4183         /* For APIC access vmexit */
4184         if (ret)
4185                 goto mmio;
4186
4187         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4188                 return X86EMUL_CONTINUE;
4189
4190 mmio:
4191         /*
4192          * Is this MMIO handled locally?
4193          */
4194         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4195         if (handled == bytes)
4196                 return X86EMUL_CONTINUE;
4197
4198         gpa += handled;
4199         bytes -= handled;
4200         val += handled;
4201
4202         vcpu->mmio_needed = 1;
4203         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4204         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4205         vcpu->mmio_size = bytes;
4206         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4207         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4208         vcpu->mmio_index = 0;
4209
4210         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4211 }
4212
4213 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4214                         void *val, unsigned int bytes,
4215                         struct x86_exception *exception,
4216                         struct read_write_emulator_ops *ops)
4217 {
4218         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4219
4220         /* Crossing a page boundary? */
4221         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4222                 int rc, now;
4223
4224                 now = -addr & ~PAGE_MASK;
4225                 rc = emulator_read_write_onepage(addr, val, now, exception,
4226                                                  vcpu, ops);
4227
4228                 if (rc != X86EMUL_CONTINUE)
4229                         return rc;
4230                 addr += now;
4231                 val += now;
4232                 bytes -= now;
4233         }
4234
4235         return emulator_read_write_onepage(addr, val, bytes, exception,
4236                                            vcpu, ops);
4237 }
4238
4239 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4240                                   unsigned long addr,
4241                                   void *val,
4242                                   unsigned int bytes,
4243                                   struct x86_exception *exception)
4244 {
4245         return emulator_read_write(ctxt, addr, val, bytes,
4246                                    exception, &read_emultor);
4247 }
4248
4249 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4250                             unsigned long addr,
4251                             const void *val,
4252                             unsigned int bytes,
4253                             struct x86_exception *exception)
4254 {
4255         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4256                                    exception, &write_emultor);
4257 }
4258
4259 #define CMPXCHG_TYPE(t, ptr, old, new) \
4260         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4261
4262 #ifdef CONFIG_X86_64
4263 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4264 #else
4265 #  define CMPXCHG64(ptr, old, new) \
4266         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4267 #endif
4268
4269 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4270                                      unsigned long addr,
4271                                      const void *old,
4272                                      const void *new,
4273                                      unsigned int bytes,
4274                                      struct x86_exception *exception)
4275 {
4276         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4277         gpa_t gpa;
4278         struct page *page;
4279         char *kaddr;
4280         bool exchanged;
4281
4282         /* guests cmpxchg8b have to be emulated atomically */
4283         if (bytes > 8 || (bytes & (bytes - 1)))
4284                 goto emul_write;
4285
4286         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4287
4288         if (gpa == UNMAPPED_GVA ||
4289             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4290                 goto emul_write;
4291
4292         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4293                 goto emul_write;
4294
4295         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4296         if (is_error_page(page)) {
4297                 kvm_release_page_clean(page);
4298                 goto emul_write;
4299         }
4300
4301         kaddr = kmap_atomic(page, KM_USER0);
4302         kaddr += offset_in_page(gpa);
4303         switch (bytes) {
4304         case 1:
4305                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4306                 break;
4307         case 2:
4308                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4309                 break;
4310         case 4:
4311                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4312                 break;
4313         case 8:
4314                 exchanged = CMPXCHG64(kaddr, old, new);
4315                 break;
4316         default:
4317                 BUG();
4318         }
4319         kunmap_atomic(kaddr, KM_USER0);
4320         kvm_release_page_dirty(page);
4321
4322         if (!exchanged)
4323                 return X86EMUL_CMPXCHG_FAILED;
4324
4325         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4326
4327         return X86EMUL_CONTINUE;
4328
4329 emul_write:
4330         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4331
4332         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4333 }
4334
4335 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4336 {
4337         /* TODO: String I/O for in kernel device */
4338         int r;
4339
4340         if (vcpu->arch.pio.in)
4341                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4342                                     vcpu->arch.pio.size, pd);
4343         else
4344                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4345                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4346                                      pd);
4347         return r;
4348 }
4349
4350
4351 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4352                                     int size, unsigned short port, void *val,
4353                                     unsigned int count)
4354 {
4355         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4356
4357         if (vcpu->arch.pio.count)
4358                 goto data_avail;
4359
4360         trace_kvm_pio(0, port, size, count);
4361
4362         vcpu->arch.pio.port = port;
4363         vcpu->arch.pio.in = 1;
4364         vcpu->arch.pio.count  = count;
4365         vcpu->arch.pio.size = size;
4366
4367         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4368         data_avail:
4369                 memcpy(val, vcpu->arch.pio_data, size * count);
4370                 vcpu->arch.pio.count = 0;
4371                 return 1;
4372         }
4373
4374         vcpu->run->exit_reason = KVM_EXIT_IO;
4375         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4376         vcpu->run->io.size = size;
4377         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4378         vcpu->run->io.count = count;
4379         vcpu->run->io.port = port;
4380
4381         return 0;
4382 }
4383
4384 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4385                                      int size, unsigned short port,
4386                                      const void *val, unsigned int count)
4387 {
4388         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4389
4390         trace_kvm_pio(1, port, size, count);
4391
4392         vcpu->arch.pio.port = port;
4393         vcpu->arch.pio.in = 0;
4394         vcpu->arch.pio.count = count;
4395         vcpu->arch.pio.size = size;
4396
4397         memcpy(vcpu->arch.pio_data, val, size * count);
4398
4399         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4400                 vcpu->arch.pio.count = 0;
4401                 return 1;
4402         }
4403
4404         vcpu->run->exit_reason = KVM_EXIT_IO;
4405         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4406         vcpu->run->io.size = size;
4407         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4408         vcpu->run->io.count = count;
4409         vcpu->run->io.port = port;
4410
4411         return 0;
4412 }
4413
4414 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4415 {
4416         return kvm_x86_ops->get_segment_base(vcpu, seg);
4417 }
4418
4419 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4420 {
4421         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4422 }
4423
4424 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4425 {
4426         if (!need_emulate_wbinvd(vcpu))
4427                 return X86EMUL_CONTINUE;
4428
4429         if (kvm_x86_ops->has_wbinvd_exit()) {
4430                 int cpu = get_cpu();
4431
4432                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4433                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4434                                 wbinvd_ipi, NULL, 1);
4435                 put_cpu();
4436                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4437         } else
4438                 wbinvd();
4439         return X86EMUL_CONTINUE;
4440 }
4441 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4442
4443 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4444 {
4445         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4446 }
4447
4448 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4449 {
4450         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4451 }
4452
4453 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4454 {
4455
4456         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4457 }
4458
4459 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4460 {
4461         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4462 }
4463
4464 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4465 {
4466         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4467         unsigned long value;
4468
4469         switch (cr) {
4470         case 0:
4471                 value = kvm_read_cr0(vcpu);
4472                 break;
4473         case 2:
4474                 value = vcpu->arch.cr2;
4475                 break;
4476         case 3:
4477                 value = kvm_read_cr3(vcpu);
4478                 break;
4479         case 4:
4480                 value = kvm_read_cr4(vcpu);
4481                 break;
4482         case 8:
4483                 value = kvm_get_cr8(vcpu);
4484                 break;
4485         default:
4486                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4487                 return 0;
4488         }
4489
4490         return value;
4491 }
4492
4493 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4494 {
4495         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4496         int res = 0;
4497
4498         switch (cr) {
4499         case 0:
4500                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4501                 break;
4502         case 2:
4503                 vcpu->arch.cr2 = val;
4504                 break;
4505         case 3:
4506                 res = kvm_set_cr3(vcpu, val);
4507                 break;
4508         case 4:
4509                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4510                 break;
4511         case 8:
4512                 res = kvm_set_cr8(vcpu, val);
4513                 break;
4514         default:
4515                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4516                 res = -1;
4517         }
4518
4519         return res;
4520 }
4521
4522 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4523 {
4524         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4525 }
4526
4527 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4528 {
4529         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4530 }
4531
4532 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4533 {
4534         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4535 }
4536
4537 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4538 {
4539         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4540 }
4541
4542 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4543 {
4544         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4545 }
4546
4547 static unsigned long emulator_get_cached_segment_base(
4548         struct x86_emulate_ctxt *ctxt, int seg)
4549 {
4550         return get_segment_base(emul_to_vcpu(ctxt), seg);
4551 }
4552
4553 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4554                                  struct desc_struct *desc, u32 *base3,
4555                                  int seg)
4556 {
4557         struct kvm_segment var;
4558
4559         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4560         *selector = var.selector;
4561
4562         if (var.unusable)
4563                 return false;
4564
4565         if (var.g)
4566                 var.limit >>= 12;
4567         set_desc_limit(desc, var.limit);
4568         set_desc_base(desc, (unsigned long)var.base);
4569 #ifdef CONFIG_X86_64
4570         if (base3)
4571                 *base3 = var.base >> 32;
4572 #endif
4573         desc->type = var.type;
4574         desc->s = var.s;
4575         desc->dpl = var.dpl;
4576         desc->p = var.present;
4577         desc->avl = var.avl;
4578         desc->l = var.l;
4579         desc->d = var.db;
4580         desc->g = var.g;
4581
4582         return true;
4583 }
4584
4585 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4586                                  struct desc_struct *desc, u32 base3,
4587                                  int seg)
4588 {
4589         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4590         struct kvm_segment var;
4591
4592         var.selector = selector;
4593         var.base = get_desc_base(desc);
4594 #ifdef CONFIG_X86_64
4595         var.base |= ((u64)base3) << 32;
4596 #endif
4597         var.limit = get_desc_limit(desc);
4598         if (desc->g)
4599                 var.limit = (var.limit << 12) | 0xfff;
4600         var.type = desc->type;
4601         var.present = desc->p;
4602         var.dpl = desc->dpl;
4603         var.db = desc->d;
4604         var.s = desc->s;
4605         var.l = desc->l;
4606         var.g = desc->g;
4607         var.avl = desc->avl;
4608         var.present = desc->p;
4609         var.unusable = !var.present;
4610         var.padding = 0;
4611
4612         kvm_set_segment(vcpu, &var, seg);
4613         return;
4614 }
4615
4616 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4617                             u32 msr_index, u64 *pdata)
4618 {
4619         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4620 }
4621
4622 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4623                             u32 msr_index, u64 data)
4624 {
4625         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4626 }
4627
4628 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4629 {
4630         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4631 }
4632
4633 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4634 {
4635         preempt_disable();
4636         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4637         /*
4638          * CR0.TS may reference the host fpu state, not the guest fpu state,
4639          * so it may be clear at this point.
4640          */
4641         clts();
4642 }
4643
4644 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4645 {
4646         preempt_enable();
4647 }
4648
4649 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4650                               struct x86_instruction_info *info,
4651                               enum x86_intercept_stage stage)
4652 {
4653         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4654 }
4655
4656 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4657                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4658 {
4659         struct kvm_cpuid_entry2 *cpuid = NULL;
4660
4661         if (eax && ecx)
4662                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4663                                             *eax, *ecx);
4664
4665         if (cpuid) {
4666                 *eax = cpuid->eax;
4667                 *ecx = cpuid->ecx;
4668                 if (ebx)
4669                         *ebx = cpuid->ebx;
4670                 if (edx)
4671                         *edx = cpuid->edx;
4672                 return true;
4673         }
4674
4675         return false;
4676 }
4677
4678 static struct x86_emulate_ops emulate_ops = {
4679         .read_std            = kvm_read_guest_virt_system,
4680         .write_std           = kvm_write_guest_virt_system,
4681         .fetch               = kvm_fetch_guest_virt,
4682         .read_emulated       = emulator_read_emulated,
4683         .write_emulated      = emulator_write_emulated,
4684         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4685         .invlpg              = emulator_invlpg,
4686         .pio_in_emulated     = emulator_pio_in_emulated,
4687         .pio_out_emulated    = emulator_pio_out_emulated,
4688         .get_segment         = emulator_get_segment,
4689         .set_segment         = emulator_set_segment,
4690         .get_cached_segment_base = emulator_get_cached_segment_base,
4691         .get_gdt             = emulator_get_gdt,
4692         .get_idt             = emulator_get_idt,
4693         .set_gdt             = emulator_set_gdt,
4694         .set_idt             = emulator_set_idt,
4695         .get_cr              = emulator_get_cr,
4696         .set_cr              = emulator_set_cr,
4697         .cpl                 = emulator_get_cpl,
4698         .get_dr              = emulator_get_dr,
4699         .set_dr              = emulator_set_dr,
4700         .set_msr             = emulator_set_msr,
4701         .get_msr             = emulator_get_msr,
4702         .halt                = emulator_halt,
4703         .wbinvd              = emulator_wbinvd,
4704         .fix_hypercall       = emulator_fix_hypercall,
4705         .get_fpu             = emulator_get_fpu,
4706         .put_fpu             = emulator_put_fpu,
4707         .intercept           = emulator_intercept,
4708         .get_cpuid           = emulator_get_cpuid,
4709 };
4710
4711 static void cache_all_regs(struct kvm_vcpu *vcpu)
4712 {
4713         kvm_register_read(vcpu, VCPU_REGS_RAX);
4714         kvm_register_read(vcpu, VCPU_REGS_RSP);
4715         kvm_register_read(vcpu, VCPU_REGS_RIP);
4716         vcpu->arch.regs_dirty = ~0;
4717 }
4718
4719 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4720 {
4721         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4722         /*
4723          * an sti; sti; sequence only disable interrupts for the first
4724          * instruction. So, if the last instruction, be it emulated or
4725          * not, left the system with the INT_STI flag enabled, it
4726          * means that the last instruction is an sti. We should not
4727          * leave the flag on in this case. The same goes for mov ss
4728          */
4729         if (!(int_shadow & mask))
4730                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4731 }
4732
4733 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4734 {
4735         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4736         if (ctxt->exception.vector == PF_VECTOR)
4737                 kvm_propagate_fault(vcpu, &ctxt->exception);
4738         else if (ctxt->exception.error_code_valid)
4739                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4740                                       ctxt->exception.error_code);
4741         else
4742                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4743 }
4744
4745 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4746                               const unsigned long *regs)
4747 {
4748         memset(&ctxt->twobyte, 0,
4749                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4750         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4751
4752         ctxt->fetch.start = 0;
4753         ctxt->fetch.end = 0;
4754         ctxt->io_read.pos = 0;
4755         ctxt->io_read.end = 0;
4756         ctxt->mem_read.pos = 0;
4757         ctxt->mem_read.end = 0;
4758 }
4759
4760 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4761 {
4762         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4763         int cs_db, cs_l;
4764
4765         /*
4766          * TODO: fix emulate.c to use guest_read/write_register
4767          * instead of direct ->regs accesses, can save hundred cycles
4768          * on Intel for instructions that don't read/change RSP, for
4769          * for example.
4770          */
4771         cache_all_regs(vcpu);
4772
4773         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4774
4775         ctxt->eflags = kvm_get_rflags(vcpu);
4776         ctxt->eip = kvm_rip_read(vcpu);
4777         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4778                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4779                      cs_l                               ? X86EMUL_MODE_PROT64 :
4780                      cs_db                              ? X86EMUL_MODE_PROT32 :
4781                                                           X86EMUL_MODE_PROT16;
4782         ctxt->guest_mode = is_guest_mode(vcpu);
4783
4784         init_decode_cache(ctxt, vcpu->arch.regs);
4785         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4786 }
4787
4788 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4789 {
4790         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4791         int ret;
4792
4793         init_emulate_ctxt(vcpu);
4794
4795         ctxt->op_bytes = 2;
4796         ctxt->ad_bytes = 2;
4797         ctxt->_eip = ctxt->eip + inc_eip;
4798         ret = emulate_int_real(ctxt, irq);
4799
4800         if (ret != X86EMUL_CONTINUE)
4801                 return EMULATE_FAIL;
4802
4803         ctxt->eip = ctxt->_eip;
4804         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4805         kvm_rip_write(vcpu, ctxt->eip);
4806         kvm_set_rflags(vcpu, ctxt->eflags);
4807
4808         if (irq == NMI_VECTOR)
4809                 vcpu->arch.nmi_pending = 0;
4810         else
4811                 vcpu->arch.interrupt.pending = false;
4812
4813         return EMULATE_DONE;
4814 }
4815 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4816
4817 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4818 {
4819         int r = EMULATE_DONE;
4820
4821         ++vcpu->stat.insn_emulation_fail;
4822         trace_kvm_emulate_insn_failed(vcpu);
4823         if (!is_guest_mode(vcpu)) {
4824                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4825                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4826                 vcpu->run->internal.ndata = 0;
4827                 r = EMULATE_FAIL;
4828         }
4829         kvm_queue_exception(vcpu, UD_VECTOR);
4830
4831         return r;
4832 }
4833
4834 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4835 {
4836         gpa_t gpa;
4837
4838         if (tdp_enabled)
4839                 return false;
4840
4841         /*
4842          * if emulation was due to access to shadowed page table
4843          * and it failed try to unshadow page and re-entetr the
4844          * guest to let CPU execute the instruction.
4845          */
4846         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4847                 return true;
4848
4849         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4850
4851         if (gpa == UNMAPPED_GVA)
4852                 return true; /* let cpu generate fault */
4853
4854         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4855                 return true;
4856
4857         return false;
4858 }
4859
4860 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4861                             unsigned long cr2,
4862                             int emulation_type,
4863                             void *insn,
4864                             int insn_len)
4865 {
4866         int r;
4867         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4868         bool writeback = true;
4869
4870         kvm_clear_exception_queue(vcpu);
4871
4872         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4873                 init_emulate_ctxt(vcpu);
4874                 ctxt->interruptibility = 0;
4875                 ctxt->have_exception = false;
4876                 ctxt->perm_ok = false;
4877
4878                 ctxt->only_vendor_specific_insn
4879                         = emulation_type & EMULTYPE_TRAP_UD;
4880
4881                 r = x86_decode_insn(ctxt, insn, insn_len);
4882
4883                 trace_kvm_emulate_insn_start(vcpu);
4884                 ++vcpu->stat.insn_emulation;
4885                 if (r != EMULATION_OK)  {
4886                         if (emulation_type & EMULTYPE_TRAP_UD)
4887                                 return EMULATE_FAIL;
4888                         if (reexecute_instruction(vcpu, cr2))
4889                                 return EMULATE_DONE;
4890                         if (emulation_type & EMULTYPE_SKIP)
4891                                 return EMULATE_FAIL;
4892                         return handle_emulation_failure(vcpu);
4893                 }
4894         }
4895
4896         if (emulation_type & EMULTYPE_SKIP) {
4897                 kvm_rip_write(vcpu, ctxt->_eip);
4898                 return EMULATE_DONE;
4899         }
4900
4901         /* this is needed for vmware backdoor interface to work since it
4902            changes registers values  during IO operation */
4903         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4904                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4905                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4906         }
4907
4908 restart:
4909         r = x86_emulate_insn(ctxt);
4910
4911         if (r == EMULATION_INTERCEPTED)
4912                 return EMULATE_DONE;
4913
4914         if (r == EMULATION_FAILED) {
4915                 if (reexecute_instruction(vcpu, cr2))
4916                         return EMULATE_DONE;
4917
4918                 return handle_emulation_failure(vcpu);
4919         }
4920
4921         if (ctxt->have_exception) {
4922                 inject_emulated_exception(vcpu);
4923                 r = EMULATE_DONE;
4924         } else if (vcpu->arch.pio.count) {
4925                 if (!vcpu->arch.pio.in)
4926                         vcpu->arch.pio.count = 0;
4927                 else
4928                         writeback = false;
4929                 r = EMULATE_DO_MMIO;
4930         } else if (vcpu->mmio_needed) {
4931                 if (!vcpu->mmio_is_write)
4932                         writeback = false;
4933                 r = EMULATE_DO_MMIO;
4934         } else if (r == EMULATION_RESTART)
4935                 goto restart;
4936         else
4937                 r = EMULATE_DONE;
4938
4939         if (writeback) {
4940                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4941                 kvm_set_rflags(vcpu, ctxt->eflags);
4942                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4943                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4944                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4945                 kvm_rip_write(vcpu, ctxt->eip);
4946         } else
4947                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4948
4949         return r;
4950 }
4951 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4952
4953 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4954 {
4955         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4956         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4957                                             size, port, &val, 1);
4958         /* do not return to emulator after return from userspace */
4959         vcpu->arch.pio.count = 0;
4960         return ret;
4961 }
4962 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4963
4964 static void tsc_bad(void *info)
4965 {
4966         __this_cpu_write(cpu_tsc_khz, 0);
4967 }
4968
4969 static void tsc_khz_changed(void *data)
4970 {
4971         struct cpufreq_freqs *freq = data;
4972         unsigned long khz = 0;
4973
4974         if (data)
4975                 khz = freq->new;
4976         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4977                 khz = cpufreq_quick_get(raw_smp_processor_id());
4978         if (!khz)
4979                 khz = tsc_khz;
4980         __this_cpu_write(cpu_tsc_khz, khz);
4981 }
4982
4983 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4984                                      void *data)
4985 {
4986         struct cpufreq_freqs *freq = data;
4987         struct kvm *kvm;
4988         struct kvm_vcpu *vcpu;
4989         int i, send_ipi = 0;
4990
4991         /*
4992          * We allow guests to temporarily run on slowing clocks,
4993          * provided we notify them after, or to run on accelerating
4994          * clocks, provided we notify them before.  Thus time never
4995          * goes backwards.
4996          *
4997          * However, we have a problem.  We can't atomically update
4998          * the frequency of a given CPU from this function; it is
4999          * merely a notifier, which can be called from any CPU.
5000          * Changing the TSC frequency at arbitrary points in time
5001          * requires a recomputation of local variables related to
5002          * the TSC for each VCPU.  We must flag these local variables
5003          * to be updated and be sure the update takes place with the
5004          * new frequency before any guests proceed.
5005          *
5006          * Unfortunately, the combination of hotplug CPU and frequency
5007          * change creates an intractable locking scenario; the order
5008          * of when these callouts happen is undefined with respect to
5009          * CPU hotplug, and they can race with each other.  As such,
5010          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5011          * undefined; you can actually have a CPU frequency change take
5012          * place in between the computation of X and the setting of the
5013          * variable.  To protect against this problem, all updates of
5014          * the per_cpu tsc_khz variable are done in an interrupt
5015          * protected IPI, and all callers wishing to update the value
5016          * must wait for a synchronous IPI to complete (which is trivial
5017          * if the caller is on the CPU already).  This establishes the
5018          * necessary total order on variable updates.
5019          *
5020          * Note that because a guest time update may take place
5021          * anytime after the setting of the VCPU's request bit, the
5022          * correct TSC value must be set before the request.  However,
5023          * to ensure the update actually makes it to any guest which
5024          * starts running in hardware virtualization between the set
5025          * and the acquisition of the spinlock, we must also ping the
5026          * CPU after setting the request bit.
5027          *
5028          */
5029
5030         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5031                 return 0;
5032         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5033                 return 0;
5034
5035         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5036
5037         raw_spin_lock(&kvm_lock);
5038         list_for_each_entry(kvm, &vm_list, vm_list) {
5039                 kvm_for_each_vcpu(i, vcpu, kvm) {
5040                         if (vcpu->cpu != freq->cpu)
5041                                 continue;
5042                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5043                         if (vcpu->cpu != smp_processor_id())
5044                                 send_ipi = 1;
5045                 }
5046         }
5047         raw_spin_unlock(&kvm_lock);
5048
5049         if (freq->old < freq->new && send_ipi) {
5050                 /*
5051                  * We upscale the frequency.  Must make the guest
5052                  * doesn't see old kvmclock values while running with
5053                  * the new frequency, otherwise we risk the guest sees
5054                  * time go backwards.
5055                  *
5056                  * In case we update the frequency for another cpu
5057                  * (which might be in guest context) send an interrupt
5058                  * to kick the cpu out of guest context.  Next time
5059                  * guest context is entered kvmclock will be updated,
5060                  * so the guest will not see stale values.
5061                  */
5062                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5063         }
5064         return 0;
5065 }
5066
5067 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5068         .notifier_call  = kvmclock_cpufreq_notifier
5069 };
5070
5071 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5072                                         unsigned long action, void *hcpu)
5073 {
5074         unsigned int cpu = (unsigned long)hcpu;
5075
5076         switch (action) {
5077                 case CPU_ONLINE:
5078                 case CPU_DOWN_FAILED:
5079                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5080                         break;
5081                 case CPU_DOWN_PREPARE:
5082                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5083                         break;
5084         }
5085         return NOTIFY_OK;
5086 }
5087
5088 static struct notifier_block kvmclock_cpu_notifier_block = {
5089         .notifier_call  = kvmclock_cpu_notifier,
5090         .priority = -INT_MAX
5091 };
5092
5093 static void kvm_timer_init(void)
5094 {
5095         int cpu;
5096
5097         max_tsc_khz = tsc_khz;
5098         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5099         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5100 #ifdef CONFIG_CPU_FREQ
5101                 struct cpufreq_policy policy;
5102                 memset(&policy, 0, sizeof(policy));
5103                 cpu = get_cpu();
5104                 cpufreq_get_policy(&policy, cpu);
5105                 if (policy.cpuinfo.max_freq)
5106                         max_tsc_khz = policy.cpuinfo.max_freq;
5107                 put_cpu();
5108 #endif
5109                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5110                                           CPUFREQ_TRANSITION_NOTIFIER);
5111         }
5112         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5113         for_each_online_cpu(cpu)
5114                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5115 }
5116
5117 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5118
5119 static int kvm_is_in_guest(void)
5120 {
5121         return percpu_read(current_vcpu) != NULL;
5122 }
5123
5124 static int kvm_is_user_mode(void)
5125 {
5126         int user_mode = 3;
5127
5128         if (percpu_read(current_vcpu))
5129                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5130
5131         return user_mode != 0;
5132 }
5133
5134 static unsigned long kvm_get_guest_ip(void)
5135 {
5136         unsigned long ip = 0;
5137
5138         if (percpu_read(current_vcpu))
5139                 ip = kvm_rip_read(percpu_read(current_vcpu));
5140
5141         return ip;
5142 }
5143
5144 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5145         .is_in_guest            = kvm_is_in_guest,
5146         .is_user_mode           = kvm_is_user_mode,
5147         .get_guest_ip           = kvm_get_guest_ip,
5148 };
5149
5150 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5151 {
5152         percpu_write(current_vcpu, vcpu);
5153 }
5154 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5155
5156 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5157 {
5158         percpu_write(current_vcpu, NULL);
5159 }
5160 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5161
5162 static void kvm_set_mmio_spte_mask(void)
5163 {
5164         u64 mask;
5165         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5166
5167         /*
5168          * Set the reserved bits and the present bit of an paging-structure
5169          * entry to generate page fault with PFER.RSV = 1.
5170          */
5171         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5172         mask |= 1ull;
5173
5174 #ifdef CONFIG_X86_64
5175         /*
5176          * If reserved bit is not supported, clear the present bit to disable
5177          * mmio page fault.
5178          */
5179         if (maxphyaddr == 52)
5180                 mask &= ~1ull;
5181 #endif
5182
5183         kvm_mmu_set_mmio_spte_mask(mask);
5184 }
5185
5186 int kvm_arch_init(void *opaque)
5187 {
5188         int r;
5189         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5190
5191         if (kvm_x86_ops) {
5192                 printk(KERN_ERR "kvm: already loaded the other module\n");
5193                 r = -EEXIST;
5194                 goto out;
5195         }
5196
5197         if (!ops->cpu_has_kvm_support()) {
5198                 printk(KERN_ERR "kvm: no hardware support\n");
5199                 r = -EOPNOTSUPP;
5200                 goto out;
5201         }
5202         if (ops->disabled_by_bios()) {
5203                 printk(KERN_ERR "kvm: disabled by bios\n");
5204                 r = -EOPNOTSUPP;
5205                 goto out;
5206         }
5207
5208         r = kvm_mmu_module_init();
5209         if (r)
5210                 goto out;
5211
5212         kvm_set_mmio_spte_mask();
5213         kvm_init_msr_list();
5214
5215         kvm_x86_ops = ops;
5216         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5217                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5218
5219         kvm_timer_init();
5220
5221         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5222
5223         if (cpu_has_xsave)
5224                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5225
5226         return 0;
5227
5228 out:
5229         return r;
5230 }
5231
5232 void kvm_arch_exit(void)
5233 {
5234         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5235
5236         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5237                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5238                                             CPUFREQ_TRANSITION_NOTIFIER);
5239         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5240         kvm_x86_ops = NULL;
5241         kvm_mmu_module_exit();
5242 }
5243
5244 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5245 {
5246         ++vcpu->stat.halt_exits;
5247         if (irqchip_in_kernel(vcpu->kvm)) {
5248                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5249                 return 1;
5250         } else {
5251                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5252                 return 0;
5253         }
5254 }
5255 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5256
5257 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5258                            unsigned long a1)
5259 {
5260         if (is_long_mode(vcpu))
5261                 return a0;
5262         else
5263                 return a0 | ((gpa_t)a1 << 32);
5264 }
5265
5266 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5267 {
5268         u64 param, ingpa, outgpa, ret;
5269         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5270         bool fast, longmode;
5271         int cs_db, cs_l;
5272
5273         /*
5274          * hypercall generates UD from non zero cpl and real mode
5275          * per HYPER-V spec
5276          */
5277         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5278                 kvm_queue_exception(vcpu, UD_VECTOR);
5279                 return 0;
5280         }
5281
5282         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5283         longmode = is_long_mode(vcpu) && cs_l == 1;
5284
5285         if (!longmode) {
5286                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5287                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5288                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5289                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5290                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5291                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5292         }
5293 #ifdef CONFIG_X86_64
5294         else {
5295                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5296                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5297                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5298         }
5299 #endif
5300
5301         code = param & 0xffff;
5302         fast = (param >> 16) & 0x1;
5303         rep_cnt = (param >> 32) & 0xfff;
5304         rep_idx = (param >> 48) & 0xfff;
5305
5306         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5307
5308         switch (code) {
5309         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5310                 kvm_vcpu_on_spin(vcpu);
5311                 break;
5312         default:
5313                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5314                 break;
5315         }
5316
5317         ret = res | (((u64)rep_done & 0xfff) << 32);
5318         if (longmode) {
5319                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5320         } else {
5321                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5322                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5323         }
5324
5325         return 1;
5326 }
5327
5328 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5329 {
5330         unsigned long nr, a0, a1, a2, a3, ret;
5331         int r = 1;
5332
5333         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5334                 return kvm_hv_hypercall(vcpu);
5335
5336         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5337         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5338         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5339         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5340         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5341
5342         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5343
5344         if (!is_long_mode(vcpu)) {
5345                 nr &= 0xFFFFFFFF;
5346                 a0 &= 0xFFFFFFFF;
5347                 a1 &= 0xFFFFFFFF;
5348                 a2 &= 0xFFFFFFFF;
5349                 a3 &= 0xFFFFFFFF;
5350         }
5351
5352         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5353                 ret = -KVM_EPERM;
5354                 goto out;
5355         }
5356
5357         switch (nr) {
5358         case KVM_HC_VAPIC_POLL_IRQ:
5359                 ret = 0;
5360                 break;
5361         case KVM_HC_MMU_OP:
5362                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5363                 break;
5364         default:
5365                 ret = -KVM_ENOSYS;
5366                 break;
5367         }
5368 out:
5369         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5370         ++vcpu->stat.hypercalls;
5371         return r;
5372 }
5373 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5374
5375 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5376 {
5377         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5378         char instruction[3];
5379         unsigned long rip = kvm_rip_read(vcpu);
5380
5381         /*
5382          * Blow out the MMU to ensure that no other VCPU has an active mapping
5383          * to ensure that the updated hypercall appears atomically across all
5384          * VCPUs.
5385          */
5386         kvm_mmu_zap_all(vcpu->kvm);
5387
5388         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5389
5390         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5391 }
5392
5393 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5394 {
5395         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5396         int j, nent = vcpu->arch.cpuid_nent;
5397
5398         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5399         /* when no next entry is found, the current entry[i] is reselected */
5400         for (j = i + 1; ; j = (j + 1) % nent) {
5401                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5402                 if (ej->function == e->function) {
5403                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5404                         return j;
5405                 }
5406         }
5407         return 0; /* silence gcc, even though control never reaches here */
5408 }
5409
5410 /* find an entry with matching function, matching index (if needed), and that
5411  * should be read next (if it's stateful) */
5412 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5413         u32 function, u32 index)
5414 {
5415         if (e->function != function)
5416                 return 0;
5417         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5418                 return 0;
5419         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5420             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5421                 return 0;
5422         return 1;
5423 }
5424
5425 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5426                                               u32 function, u32 index)
5427 {
5428         int i;
5429         struct kvm_cpuid_entry2 *best = NULL;
5430
5431         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5432                 struct kvm_cpuid_entry2 *e;
5433
5434                 e = &vcpu->arch.cpuid_entries[i];
5435                 if (is_matching_cpuid_entry(e, function, index)) {
5436                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5437                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5438                         best = e;
5439                         break;
5440                 }
5441         }
5442         return best;
5443 }
5444 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5445
5446 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5447 {
5448         struct kvm_cpuid_entry2 *best;
5449
5450         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5451         if (!best || best->eax < 0x80000008)
5452                 goto not_found;
5453         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5454         if (best)
5455                 return best->eax & 0xff;
5456 not_found:
5457         return 36;
5458 }
5459
5460 /*
5461  * If no match is found, check whether we exceed the vCPU's limit
5462  * and return the content of the highest valid _standard_ leaf instead.
5463  * This is to satisfy the CPUID specification.
5464  */
5465 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5466                                                   u32 function, u32 index)
5467 {
5468         struct kvm_cpuid_entry2 *maxlevel;
5469
5470         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5471         if (!maxlevel || maxlevel->eax >= function)
5472                 return NULL;
5473         if (function & 0x80000000) {
5474                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5475                 if (!maxlevel)
5476                         return NULL;
5477         }
5478         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5479 }
5480
5481 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5482 {
5483         u32 function, index;
5484         struct kvm_cpuid_entry2 *best;
5485
5486         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5487         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5488         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5489         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5490         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5491         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5492         best = kvm_find_cpuid_entry(vcpu, function, index);
5493
5494         if (!best)
5495                 best = check_cpuid_limit(vcpu, function, index);
5496
5497         if (best) {
5498                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5499                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5500                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5501                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5502         }
5503         kvm_x86_ops->skip_emulated_instruction(vcpu);
5504         trace_kvm_cpuid(function,
5505                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5506                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5507                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5508                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5509 }
5510 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5511
5512 /*
5513  * Check if userspace requested an interrupt window, and that the
5514  * interrupt window is open.
5515  *
5516  * No need to exit to userspace if we already have an interrupt queued.
5517  */
5518 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5519 {
5520         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5521                 vcpu->run->request_interrupt_window &&
5522                 kvm_arch_interrupt_allowed(vcpu));
5523 }
5524
5525 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5526 {
5527         struct kvm_run *kvm_run = vcpu->run;
5528
5529         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5530         kvm_run->cr8 = kvm_get_cr8(vcpu);
5531         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5532         if (irqchip_in_kernel(vcpu->kvm))
5533                 kvm_run->ready_for_interrupt_injection = 1;
5534         else
5535                 kvm_run->ready_for_interrupt_injection =
5536                         kvm_arch_interrupt_allowed(vcpu) &&
5537                         !kvm_cpu_has_interrupt(vcpu) &&
5538                         !kvm_event_needs_reinjection(vcpu);
5539 }
5540
5541 static void vapic_enter(struct kvm_vcpu *vcpu)
5542 {
5543         struct kvm_lapic *apic = vcpu->arch.apic;
5544         struct page *page;
5545
5546         if (!apic || !apic->vapic_addr)
5547                 return;
5548
5549         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5550
5551         vcpu->arch.apic->vapic_page = page;
5552 }
5553
5554 static void vapic_exit(struct kvm_vcpu *vcpu)
5555 {
5556         struct kvm_lapic *apic = vcpu->arch.apic;
5557         int idx;
5558
5559         if (!apic || !apic->vapic_addr)
5560                 return;
5561
5562         idx = srcu_read_lock(&vcpu->kvm->srcu);
5563         kvm_release_page_dirty(apic->vapic_page);
5564         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5565         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5566 }
5567
5568 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5569 {
5570         int max_irr, tpr;
5571
5572         if (!kvm_x86_ops->update_cr8_intercept)
5573                 return;
5574
5575         if (!vcpu->arch.apic)
5576                 return;
5577
5578         if (!vcpu->arch.apic->vapic_addr)
5579                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5580         else
5581                 max_irr = -1;
5582
5583         if (max_irr != -1)
5584                 max_irr >>= 4;
5585
5586         tpr = kvm_lapic_get_cr8(vcpu);
5587
5588         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5589 }
5590
5591 static void inject_pending_event(struct kvm_vcpu *vcpu)
5592 {
5593         /* try to reinject previous events if any */
5594         if (vcpu->arch.exception.pending) {
5595                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5596                                         vcpu->arch.exception.has_error_code,
5597                                         vcpu->arch.exception.error_code);
5598                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5599                                           vcpu->arch.exception.has_error_code,
5600                                           vcpu->arch.exception.error_code,
5601                                           vcpu->arch.exception.reinject);
5602                 return;
5603         }
5604
5605         if (vcpu->arch.nmi_injected) {
5606                 kvm_x86_ops->set_nmi(vcpu);
5607                 return;
5608         }
5609
5610         if (vcpu->arch.interrupt.pending) {
5611                 kvm_x86_ops->set_irq(vcpu);
5612                 return;
5613         }
5614
5615         /* try to inject new event if pending */
5616         if (vcpu->arch.nmi_pending) {
5617                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5618                         --vcpu->arch.nmi_pending;
5619                         vcpu->arch.nmi_injected = true;
5620                         kvm_x86_ops->set_nmi(vcpu);
5621                 }
5622         } else if (kvm_cpu_has_interrupt(vcpu)) {
5623                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5624                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5625                                             false);
5626                         kvm_x86_ops->set_irq(vcpu);
5627                 }
5628         }
5629 }
5630
5631 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5632 {
5633         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5634                         !vcpu->guest_xcr0_loaded) {
5635                 /* kvm_set_xcr() also depends on this */
5636                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5637                 vcpu->guest_xcr0_loaded = 1;
5638         }
5639 }
5640
5641 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5642 {
5643         if (vcpu->guest_xcr0_loaded) {
5644                 if (vcpu->arch.xcr0 != host_xcr0)
5645                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5646                 vcpu->guest_xcr0_loaded = 0;
5647         }
5648 }
5649
5650 static void process_nmi(struct kvm_vcpu *vcpu)
5651 {
5652         unsigned limit = 2;
5653
5654         /*
5655          * x86 is limited to one NMI running, and one NMI pending after it.
5656          * If an NMI is already in progress, limit further NMIs to just one.
5657          * Otherwise, allow two (and we'll inject the first one immediately).
5658          */
5659         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5660                 limit = 1;
5661
5662         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5663         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5664         kvm_make_request(KVM_REQ_EVENT, vcpu);
5665 }
5666
5667 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5668 {
5669         int r;
5670         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5671                 vcpu->run->request_interrupt_window;
5672
5673         if (vcpu->requests) {
5674                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5675                         kvm_mmu_unload(vcpu);
5676                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5677                         __kvm_migrate_timers(vcpu);
5678                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5679                         r = kvm_guest_time_update(vcpu);
5680                         if (unlikely(r))
5681                                 goto out;
5682                 }
5683                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5684                         kvm_mmu_sync_roots(vcpu);
5685                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5686                         kvm_x86_ops->tlb_flush(vcpu);
5687                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5688                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5689                         r = 0;
5690                         goto out;
5691                 }
5692                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5693                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5694                         r = 0;
5695                         goto out;
5696                 }
5697                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5698                         vcpu->fpu_active = 0;
5699                         kvm_x86_ops->fpu_deactivate(vcpu);
5700                 }
5701                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5702                         /* Page is swapped out. Do synthetic halt */
5703                         vcpu->arch.apf.halted = true;
5704                         r = 1;
5705                         goto out;
5706                 }
5707                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5708                         record_steal_time(vcpu);
5709                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5710                         process_nmi(vcpu);
5711
5712         }
5713
5714         r = kvm_mmu_reload(vcpu);
5715         if (unlikely(r))
5716                 goto out;
5717
5718         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5719                 inject_pending_event(vcpu);
5720
5721                 /* enable NMI/IRQ window open exits if needed */
5722                 if (vcpu->arch.nmi_pending)
5723                         kvm_x86_ops->enable_nmi_window(vcpu);
5724                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5725                         kvm_x86_ops->enable_irq_window(vcpu);
5726
5727                 if (kvm_lapic_enabled(vcpu)) {
5728                         update_cr8_intercept(vcpu);
5729                         kvm_lapic_sync_to_vapic(vcpu);
5730                 }
5731         }
5732
5733         preempt_disable();
5734
5735         kvm_x86_ops->prepare_guest_switch(vcpu);
5736         if (vcpu->fpu_active)
5737                 kvm_load_guest_fpu(vcpu);
5738         kvm_load_guest_xcr0(vcpu);
5739
5740         vcpu->mode = IN_GUEST_MODE;
5741
5742         /* We should set ->mode before check ->requests,
5743          * see the comment in make_all_cpus_request.
5744          */
5745         smp_mb();
5746
5747         local_irq_disable();
5748
5749         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5750             || need_resched() || signal_pending(current)) {
5751                 vcpu->mode = OUTSIDE_GUEST_MODE;
5752                 smp_wmb();
5753                 local_irq_enable();
5754                 preempt_enable();
5755                 kvm_x86_ops->cancel_injection(vcpu);
5756                 r = 1;
5757                 goto out;
5758         }
5759
5760         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5761
5762         kvm_guest_enter();
5763
5764         if (unlikely(vcpu->arch.switch_db_regs)) {
5765                 set_debugreg(0, 7);
5766                 set_debugreg(vcpu->arch.eff_db[0], 0);
5767                 set_debugreg(vcpu->arch.eff_db[1], 1);
5768                 set_debugreg(vcpu->arch.eff_db[2], 2);
5769                 set_debugreg(vcpu->arch.eff_db[3], 3);
5770         }
5771
5772         trace_kvm_entry(vcpu->vcpu_id);
5773         kvm_x86_ops->run(vcpu);
5774
5775         /*
5776          * If the guest has used debug registers, at least dr7
5777          * will be disabled while returning to the host.
5778          * If we don't have active breakpoints in the host, we don't
5779          * care about the messed up debug address registers. But if
5780          * we have some of them active, restore the old state.
5781          */
5782         if (hw_breakpoint_active())
5783                 hw_breakpoint_restore();
5784
5785         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5786
5787         vcpu->mode = OUTSIDE_GUEST_MODE;
5788         smp_wmb();
5789         local_irq_enable();
5790
5791         ++vcpu->stat.exits;
5792
5793         /*
5794          * We must have an instruction between local_irq_enable() and
5795          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5796          * the interrupt shadow.  The stat.exits increment will do nicely.
5797          * But we need to prevent reordering, hence this barrier():
5798          */
5799         barrier();
5800
5801         kvm_guest_exit();
5802
5803         preempt_enable();
5804
5805         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5806
5807         /*
5808          * Profile KVM exit RIPs:
5809          */
5810         if (unlikely(prof_on == KVM_PROFILING)) {
5811                 unsigned long rip = kvm_rip_read(vcpu);
5812                 profile_hit(KVM_PROFILING, (void *)rip);
5813         }
5814
5815
5816         kvm_lapic_sync_from_vapic(vcpu);
5817
5818         r = kvm_x86_ops->handle_exit(vcpu);
5819 out:
5820         return r;
5821 }
5822
5823
5824 static int __vcpu_run(struct kvm_vcpu *vcpu)
5825 {
5826         int r;
5827         struct kvm *kvm = vcpu->kvm;
5828
5829         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5830                 pr_debug("vcpu %d received sipi with vector # %x\n",
5831                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5832                 kvm_lapic_reset(vcpu);
5833                 r = kvm_arch_vcpu_reset(vcpu);
5834                 if (r)
5835                         return r;
5836                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5837         }
5838
5839         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5840         vapic_enter(vcpu);
5841
5842         r = 1;
5843         while (r > 0) {
5844                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5845                     !vcpu->arch.apf.halted)
5846                         r = vcpu_enter_guest(vcpu);
5847                 else {
5848                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5849                         kvm_vcpu_block(vcpu);
5850                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5851                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5852                         {
5853                                 switch(vcpu->arch.mp_state) {
5854                                 case KVM_MP_STATE_HALTED:
5855                                         vcpu->arch.mp_state =
5856                                                 KVM_MP_STATE_RUNNABLE;
5857                                 case KVM_MP_STATE_RUNNABLE:
5858                                         vcpu->arch.apf.halted = false;
5859                                         break;
5860                                 case KVM_MP_STATE_SIPI_RECEIVED:
5861                                 default:
5862                                         r = -EINTR;
5863                                         break;
5864                                 }
5865                         }
5866                 }
5867
5868                 if (r <= 0)
5869                         break;
5870
5871                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5872                 if (kvm_cpu_has_pending_timer(vcpu))
5873                         kvm_inject_pending_timer_irqs(vcpu);
5874
5875                 if (dm_request_for_irq_injection(vcpu)) {
5876                         r = -EINTR;
5877                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5878                         ++vcpu->stat.request_irq_exits;
5879                 }
5880
5881                 kvm_check_async_pf_completion(vcpu);
5882
5883                 if (signal_pending(current)) {
5884                         r = -EINTR;
5885                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5886                         ++vcpu->stat.signal_exits;
5887                 }
5888                 if (need_resched()) {
5889                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5890                         kvm_resched(vcpu);
5891                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5892                 }
5893         }
5894
5895         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5896
5897         vapic_exit(vcpu);
5898
5899         return r;
5900 }
5901
5902 static int complete_mmio(struct kvm_vcpu *vcpu)
5903 {
5904         struct kvm_run *run = vcpu->run;
5905         int r;
5906
5907         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5908                 return 1;
5909
5910         if (vcpu->mmio_needed) {
5911                 vcpu->mmio_needed = 0;
5912                 if (!vcpu->mmio_is_write)
5913                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5914                                run->mmio.data, 8);
5915                 vcpu->mmio_index += 8;
5916                 if (vcpu->mmio_index < vcpu->mmio_size) {
5917                         run->exit_reason = KVM_EXIT_MMIO;
5918                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5919                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5920                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5921                         run->mmio.is_write = vcpu->mmio_is_write;
5922                         vcpu->mmio_needed = 1;
5923                         return 0;
5924                 }
5925                 if (vcpu->mmio_is_write)
5926                         return 1;
5927                 vcpu->mmio_read_completed = 1;
5928         }
5929         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5930         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5931         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5932         if (r != EMULATE_DONE)
5933                 return 0;
5934         return 1;
5935 }
5936
5937 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5938 {
5939         int r;
5940         sigset_t sigsaved;
5941
5942         if (!tsk_used_math(current) && init_fpu(current))
5943                 return -ENOMEM;
5944
5945         if (vcpu->sigset_active)
5946                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5947
5948         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5949                 kvm_vcpu_block(vcpu);
5950                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5951                 r = -EAGAIN;
5952                 goto out;
5953         }
5954
5955         /* re-sync apic's tpr */
5956         if (!irqchip_in_kernel(vcpu->kvm)) {
5957                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5958                         r = -EINVAL;
5959                         goto out;
5960                 }
5961         }
5962
5963         r = complete_mmio(vcpu);
5964         if (r <= 0)
5965                 goto out;
5966
5967         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5968                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5969                                      kvm_run->hypercall.ret);
5970
5971         r = __vcpu_run(vcpu);
5972
5973 out:
5974         post_kvm_run_save(vcpu);
5975         if (vcpu->sigset_active)
5976                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5977
5978         return r;
5979 }
5980
5981 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5982 {
5983         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5984                 /*
5985                  * We are here if userspace calls get_regs() in the middle of
5986                  * instruction emulation. Registers state needs to be copied
5987                  * back from emulation context to vcpu. Usrapace shouldn't do
5988                  * that usually, but some bad designed PV devices (vmware
5989                  * backdoor interface) need this to work
5990                  */
5991                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5992                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5993                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5994         }
5995         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5996         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5997         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5998         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5999         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6000         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6001         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6002         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6003 #ifdef CONFIG_X86_64
6004         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6005         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6006         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6007         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6008         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6009         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6010         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6011         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6012 #endif
6013
6014         regs->rip = kvm_rip_read(vcpu);
6015         regs->rflags = kvm_get_rflags(vcpu);
6016
6017         return 0;
6018 }
6019
6020 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6021 {
6022         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6023         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6024
6025         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6026         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6027         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6028         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6029         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6030         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6031         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6032         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6033 #ifdef CONFIG_X86_64
6034         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6035         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6036         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6037         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6038         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6039         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6040         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6041         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6042 #endif
6043
6044         kvm_rip_write(vcpu, regs->rip);
6045         kvm_set_rflags(vcpu, regs->rflags);
6046
6047         vcpu->arch.exception.pending = false;
6048
6049         kvm_make_request(KVM_REQ_EVENT, vcpu);
6050
6051         return 0;
6052 }
6053
6054 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6055 {
6056         struct kvm_segment cs;
6057
6058         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6059         *db = cs.db;
6060         *l = cs.l;
6061 }
6062 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6063
6064 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6065                                   struct kvm_sregs *sregs)
6066 {
6067         struct desc_ptr dt;
6068
6069         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6070         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6071         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6072         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6073         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6074         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6075
6076         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6077         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6078
6079         kvm_x86_ops->get_idt(vcpu, &dt);
6080         sregs->idt.limit = dt.size;
6081         sregs->idt.base = dt.address;
6082         kvm_x86_ops->get_gdt(vcpu, &dt);
6083         sregs->gdt.limit = dt.size;
6084         sregs->gdt.base = dt.address;
6085
6086         sregs->cr0 = kvm_read_cr0(vcpu);
6087         sregs->cr2 = vcpu->arch.cr2;
6088         sregs->cr3 = kvm_read_cr3(vcpu);
6089         sregs->cr4 = kvm_read_cr4(vcpu);
6090         sregs->cr8 = kvm_get_cr8(vcpu);
6091         sregs->efer = vcpu->arch.efer;
6092         sregs->apic_base = kvm_get_apic_base(vcpu);
6093
6094         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6095
6096         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6097                 set_bit(vcpu->arch.interrupt.nr,
6098                         (unsigned long *)sregs->interrupt_bitmap);
6099
6100         return 0;
6101 }
6102
6103 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6104                                     struct kvm_mp_state *mp_state)
6105 {
6106         mp_state->mp_state = vcpu->arch.mp_state;
6107         return 0;
6108 }
6109
6110 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6111                                     struct kvm_mp_state *mp_state)
6112 {
6113         vcpu->arch.mp_state = mp_state->mp_state;
6114         kvm_make_request(KVM_REQ_EVENT, vcpu);
6115         return 0;
6116 }
6117
6118 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6119                     bool has_error_code, u32 error_code)
6120 {
6121         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6122         int ret;
6123
6124         init_emulate_ctxt(vcpu);
6125
6126         ret = emulator_task_switch(ctxt, tss_selector, reason,
6127                                    has_error_code, error_code);
6128
6129         if (ret)
6130                 return EMULATE_FAIL;
6131
6132         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6133         kvm_rip_write(vcpu, ctxt->eip);
6134         kvm_set_rflags(vcpu, ctxt->eflags);
6135         kvm_make_request(KVM_REQ_EVENT, vcpu);
6136         return EMULATE_DONE;
6137 }
6138 EXPORT_SYMBOL_GPL(kvm_task_switch);
6139
6140 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6141                                   struct kvm_sregs *sregs)
6142 {
6143         int mmu_reset_needed = 0;
6144         int pending_vec, max_bits, idx;
6145         struct desc_ptr dt;
6146
6147         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6148                 return -EINVAL;
6149
6150         dt.size = sregs->idt.limit;
6151         dt.address = sregs->idt.base;
6152         kvm_x86_ops->set_idt(vcpu, &dt);
6153         dt.size = sregs->gdt.limit;
6154         dt.address = sregs->gdt.base;
6155         kvm_x86_ops->set_gdt(vcpu, &dt);
6156
6157         vcpu->arch.cr2 = sregs->cr2;
6158         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6159         vcpu->arch.cr3 = sregs->cr3;
6160         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6161
6162         kvm_set_cr8(vcpu, sregs->cr8);
6163
6164         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6165         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6166         kvm_set_apic_base(vcpu, sregs->apic_base);
6167
6168         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6169         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6170         vcpu->arch.cr0 = sregs->cr0;
6171
6172         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6173         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6174         if (sregs->cr4 & X86_CR4_OSXSAVE)
6175                 update_cpuid(vcpu);
6176
6177         idx = srcu_read_lock(&vcpu->kvm->srcu);
6178         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6179                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6180                 mmu_reset_needed = 1;
6181         }
6182         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6183
6184         if (mmu_reset_needed)
6185                 kvm_mmu_reset_context(vcpu);
6186
6187         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6188         pending_vec = find_first_bit(
6189                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6190         if (pending_vec < max_bits) {
6191                 kvm_queue_interrupt(vcpu, pending_vec, false);
6192                 pr_debug("Set back pending irq %d\n", pending_vec);
6193         }
6194
6195         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6196         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6197         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6198         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6199         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6200         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6201
6202         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6203         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6204
6205         update_cr8_intercept(vcpu);
6206
6207         /* Older userspace won't unhalt the vcpu on reset. */
6208         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6209             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6210             !is_protmode(vcpu))
6211                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6212
6213         kvm_make_request(KVM_REQ_EVENT, vcpu);
6214
6215         return 0;
6216 }
6217
6218 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6219                                         struct kvm_guest_debug *dbg)
6220 {
6221         unsigned long rflags;
6222         int i, r;
6223
6224         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6225                 r = -EBUSY;
6226                 if (vcpu->arch.exception.pending)
6227                         goto out;
6228                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6229                         kvm_queue_exception(vcpu, DB_VECTOR);
6230                 else
6231                         kvm_queue_exception(vcpu, BP_VECTOR);
6232         }
6233
6234         /*
6235          * Read rflags as long as potentially injected trace flags are still
6236          * filtered out.
6237          */
6238         rflags = kvm_get_rflags(vcpu);
6239
6240         vcpu->guest_debug = dbg->control;
6241         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6242                 vcpu->guest_debug = 0;
6243
6244         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6245                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6246                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6247                 vcpu->arch.switch_db_regs =
6248                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6249         } else {
6250                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6251                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6252                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6253         }
6254
6255         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6256                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6257                         get_segment_base(vcpu, VCPU_SREG_CS);
6258
6259         /*
6260          * Trigger an rflags update that will inject or remove the trace
6261          * flags.
6262          */
6263         kvm_set_rflags(vcpu, rflags);
6264
6265         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6266
6267         r = 0;
6268
6269 out:
6270
6271         return r;
6272 }
6273
6274 /*
6275  * Translate a guest virtual address to a guest physical address.
6276  */
6277 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6278                                     struct kvm_translation *tr)
6279 {
6280         unsigned long vaddr = tr->linear_address;
6281         gpa_t gpa;
6282         int idx;
6283
6284         idx = srcu_read_lock(&vcpu->kvm->srcu);
6285         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6286         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6287         tr->physical_address = gpa;
6288         tr->valid = gpa != UNMAPPED_GVA;
6289         tr->writeable = 1;
6290         tr->usermode = 0;
6291
6292         return 0;
6293 }
6294
6295 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6296 {
6297         struct i387_fxsave_struct *fxsave =
6298                         &vcpu->arch.guest_fpu.state->fxsave;
6299
6300         memcpy(fpu->fpr, fxsave->st_space, 128);
6301         fpu->fcw = fxsave->cwd;
6302         fpu->fsw = fxsave->swd;
6303         fpu->ftwx = fxsave->twd;
6304         fpu->last_opcode = fxsave->fop;
6305         fpu->last_ip = fxsave->rip;
6306         fpu->last_dp = fxsave->rdp;
6307         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6308
6309         return 0;
6310 }
6311
6312 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6313 {
6314         struct i387_fxsave_struct *fxsave =
6315                         &vcpu->arch.guest_fpu.state->fxsave;
6316
6317         memcpy(fxsave->st_space, fpu->fpr, 128);
6318         fxsave->cwd = fpu->fcw;
6319         fxsave->swd = fpu->fsw;
6320         fxsave->twd = fpu->ftwx;
6321         fxsave->fop = fpu->last_opcode;
6322         fxsave->rip = fpu->last_ip;
6323         fxsave->rdp = fpu->last_dp;
6324         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6325
6326         return 0;
6327 }
6328
6329 int fx_init(struct kvm_vcpu *vcpu)
6330 {
6331         int err;
6332
6333         err = fpu_alloc(&vcpu->arch.guest_fpu);
6334         if (err)
6335                 return err;
6336
6337         fpu_finit(&vcpu->arch.guest_fpu);
6338
6339         /*
6340          * Ensure guest xcr0 is valid for loading
6341          */
6342         vcpu->arch.xcr0 = XSTATE_FP;
6343
6344         vcpu->arch.cr0 |= X86_CR0_ET;
6345
6346         return 0;
6347 }
6348 EXPORT_SYMBOL_GPL(fx_init);
6349
6350 static void fx_free(struct kvm_vcpu *vcpu)
6351 {
6352         fpu_free(&vcpu->arch.guest_fpu);
6353 }
6354
6355 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6356 {
6357         if (vcpu->guest_fpu_loaded)
6358                 return;
6359
6360         /*
6361          * Restore all possible states in the guest,
6362          * and assume host would use all available bits.
6363          * Guest xcr0 would be loaded later.
6364          */
6365         kvm_put_guest_xcr0(vcpu);
6366         vcpu->guest_fpu_loaded = 1;
6367         unlazy_fpu(current);
6368         fpu_restore_checking(&vcpu->arch.guest_fpu);
6369         trace_kvm_fpu(1);
6370 }
6371
6372 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6373 {
6374         kvm_put_guest_xcr0(vcpu);
6375
6376         if (!vcpu->guest_fpu_loaded)
6377                 return;
6378
6379         vcpu->guest_fpu_loaded = 0;
6380         fpu_save_init(&vcpu->arch.guest_fpu);
6381         ++vcpu->stat.fpu_reload;
6382         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6383         trace_kvm_fpu(0);
6384 }
6385
6386 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6387 {
6388         kvmclock_reset(vcpu);
6389
6390         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6391         fx_free(vcpu);
6392         kvm_x86_ops->vcpu_free(vcpu);
6393 }
6394
6395 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6396                                                 unsigned int id)
6397 {
6398         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6399                 printk_once(KERN_WARNING
6400                 "kvm: SMP vm created on host with unstable TSC; "
6401                 "guest TSC will not be reliable\n");
6402         return kvm_x86_ops->vcpu_create(kvm, id);
6403 }
6404
6405 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6406 {
6407         int r;
6408
6409         vcpu->arch.mtrr_state.have_fixed = 1;
6410         vcpu_load(vcpu);
6411         r = kvm_arch_vcpu_reset(vcpu);
6412         if (r == 0)
6413                 r = kvm_mmu_setup(vcpu);
6414         vcpu_put(vcpu);
6415
6416         return r;
6417 }
6418
6419 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6420 {
6421         vcpu->arch.apf.msr_val = 0;
6422
6423         vcpu_load(vcpu);
6424         kvm_mmu_unload(vcpu);
6425         vcpu_put(vcpu);
6426
6427         fx_free(vcpu);
6428         kvm_x86_ops->vcpu_free(vcpu);
6429 }
6430
6431 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6432 {
6433         atomic_set(&vcpu->arch.nmi_queued, 0);
6434         vcpu->arch.nmi_pending = 0;
6435         vcpu->arch.nmi_injected = false;
6436
6437         vcpu->arch.switch_db_regs = 0;
6438         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6439         vcpu->arch.dr6 = DR6_FIXED_1;
6440         vcpu->arch.dr7 = DR7_FIXED_1;
6441
6442         kvm_make_request(KVM_REQ_EVENT, vcpu);
6443         vcpu->arch.apf.msr_val = 0;
6444         vcpu->arch.st.msr_val = 0;
6445
6446         kvmclock_reset(vcpu);
6447
6448         kvm_clear_async_pf_completion_queue(vcpu);
6449         kvm_async_pf_hash_reset(vcpu);
6450         vcpu->arch.apf.halted = false;
6451
6452         return kvm_x86_ops->vcpu_reset(vcpu);
6453 }
6454
6455 int kvm_arch_hardware_enable(void *garbage)
6456 {
6457         struct kvm *kvm;
6458         struct kvm_vcpu *vcpu;
6459         int i;
6460
6461         kvm_shared_msr_cpu_online();
6462         list_for_each_entry(kvm, &vm_list, vm_list)
6463                 kvm_for_each_vcpu(i, vcpu, kvm)
6464                         if (vcpu->cpu == smp_processor_id())
6465                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6466         return kvm_x86_ops->hardware_enable(garbage);
6467 }
6468
6469 void kvm_arch_hardware_disable(void *garbage)
6470 {
6471         kvm_x86_ops->hardware_disable(garbage);
6472         drop_user_return_notifiers(garbage);
6473 }
6474
6475 int kvm_arch_hardware_setup(void)
6476 {
6477         return kvm_x86_ops->hardware_setup();
6478 }
6479
6480 void kvm_arch_hardware_unsetup(void)
6481 {
6482         kvm_x86_ops->hardware_unsetup();
6483 }
6484
6485 void kvm_arch_check_processor_compat(void *rtn)
6486 {
6487         kvm_x86_ops->check_processor_compatibility(rtn);
6488 }
6489
6490 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6491 {
6492         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6493 }
6494
6495 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6496 {
6497         struct page *page;
6498         struct kvm *kvm;
6499         int r;
6500
6501         BUG_ON(vcpu->kvm == NULL);
6502         kvm = vcpu->kvm;
6503
6504         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6505         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6506         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6507         vcpu->arch.mmu.translate_gpa = translate_gpa;
6508         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6509         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6510                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6511         else
6512                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6513
6514         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6515         if (!page) {
6516                 r = -ENOMEM;
6517                 goto fail;
6518         }
6519         vcpu->arch.pio_data = page_address(page);
6520
6521         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6522
6523         r = kvm_mmu_create(vcpu);
6524         if (r < 0)
6525                 goto fail_free_pio_data;
6526
6527         if (irqchip_in_kernel(kvm)) {
6528                 r = kvm_create_lapic(vcpu);
6529                 if (r < 0)
6530                         goto fail_mmu_destroy;
6531         }
6532
6533         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6534                                        GFP_KERNEL);
6535         if (!vcpu->arch.mce_banks) {
6536                 r = -ENOMEM;
6537                 goto fail_free_lapic;
6538         }
6539         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6540
6541         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6542                 goto fail_free_mce_banks;
6543
6544         vcpu->arch.pv_time_enabled = false;
6545         kvm_async_pf_hash_reset(vcpu);
6546
6547         return 0;
6548 fail_free_mce_banks:
6549         kfree(vcpu->arch.mce_banks);
6550 fail_free_lapic:
6551         kvm_free_lapic(vcpu);
6552 fail_mmu_destroy:
6553         kvm_mmu_destroy(vcpu);
6554 fail_free_pio_data:
6555         free_page((unsigned long)vcpu->arch.pio_data);
6556 fail:
6557         return r;
6558 }
6559
6560 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6561 {
6562         int idx;
6563
6564         kfree(vcpu->arch.mce_banks);
6565         kvm_free_lapic(vcpu);
6566         idx = srcu_read_lock(&vcpu->kvm->srcu);
6567         kvm_mmu_destroy(vcpu);
6568         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6569         free_page((unsigned long)vcpu->arch.pio_data);
6570 }
6571
6572 int kvm_arch_init_vm(struct kvm *kvm)
6573 {
6574         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6575         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6576
6577         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6578         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6579
6580         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6581
6582         return 0;
6583 }
6584
6585 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6586 {
6587         vcpu_load(vcpu);
6588         kvm_mmu_unload(vcpu);
6589         vcpu_put(vcpu);
6590 }
6591
6592 static void kvm_free_vcpus(struct kvm *kvm)
6593 {
6594         unsigned int i;
6595         struct kvm_vcpu *vcpu;
6596
6597         /*
6598          * Unpin any mmu pages first.
6599          */
6600         kvm_for_each_vcpu(i, vcpu, kvm) {
6601                 kvm_clear_async_pf_completion_queue(vcpu);
6602                 kvm_unload_vcpu_mmu(vcpu);
6603         }
6604         kvm_for_each_vcpu(i, vcpu, kvm)
6605                 kvm_arch_vcpu_free(vcpu);
6606
6607         mutex_lock(&kvm->lock);
6608         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6609                 kvm->vcpus[i] = NULL;
6610
6611         atomic_set(&kvm->online_vcpus, 0);
6612         mutex_unlock(&kvm->lock);
6613 }
6614
6615 void kvm_arch_sync_events(struct kvm *kvm)
6616 {
6617         kvm_free_all_assigned_devices(kvm);
6618         kvm_free_pit(kvm);
6619 }
6620
6621 void kvm_arch_destroy_vm(struct kvm *kvm)
6622 {
6623         kvm_iommu_unmap_guest(kvm);
6624         kfree(kvm->arch.vpic);
6625         kfree(kvm->arch.vioapic);
6626         kvm_free_vcpus(kvm);
6627         if (kvm->arch.apic_access_page)
6628                 put_page(kvm->arch.apic_access_page);
6629         if (kvm->arch.ept_identity_pagetable)
6630                 put_page(kvm->arch.ept_identity_pagetable);
6631 }
6632
6633 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6634                                 struct kvm_memory_slot *memslot,
6635                                 struct kvm_memory_slot old,
6636                                 struct kvm_userspace_memory_region *mem,
6637                                 int user_alloc)
6638 {
6639         int npages = memslot->npages;
6640         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6641
6642         /* Prevent internal slot pages from being moved by fork()/COW. */
6643         if (memslot->id >= KVM_MEMORY_SLOTS)
6644                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6645
6646         /*To keep backward compatibility with older userspace,
6647          *x86 needs to hanlde !user_alloc case.
6648          */
6649         if (!user_alloc) {
6650                 if (npages && !old.rmap) {
6651                         unsigned long userspace_addr;
6652
6653                         down_write(&current->mm->mmap_sem);
6654                         userspace_addr = do_mmap(NULL, 0,
6655                                                  npages * PAGE_SIZE,
6656                                                  PROT_READ | PROT_WRITE,
6657                                                  map_flags,
6658                                                  0);
6659                         up_write(&current->mm->mmap_sem);
6660
6661                         if (IS_ERR((void *)userspace_addr))
6662                                 return PTR_ERR((void *)userspace_addr);
6663
6664                         memslot->userspace_addr = userspace_addr;
6665                 }
6666         }
6667
6668
6669         return 0;
6670 }
6671
6672 void kvm_arch_commit_memory_region(struct kvm *kvm,
6673                                 struct kvm_userspace_memory_region *mem,
6674                                 struct kvm_memory_slot old,
6675                                 int user_alloc)
6676 {
6677
6678         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6679
6680         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6681                 int ret;
6682
6683                 down_write(&current->mm->mmap_sem);
6684                 ret = do_munmap(current->mm, old.userspace_addr,
6685                                 old.npages * PAGE_SIZE);
6686                 up_write(&current->mm->mmap_sem);
6687                 if (ret < 0)
6688                         printk(KERN_WARNING
6689                                "kvm_vm_ioctl_set_memory_region: "
6690                                "failed to munmap memory\n");
6691         }
6692
6693         if (!kvm->arch.n_requested_mmu_pages)
6694                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6695
6696         spin_lock(&kvm->mmu_lock);
6697         if (nr_mmu_pages)
6698                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6699         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6700         spin_unlock(&kvm->mmu_lock);
6701 }
6702
6703 void kvm_arch_flush_shadow(struct kvm *kvm)
6704 {
6705         kvm_mmu_zap_all(kvm);
6706         kvm_reload_remote_mmus(kvm);
6707 }
6708
6709 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6710 {
6711         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6712                 !vcpu->arch.apf.halted)
6713                 || !list_empty_careful(&vcpu->async_pf.done)
6714                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6715                 || atomic_read(&vcpu->arch.nmi_queued) ||
6716                 (kvm_arch_interrupt_allowed(vcpu) &&
6717                  kvm_cpu_has_interrupt(vcpu));
6718 }
6719
6720 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6721 {
6722         int me;
6723         int cpu = vcpu->cpu;
6724
6725         if (waitqueue_active(&vcpu->wq)) {
6726                 wake_up_interruptible(&vcpu->wq);
6727                 ++vcpu->stat.halt_wakeup;
6728         }
6729
6730         me = get_cpu();
6731         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6732                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6733                         smp_send_reschedule(cpu);
6734         put_cpu();
6735 }
6736
6737 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6738 {
6739         return kvm_x86_ops->interrupt_allowed(vcpu);
6740 }
6741
6742 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6743 {
6744         unsigned long current_rip = kvm_rip_read(vcpu) +
6745                 get_segment_base(vcpu, VCPU_SREG_CS);
6746
6747         return current_rip == linear_rip;
6748 }
6749 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6750
6751 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6752 {
6753         unsigned long rflags;
6754
6755         rflags = kvm_x86_ops->get_rflags(vcpu);
6756         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6757                 rflags &= ~X86_EFLAGS_TF;
6758         return rflags;
6759 }
6760 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6761
6762 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6763 {
6764         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6765             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6766                 rflags |= X86_EFLAGS_TF;
6767         kvm_x86_ops->set_rflags(vcpu, rflags);
6768         kvm_make_request(KVM_REQ_EVENT, vcpu);
6769 }
6770 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6771
6772 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6773 {
6774         int r;
6775
6776         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6777               is_error_page(work->page))
6778                 return;
6779
6780         r = kvm_mmu_reload(vcpu);
6781         if (unlikely(r))
6782                 return;
6783
6784         if (!vcpu->arch.mmu.direct_map &&
6785               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6786                 return;
6787
6788         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6789 }
6790
6791 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6792 {
6793         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6794 }
6795
6796 static inline u32 kvm_async_pf_next_probe(u32 key)
6797 {
6798         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6799 }
6800
6801 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6802 {
6803         u32 key = kvm_async_pf_hash_fn(gfn);
6804
6805         while (vcpu->arch.apf.gfns[key] != ~0)
6806                 key = kvm_async_pf_next_probe(key);
6807
6808         vcpu->arch.apf.gfns[key] = gfn;
6809 }
6810
6811 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6812 {
6813         int i;
6814         u32 key = kvm_async_pf_hash_fn(gfn);
6815
6816         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6817                      (vcpu->arch.apf.gfns[key] != gfn &&
6818                       vcpu->arch.apf.gfns[key] != ~0); i++)
6819                 key = kvm_async_pf_next_probe(key);
6820
6821         return key;
6822 }
6823
6824 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6825 {
6826         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6827 }
6828
6829 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6830 {
6831         u32 i, j, k;
6832
6833         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6834         while (true) {
6835                 vcpu->arch.apf.gfns[i] = ~0;
6836                 do {
6837                         j = kvm_async_pf_next_probe(j);
6838                         if (vcpu->arch.apf.gfns[j] == ~0)
6839                                 return;
6840                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6841                         /*
6842                          * k lies cyclically in ]i,j]
6843                          * |    i.k.j |
6844                          * |....j i.k.| or  |.k..j i...|
6845                          */
6846                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6847                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6848                 i = j;
6849         }
6850 }
6851
6852 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6853 {
6854
6855         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6856                                       sizeof(val));
6857 }
6858
6859 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6860                                      struct kvm_async_pf *work)
6861 {
6862         struct x86_exception fault;
6863
6864         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6865         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6866
6867         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6868             (vcpu->arch.apf.send_user_only &&
6869              kvm_x86_ops->get_cpl(vcpu) == 0))
6870                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6871         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6872                 fault.vector = PF_VECTOR;
6873                 fault.error_code_valid = true;
6874                 fault.error_code = 0;
6875                 fault.nested_page_fault = false;
6876                 fault.address = work->arch.token;
6877                 kvm_inject_page_fault(vcpu, &fault);
6878         }
6879 }
6880
6881 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6882                                  struct kvm_async_pf *work)
6883 {
6884         struct x86_exception fault;
6885
6886         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6887         if (is_error_page(work->page))
6888                 work->arch.token = ~0; /* broadcast wakeup */
6889         else
6890                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6891
6892         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6893             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6894                 fault.vector = PF_VECTOR;
6895                 fault.error_code_valid = true;
6896                 fault.error_code = 0;
6897                 fault.nested_page_fault = false;
6898                 fault.address = work->arch.token;
6899                 kvm_inject_page_fault(vcpu, &fault);
6900         }
6901         vcpu->arch.apf.halted = false;
6902 }
6903
6904 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6905 {
6906         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6907                 return true;
6908         else
6909                 return !kvm_event_needs_reinjection(vcpu) &&
6910                         kvm_x86_ops->interrupt_allowed(vcpu);
6911 }
6912
6913 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6914 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6915 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6916 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6917 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6918 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6919 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6920 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6921 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6922 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6923 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6924 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);