2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
48 #define CREATE_TRACE_POINTS
51 #include <asm/debugreg.h>
59 #define MAX_IO_MSRS 256
60 #define CR0_RESERVED_BITS \
61 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
62 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
63 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
64 #define CR4_RESERVED_BITS \
65 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
66 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
67 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
69 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
71 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
73 #define KVM_MAX_MCE_BANKS 32
74 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
77 * - enable syscall per default because its emulated by KVM
78 * - enable LME and LMA per default on 64 bit KVM
81 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
90 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
91 struct kvm_cpuid_entry2 __user *entries);
93 struct kvm_x86_ops *kvm_x86_ops;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
97 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
99 #define KVM_NR_SHARED_MSRS 16
101 struct kvm_shared_msrs_global {
103 u32 msrs[KVM_NR_SHARED_MSRS];
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
109 struct kvm_shared_msr_values {
112 } values[KVM_NR_SHARED_MSRS];
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
154 u64 __read_mostly host_xcr0;
156 static inline u32 bit(int bitno)
158 return 1 << (bitno & 31);
161 static void kvm_on_user_return(struct user_return_notifier *urn)
164 struct kvm_shared_msrs *locals
165 = container_of(urn, struct kvm_shared_msrs, urn);
166 struct kvm_shared_msr_values *values;
168 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
169 values = &locals->values[slot];
170 if (values->host != values->curr) {
171 wrmsrl(shared_msrs_global.msrs[slot], values->host);
172 values->curr = values->host;
175 locals->registered = false;
176 user_return_notifier_unregister(urn);
179 static void shared_msr_update(unsigned slot, u32 msr)
181 struct kvm_shared_msrs *smsr;
184 smsr = &__get_cpu_var(shared_msrs);
185 /* only read, and nobody should modify it at this time,
186 * so don't need lock */
187 if (slot >= shared_msrs_global.nr) {
188 printk(KERN_ERR "kvm: invalid MSR slot!");
191 rdmsrl_safe(msr, &value);
192 smsr->values[slot].host = value;
193 smsr->values[slot].curr = value;
196 void kvm_define_shared_msr(unsigned slot, u32 msr)
198 if (slot >= shared_msrs_global.nr)
199 shared_msrs_global.nr = slot + 1;
200 shared_msrs_global.msrs[slot] = msr;
201 /* we need ensured the shared_msr_global have been updated */
204 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
206 static void kvm_shared_msr_cpu_online(void)
210 for (i = 0; i < shared_msrs_global.nr; ++i)
211 shared_msr_update(i, shared_msrs_global.msrs[i]);
214 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
216 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
218 if (((value ^ smsr->values[slot].curr) & mask) == 0)
220 smsr->values[slot].curr = value;
221 wrmsrl(shared_msrs_global.msrs[slot], value);
222 if (!smsr->registered) {
223 smsr->urn.on_user_return = kvm_on_user_return;
224 user_return_notifier_register(&smsr->urn);
225 smsr->registered = true;
228 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
230 static void drop_user_return_notifiers(void *ignore)
232 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
234 if (smsr->registered)
235 kvm_on_user_return(&smsr->urn);
238 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
240 if (irqchip_in_kernel(vcpu->kvm))
241 return vcpu->arch.apic_base;
243 return vcpu->arch.apic_base;
245 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
247 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
249 /* TODO: reserve bits check */
250 if (irqchip_in_kernel(vcpu->kvm))
251 kvm_lapic_set_base(vcpu, data);
253 vcpu->arch.apic_base = data;
255 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
257 #define EXCPT_BENIGN 0
258 #define EXCPT_CONTRIBUTORY 1
261 static int exception_class(int vector)
271 return EXCPT_CONTRIBUTORY;
278 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
279 unsigned nr, bool has_error, u32 error_code,
285 if (!vcpu->arch.exception.pending) {
287 vcpu->arch.exception.pending = true;
288 vcpu->arch.exception.has_error_code = has_error;
289 vcpu->arch.exception.nr = nr;
290 vcpu->arch.exception.error_code = error_code;
291 vcpu->arch.exception.reinject = reinject;
295 /* to check exception */
296 prev_nr = vcpu->arch.exception.nr;
297 if (prev_nr == DF_VECTOR) {
298 /* triple fault -> shutdown */
299 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
302 class1 = exception_class(prev_nr);
303 class2 = exception_class(nr);
304 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
305 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
306 /* generate double fault per SDM Table 5-5 */
307 vcpu->arch.exception.pending = true;
308 vcpu->arch.exception.has_error_code = true;
309 vcpu->arch.exception.nr = DF_VECTOR;
310 vcpu->arch.exception.error_code = 0;
312 /* replace previous exception with a new one in a hope
313 that instruction re-execution will regenerate lost
318 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
320 kvm_multiple_exception(vcpu, nr, false, 0, false);
322 EXPORT_SYMBOL_GPL(kvm_queue_exception);
324 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
326 kvm_multiple_exception(vcpu, nr, false, 0, true);
328 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
330 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
333 ++vcpu->stat.pf_guest;
334 vcpu->arch.cr2 = addr;
335 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
338 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
340 vcpu->arch.nmi_pending = 1;
342 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
344 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
346 kvm_multiple_exception(vcpu, nr, true, error_code, false);
348 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
350 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
352 kvm_multiple_exception(vcpu, nr, true, error_code, true);
354 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
357 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
358 * a #GP and return false.
360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
362 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
364 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
367 EXPORT_SYMBOL_GPL(kvm_require_cpl);
370 * Load the pae pdptrs. Return true is they are all valid.
372 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
374 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
375 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
378 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
380 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
381 offset * sizeof(u64), sizeof(pdpte));
386 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
387 if (is_present_gpte(pdpte[i]) &&
388 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
395 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
396 __set_bit(VCPU_EXREG_PDPTR,
397 (unsigned long *)&vcpu->arch.regs_avail);
398 __set_bit(VCPU_EXREG_PDPTR,
399 (unsigned long *)&vcpu->arch.regs_dirty);
404 EXPORT_SYMBOL_GPL(load_pdptrs);
406 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
408 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
412 if (is_long_mode(vcpu) || !is_pae(vcpu))
415 if (!test_bit(VCPU_EXREG_PDPTR,
416 (unsigned long *)&vcpu->arch.regs_avail))
419 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
422 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
428 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
430 unsigned long old_cr0 = kvm_read_cr0(vcpu);
431 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
432 X86_CR0_CD | X86_CR0_NW;
437 if (cr0 & 0xffffffff00000000UL)
441 cr0 &= ~CR0_RESERVED_BITS;
443 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
446 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
449 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
451 if ((vcpu->arch.efer & EFER_LME)) {
456 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
461 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
465 kvm_x86_ops->set_cr0(vcpu, cr0);
467 if ((cr0 ^ old_cr0) & update_bits)
468 kvm_mmu_reset_context(vcpu);
471 EXPORT_SYMBOL_GPL(kvm_set_cr0);
473 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
475 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
477 EXPORT_SYMBOL_GPL(kvm_lmsw);
479 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
483 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
484 if (index != XCR_XFEATURE_ENABLED_MASK)
487 if (kvm_x86_ops->get_cpl(vcpu) != 0)
489 if (!(xcr0 & XSTATE_FP))
491 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
493 if (xcr0 & ~host_xcr0)
495 vcpu->arch.xcr0 = xcr0;
496 vcpu->guest_xcr0_loaded = 0;
500 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
502 if (__kvm_set_xcr(vcpu, index, xcr)) {
503 kvm_inject_gp(vcpu, 0);
508 EXPORT_SYMBOL_GPL(kvm_set_xcr);
510 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
512 struct kvm_cpuid_entry2 *best;
514 best = kvm_find_cpuid_entry(vcpu, 1, 0);
515 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
518 static void update_cpuid(struct kvm_vcpu *vcpu)
520 struct kvm_cpuid_entry2 *best;
522 best = kvm_find_cpuid_entry(vcpu, 1, 0);
526 /* Update OSXSAVE bit */
527 if (cpu_has_xsave && best->function == 0x1) {
528 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
529 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
530 best->ecx |= bit(X86_FEATURE_OSXSAVE);
534 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
536 unsigned long old_cr4 = kvm_read_cr4(vcpu);
537 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
539 if (cr4 & CR4_RESERVED_BITS)
542 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
545 if (is_long_mode(vcpu)) {
546 if (!(cr4 & X86_CR4_PAE))
548 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
549 && ((cr4 ^ old_cr4) & pdptr_bits)
550 && !load_pdptrs(vcpu, vcpu->arch.cr3))
553 if (cr4 & X86_CR4_VMXE)
556 kvm_x86_ops->set_cr4(vcpu, cr4);
558 if ((cr4 ^ old_cr4) & pdptr_bits)
559 kvm_mmu_reset_context(vcpu);
561 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
566 EXPORT_SYMBOL_GPL(kvm_set_cr4);
568 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
570 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
571 kvm_mmu_sync_roots(vcpu);
572 kvm_mmu_flush_tlb(vcpu);
576 if (is_long_mode(vcpu)) {
577 if (cr3 & CR3_L_MODE_RESERVED_BITS)
581 if (cr3 & CR3_PAE_RESERVED_BITS)
583 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
587 * We don't check reserved bits in nonpae mode, because
588 * this isn't enforced, and VMware depends on this.
593 * Does the new cr3 value map to physical memory? (Note, we
594 * catch an invalid cr3 even in real-mode, because it would
595 * cause trouble later on when we turn on paging anyway.)
597 * A real CPU would silently accept an invalid cr3 and would
598 * attempt to use it - with largely undefined (and often hard
599 * to debug) behavior on the guest side.
601 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
603 vcpu->arch.cr3 = cr3;
604 vcpu->arch.mmu.new_cr3(vcpu);
607 EXPORT_SYMBOL_GPL(kvm_set_cr3);
609 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
611 if (cr8 & CR8_RESERVED_BITS)
613 if (irqchip_in_kernel(vcpu->kvm))
614 kvm_lapic_set_tpr(vcpu, cr8);
616 vcpu->arch.cr8 = cr8;
620 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
622 if (__kvm_set_cr8(vcpu, cr8))
623 kvm_inject_gp(vcpu, 0);
625 EXPORT_SYMBOL_GPL(kvm_set_cr8);
627 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
629 if (irqchip_in_kernel(vcpu->kvm))
630 return kvm_lapic_get_cr8(vcpu);
632 return vcpu->arch.cr8;
634 EXPORT_SYMBOL_GPL(kvm_get_cr8);
636 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
640 vcpu->arch.db[dr] = val;
641 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
642 vcpu->arch.eff_db[dr] = val;
645 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
649 if (val & 0xffffffff00000000ULL)
651 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
654 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
658 if (val & 0xffffffff00000000ULL)
660 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
661 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
662 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
663 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
671 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
675 res = __kvm_set_dr(vcpu, dr, val);
677 kvm_queue_exception(vcpu, UD_VECTOR);
679 kvm_inject_gp(vcpu, 0);
683 EXPORT_SYMBOL_GPL(kvm_set_dr);
685 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
689 *val = vcpu->arch.db[dr];
692 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
696 *val = vcpu->arch.dr6;
699 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
703 *val = vcpu->arch.dr7;
710 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
712 if (_kvm_get_dr(vcpu, dr, val)) {
713 kvm_queue_exception(vcpu, UD_VECTOR);
718 EXPORT_SYMBOL_GPL(kvm_get_dr);
721 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
722 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
724 * This list is modified at module load time to reflect the
725 * capabilities of the host cpu. This capabilities test skips MSRs that are
726 * kvm-specific. Those are put in the beginning of the list.
729 #define KVM_SAVE_MSRS_BEGIN 7
730 static u32 msrs_to_save[] = {
731 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
732 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
733 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
734 HV_X64_MSR_APIC_ASSIST_PAGE,
735 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
738 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
740 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
743 static unsigned num_msrs_to_save;
745 static u32 emulated_msrs[] = {
746 MSR_IA32_MISC_ENABLE,
749 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
751 u64 old_efer = vcpu->arch.efer;
753 if (efer & efer_reserved_bits)
757 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
760 if (efer & EFER_FFXSR) {
761 struct kvm_cpuid_entry2 *feat;
763 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
764 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
768 if (efer & EFER_SVME) {
769 struct kvm_cpuid_entry2 *feat;
771 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
772 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
777 efer |= vcpu->arch.efer & EFER_LMA;
779 kvm_x86_ops->set_efer(vcpu, efer);
781 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
782 kvm_mmu_reset_context(vcpu);
784 /* Update reserved bits */
785 if ((efer ^ old_efer) & EFER_NX)
786 kvm_mmu_reset_context(vcpu);
791 void kvm_enable_efer_bits(u64 mask)
793 efer_reserved_bits &= ~mask;
795 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
799 * Writes msr value into into the appropriate "register".
800 * Returns 0 on success, non-0 otherwise.
801 * Assumes vcpu_load() was already called.
803 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
805 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
809 * Adapt set_msr() to msr_io()'s calling convention
811 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
813 return kvm_set_msr(vcpu, index, *data);
816 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
820 struct pvclock_wall_clock wc;
821 struct timespec boot;
826 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
831 ++version; /* first time write, random junk */
835 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
838 * The guest calculates current wall clock time by adding
839 * system time (updated by kvm_write_guest_time below) to the
840 * wall clock specified here. guest system time equals host
841 * system time for us, thus we must fill in host boot time here.
845 wc.sec = boot.tv_sec;
846 wc.nsec = boot.tv_nsec;
847 wc.version = version;
849 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
852 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
855 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
857 uint32_t quotient, remainder;
859 /* Don't try to replace with do_div(), this one calculates
860 * "(dividend << 32) / divisor" */
862 : "=a" (quotient), "=d" (remainder)
863 : "0" (0), "1" (dividend), "r" (divisor) );
867 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
869 uint64_t nsecs = 1000000000LL;
874 tps64 = tsc_khz * 1000LL;
875 while (tps64 > nsecs*2) {
880 tps32 = (uint32_t)tps64;
881 while (tps32 <= (uint32_t)nsecs) {
886 hv_clock->tsc_shift = shift;
887 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
889 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
890 __func__, tsc_khz, hv_clock->tsc_shift,
891 hv_clock->tsc_to_system_mul);
894 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
896 static void kvm_write_guest_time(struct kvm_vcpu *v)
900 struct kvm_vcpu_arch *vcpu = &v->arch;
902 unsigned long this_tsc_khz;
904 if ((!vcpu->time_page))
907 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
908 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
909 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
910 vcpu->hv_clock_tsc_khz = this_tsc_khz;
912 put_cpu_var(cpu_tsc_khz);
914 /* Keep irq disabled to prevent changes to the clock */
915 local_irq_save(flags);
916 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
918 monotonic_to_bootbased(&ts);
919 local_irq_restore(flags);
921 /* With all the info we got, fill in the values */
923 vcpu->hv_clock.system_time = ts.tv_nsec +
924 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
926 vcpu->hv_clock.flags = 0;
929 * The interface expects us to write an even number signaling that the
930 * update is finished. Since the guest won't see the intermediate
931 * state, we just increase by 2 at the end.
933 vcpu->hv_clock.version += 2;
935 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
937 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
938 sizeof(vcpu->hv_clock));
940 kunmap_atomic(shared_kaddr, KM_USER0);
942 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
945 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
947 struct kvm_vcpu_arch *vcpu = &v->arch;
949 if (!vcpu->time_page)
951 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
955 static bool msr_mtrr_valid(unsigned msr)
958 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
959 case MSR_MTRRfix64K_00000:
960 case MSR_MTRRfix16K_80000:
961 case MSR_MTRRfix16K_A0000:
962 case MSR_MTRRfix4K_C0000:
963 case MSR_MTRRfix4K_C8000:
964 case MSR_MTRRfix4K_D0000:
965 case MSR_MTRRfix4K_D8000:
966 case MSR_MTRRfix4K_E0000:
967 case MSR_MTRRfix4K_E8000:
968 case MSR_MTRRfix4K_F0000:
969 case MSR_MTRRfix4K_F8000:
970 case MSR_MTRRdefType:
971 case MSR_IA32_CR_PAT:
979 static bool valid_pat_type(unsigned t)
981 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
984 static bool valid_mtrr_type(unsigned t)
986 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
989 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
993 if (!msr_mtrr_valid(msr))
996 if (msr == MSR_IA32_CR_PAT) {
997 for (i = 0; i < 8; i++)
998 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1001 } else if (msr == MSR_MTRRdefType) {
1004 return valid_mtrr_type(data & 0xff);
1005 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1006 for (i = 0; i < 8 ; i++)
1007 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1012 /* variable MTRRs */
1013 return valid_mtrr_type(data & 0xff);
1016 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1018 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1020 if (!mtrr_valid(vcpu, msr, data))
1023 if (msr == MSR_MTRRdefType) {
1024 vcpu->arch.mtrr_state.def_type = data;
1025 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1026 } else if (msr == MSR_MTRRfix64K_00000)
1028 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1029 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1030 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1031 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1032 else if (msr == MSR_IA32_CR_PAT)
1033 vcpu->arch.pat = data;
1034 else { /* Variable MTRRs */
1035 int idx, is_mtrr_mask;
1038 idx = (msr - 0x200) / 2;
1039 is_mtrr_mask = msr - 0x200 - 2 * idx;
1042 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1045 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1049 kvm_mmu_reset_context(vcpu);
1053 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1055 u64 mcg_cap = vcpu->arch.mcg_cap;
1056 unsigned bank_num = mcg_cap & 0xff;
1059 case MSR_IA32_MCG_STATUS:
1060 vcpu->arch.mcg_status = data;
1062 case MSR_IA32_MCG_CTL:
1063 if (!(mcg_cap & MCG_CTL_P))
1065 if (data != 0 && data != ~(u64)0)
1067 vcpu->arch.mcg_ctl = data;
1070 if (msr >= MSR_IA32_MC0_CTL &&
1071 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1072 u32 offset = msr - MSR_IA32_MC0_CTL;
1073 /* only 0 or all 1s can be written to IA32_MCi_CTL
1074 * some Linux kernels though clear bit 10 in bank 4 to
1075 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1076 * this to avoid an uncatched #GP in the guest
1078 if ((offset & 0x3) == 0 &&
1079 data != 0 && (data | (1 << 10)) != ~(u64)0)
1081 vcpu->arch.mce_banks[offset] = data;
1089 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1091 struct kvm *kvm = vcpu->kvm;
1092 int lm = is_long_mode(vcpu);
1093 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1094 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1095 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1096 : kvm->arch.xen_hvm_config.blob_size_32;
1097 u32 page_num = data & ~PAGE_MASK;
1098 u64 page_addr = data & PAGE_MASK;
1103 if (page_num >= blob_size)
1106 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1110 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1112 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1121 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1123 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1126 static bool kvm_hv_msr_partition_wide(u32 msr)
1130 case HV_X64_MSR_GUEST_OS_ID:
1131 case HV_X64_MSR_HYPERCALL:
1139 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1141 struct kvm *kvm = vcpu->kvm;
1144 case HV_X64_MSR_GUEST_OS_ID:
1145 kvm->arch.hv_guest_os_id = data;
1146 /* setting guest os id to zero disables hypercall page */
1147 if (!kvm->arch.hv_guest_os_id)
1148 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1150 case HV_X64_MSR_HYPERCALL: {
1155 /* if guest os id is not set hypercall should remain disabled */
1156 if (!kvm->arch.hv_guest_os_id)
1158 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1159 kvm->arch.hv_hypercall = data;
1162 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1163 addr = gfn_to_hva(kvm, gfn);
1164 if (kvm_is_error_hva(addr))
1166 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1167 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1168 if (copy_to_user((void __user *)addr, instructions, 4))
1170 kvm->arch.hv_hypercall = data;
1174 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1175 "data 0x%llx\n", msr, data);
1181 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1184 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1187 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1188 vcpu->arch.hv_vapic = data;
1191 addr = gfn_to_hva(vcpu->kvm, data >>
1192 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1193 if (kvm_is_error_hva(addr))
1195 if (clear_user((void __user *)addr, PAGE_SIZE))
1197 vcpu->arch.hv_vapic = data;
1200 case HV_X64_MSR_EOI:
1201 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1202 case HV_X64_MSR_ICR:
1203 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1204 case HV_X64_MSR_TPR:
1205 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1207 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1208 "data 0x%llx\n", msr, data);
1215 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1219 return set_efer(vcpu, data);
1221 data &= ~(u64)0x40; /* ignore flush filter disable */
1222 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1224 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1229 case MSR_FAM10H_MMIO_CONF_BASE:
1231 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1236 case MSR_AMD64_NB_CFG:
1238 case MSR_IA32_DEBUGCTLMSR:
1240 /* We support the non-activated case already */
1242 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1243 /* Values other than LBR and BTF are vendor-specific,
1244 thus reserved and should throw a #GP */
1247 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1250 case MSR_IA32_UCODE_REV:
1251 case MSR_IA32_UCODE_WRITE:
1252 case MSR_VM_HSAVE_PA:
1253 case MSR_AMD64_PATCH_LOADER:
1255 case 0x200 ... 0x2ff:
1256 return set_msr_mtrr(vcpu, msr, data);
1257 case MSR_IA32_APICBASE:
1258 kvm_set_apic_base(vcpu, data);
1260 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1261 return kvm_x2apic_msr_write(vcpu, msr, data);
1262 case MSR_IA32_MISC_ENABLE:
1263 vcpu->arch.ia32_misc_enable_msr = data;
1265 case MSR_KVM_WALL_CLOCK_NEW:
1266 case MSR_KVM_WALL_CLOCK:
1267 vcpu->kvm->arch.wall_clock = data;
1268 kvm_write_wall_clock(vcpu->kvm, data);
1270 case MSR_KVM_SYSTEM_TIME_NEW:
1271 case MSR_KVM_SYSTEM_TIME: {
1272 if (vcpu->arch.time_page) {
1273 kvm_release_page_dirty(vcpu->arch.time_page);
1274 vcpu->arch.time_page = NULL;
1277 vcpu->arch.time = data;
1279 /* we verify if the enable bit is set... */
1283 /* ...but clean it before doing the actual write */
1284 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1286 vcpu->arch.time_page =
1287 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1289 if (is_error_page(vcpu->arch.time_page)) {
1290 kvm_release_page_clean(vcpu->arch.time_page);
1291 vcpu->arch.time_page = NULL;
1294 kvm_request_guest_time_update(vcpu);
1297 case MSR_IA32_MCG_CTL:
1298 case MSR_IA32_MCG_STATUS:
1299 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1300 return set_msr_mce(vcpu, msr, data);
1302 /* Performance counters are not protected by a CPUID bit,
1303 * so we should check all of them in the generic path for the sake of
1304 * cross vendor migration.
1305 * Writing a zero into the event select MSRs disables them,
1306 * which we perfectly emulate ;-). Any other value should be at least
1307 * reported, some guests depend on them.
1309 case MSR_P6_EVNTSEL0:
1310 case MSR_P6_EVNTSEL1:
1311 case MSR_K7_EVNTSEL0:
1312 case MSR_K7_EVNTSEL1:
1313 case MSR_K7_EVNTSEL2:
1314 case MSR_K7_EVNTSEL3:
1316 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1317 "0x%x data 0x%llx\n", msr, data);
1319 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1320 * so we ignore writes to make it happy.
1322 case MSR_P6_PERFCTR0:
1323 case MSR_P6_PERFCTR1:
1324 case MSR_K7_PERFCTR0:
1325 case MSR_K7_PERFCTR1:
1326 case MSR_K7_PERFCTR2:
1327 case MSR_K7_PERFCTR3:
1328 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1329 "0x%x data 0x%llx\n", msr, data);
1331 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1332 if (kvm_hv_msr_partition_wide(msr)) {
1334 mutex_lock(&vcpu->kvm->lock);
1335 r = set_msr_hyperv_pw(vcpu, msr, data);
1336 mutex_unlock(&vcpu->kvm->lock);
1339 return set_msr_hyperv(vcpu, msr, data);
1342 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1343 return xen_hvm_config(vcpu, data);
1345 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1349 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1356 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1360 * Reads an msr value (of 'msr_index') into 'pdata'.
1361 * Returns 0 on success, non-0 otherwise.
1362 * Assumes vcpu_load() was already called.
1364 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1366 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1369 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1371 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1373 if (!msr_mtrr_valid(msr))
1376 if (msr == MSR_MTRRdefType)
1377 *pdata = vcpu->arch.mtrr_state.def_type +
1378 (vcpu->arch.mtrr_state.enabled << 10);
1379 else if (msr == MSR_MTRRfix64K_00000)
1381 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1382 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1383 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1384 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1385 else if (msr == MSR_IA32_CR_PAT)
1386 *pdata = vcpu->arch.pat;
1387 else { /* Variable MTRRs */
1388 int idx, is_mtrr_mask;
1391 idx = (msr - 0x200) / 2;
1392 is_mtrr_mask = msr - 0x200 - 2 * idx;
1395 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1398 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1405 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1408 u64 mcg_cap = vcpu->arch.mcg_cap;
1409 unsigned bank_num = mcg_cap & 0xff;
1412 case MSR_IA32_P5_MC_ADDR:
1413 case MSR_IA32_P5_MC_TYPE:
1416 case MSR_IA32_MCG_CAP:
1417 data = vcpu->arch.mcg_cap;
1419 case MSR_IA32_MCG_CTL:
1420 if (!(mcg_cap & MCG_CTL_P))
1422 data = vcpu->arch.mcg_ctl;
1424 case MSR_IA32_MCG_STATUS:
1425 data = vcpu->arch.mcg_status;
1428 if (msr >= MSR_IA32_MC0_CTL &&
1429 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1430 u32 offset = msr - MSR_IA32_MC0_CTL;
1431 data = vcpu->arch.mce_banks[offset];
1440 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1443 struct kvm *kvm = vcpu->kvm;
1446 case HV_X64_MSR_GUEST_OS_ID:
1447 data = kvm->arch.hv_guest_os_id;
1449 case HV_X64_MSR_HYPERCALL:
1450 data = kvm->arch.hv_hypercall;
1453 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1461 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1466 case HV_X64_MSR_VP_INDEX: {
1469 kvm_for_each_vcpu(r, v, vcpu->kvm)
1474 case HV_X64_MSR_EOI:
1475 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1476 case HV_X64_MSR_ICR:
1477 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1478 case HV_X64_MSR_TPR:
1479 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1481 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1488 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1493 case MSR_IA32_PLATFORM_ID:
1494 case MSR_IA32_UCODE_REV:
1495 case MSR_IA32_EBL_CR_POWERON:
1496 case MSR_IA32_DEBUGCTLMSR:
1497 case MSR_IA32_LASTBRANCHFROMIP:
1498 case MSR_IA32_LASTBRANCHTOIP:
1499 case MSR_IA32_LASTINTFROMIP:
1500 case MSR_IA32_LASTINTTOIP:
1503 case MSR_VM_HSAVE_PA:
1504 case MSR_P6_PERFCTR0:
1505 case MSR_P6_PERFCTR1:
1506 case MSR_P6_EVNTSEL0:
1507 case MSR_P6_EVNTSEL1:
1508 case MSR_K7_EVNTSEL0:
1509 case MSR_K7_PERFCTR0:
1510 case MSR_K8_INT_PENDING_MSG:
1511 case MSR_AMD64_NB_CFG:
1512 case MSR_FAM10H_MMIO_CONF_BASE:
1516 data = 0x500 | KVM_NR_VAR_MTRR;
1518 case 0x200 ... 0x2ff:
1519 return get_msr_mtrr(vcpu, msr, pdata);
1520 case 0xcd: /* fsb frequency */
1523 case MSR_IA32_APICBASE:
1524 data = kvm_get_apic_base(vcpu);
1526 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1527 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1529 case MSR_IA32_MISC_ENABLE:
1530 data = vcpu->arch.ia32_misc_enable_msr;
1532 case MSR_IA32_PERF_STATUS:
1533 /* TSC increment by tick */
1535 /* CPU multiplier */
1536 data |= (((uint64_t)4ULL) << 40);
1539 data = vcpu->arch.efer;
1541 case MSR_KVM_WALL_CLOCK:
1542 case MSR_KVM_WALL_CLOCK_NEW:
1543 data = vcpu->kvm->arch.wall_clock;
1545 case MSR_KVM_SYSTEM_TIME:
1546 case MSR_KVM_SYSTEM_TIME_NEW:
1547 data = vcpu->arch.time;
1549 case MSR_IA32_P5_MC_ADDR:
1550 case MSR_IA32_P5_MC_TYPE:
1551 case MSR_IA32_MCG_CAP:
1552 case MSR_IA32_MCG_CTL:
1553 case MSR_IA32_MCG_STATUS:
1554 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1555 return get_msr_mce(vcpu, msr, pdata);
1556 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1557 if (kvm_hv_msr_partition_wide(msr)) {
1559 mutex_lock(&vcpu->kvm->lock);
1560 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1561 mutex_unlock(&vcpu->kvm->lock);
1564 return get_msr_hyperv(vcpu, msr, pdata);
1568 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1571 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1579 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1582 * Read or write a bunch of msrs. All parameters are kernel addresses.
1584 * @return number of msrs set successfully.
1586 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1587 struct kvm_msr_entry *entries,
1588 int (*do_msr)(struct kvm_vcpu *vcpu,
1589 unsigned index, u64 *data))
1593 idx = srcu_read_lock(&vcpu->kvm->srcu);
1594 for (i = 0; i < msrs->nmsrs; ++i)
1595 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1597 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1603 * Read or write a bunch of msrs. Parameters are user addresses.
1605 * @return number of msrs set successfully.
1607 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1608 int (*do_msr)(struct kvm_vcpu *vcpu,
1609 unsigned index, u64 *data),
1612 struct kvm_msrs msrs;
1613 struct kvm_msr_entry *entries;
1618 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1622 if (msrs.nmsrs >= MAX_IO_MSRS)
1626 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1627 entries = kmalloc(size, GFP_KERNEL);
1632 if (copy_from_user(entries, user_msrs->entries, size))
1635 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1640 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1651 int kvm_dev_ioctl_check_extension(long ext)
1656 case KVM_CAP_IRQCHIP:
1658 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1659 case KVM_CAP_SET_TSS_ADDR:
1660 case KVM_CAP_EXT_CPUID:
1661 case KVM_CAP_CLOCKSOURCE:
1663 case KVM_CAP_NOP_IO_DELAY:
1664 case KVM_CAP_MP_STATE:
1665 case KVM_CAP_SYNC_MMU:
1666 case KVM_CAP_REINJECT_CONTROL:
1667 case KVM_CAP_IRQ_INJECT_STATUS:
1668 case KVM_CAP_ASSIGN_DEV_IRQ:
1670 case KVM_CAP_IOEVENTFD:
1672 case KVM_CAP_PIT_STATE2:
1673 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1674 case KVM_CAP_XEN_HVM:
1675 case KVM_CAP_ADJUST_CLOCK:
1676 case KVM_CAP_VCPU_EVENTS:
1677 case KVM_CAP_HYPERV:
1678 case KVM_CAP_HYPERV_VAPIC:
1679 case KVM_CAP_HYPERV_SPIN:
1680 case KVM_CAP_PCI_SEGMENT:
1681 case KVM_CAP_DEBUGREGS:
1682 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1686 case KVM_CAP_COALESCED_MMIO:
1687 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1690 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1692 case KVM_CAP_NR_VCPUS:
1695 case KVM_CAP_NR_MEMSLOTS:
1696 r = KVM_MEMORY_SLOTS;
1698 case KVM_CAP_PV_MMU: /* obsolete */
1705 r = KVM_MAX_MCE_BANKS;
1718 long kvm_arch_dev_ioctl(struct file *filp,
1719 unsigned int ioctl, unsigned long arg)
1721 void __user *argp = (void __user *)arg;
1725 case KVM_GET_MSR_INDEX_LIST: {
1726 struct kvm_msr_list __user *user_msr_list = argp;
1727 struct kvm_msr_list msr_list;
1731 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1734 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1735 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1738 if (n < msr_list.nmsrs)
1741 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1742 num_msrs_to_save * sizeof(u32)))
1744 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1746 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1751 case KVM_GET_SUPPORTED_CPUID: {
1752 struct kvm_cpuid2 __user *cpuid_arg = argp;
1753 struct kvm_cpuid2 cpuid;
1756 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1758 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1759 cpuid_arg->entries);
1764 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1769 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1772 mce_cap = KVM_MCE_CAP_SUPPORTED;
1774 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1786 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1788 kvm_x86_ops->vcpu_load(vcpu, cpu);
1789 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1790 unsigned long khz = cpufreq_quick_get(cpu);
1793 per_cpu(cpu_tsc_khz, cpu) = khz;
1795 kvm_request_guest_time_update(vcpu);
1798 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1800 kvm_x86_ops->vcpu_put(vcpu);
1801 kvm_put_guest_fpu(vcpu);
1804 static int is_efer_nx(void)
1806 unsigned long long efer = 0;
1808 rdmsrl_safe(MSR_EFER, &efer);
1809 return efer & EFER_NX;
1812 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1815 struct kvm_cpuid_entry2 *e, *entry;
1818 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1819 e = &vcpu->arch.cpuid_entries[i];
1820 if (e->function == 0x80000001) {
1825 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1826 entry->edx &= ~(1 << 20);
1827 printk(KERN_INFO "kvm: guest NX capability removed\n");
1831 /* when an old userspace process fills a new kernel module */
1832 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1833 struct kvm_cpuid *cpuid,
1834 struct kvm_cpuid_entry __user *entries)
1837 struct kvm_cpuid_entry *cpuid_entries;
1840 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1843 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1847 if (copy_from_user(cpuid_entries, entries,
1848 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1850 for (i = 0; i < cpuid->nent; i++) {
1851 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1852 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1853 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1854 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1855 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1856 vcpu->arch.cpuid_entries[i].index = 0;
1857 vcpu->arch.cpuid_entries[i].flags = 0;
1858 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1859 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1860 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1862 vcpu->arch.cpuid_nent = cpuid->nent;
1863 cpuid_fix_nx_cap(vcpu);
1865 kvm_apic_set_version(vcpu);
1866 kvm_x86_ops->cpuid_update(vcpu);
1870 vfree(cpuid_entries);
1875 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1876 struct kvm_cpuid2 *cpuid,
1877 struct kvm_cpuid_entry2 __user *entries)
1882 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1885 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1886 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1888 vcpu->arch.cpuid_nent = cpuid->nent;
1889 kvm_apic_set_version(vcpu);
1890 kvm_x86_ops->cpuid_update(vcpu);
1898 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1899 struct kvm_cpuid2 *cpuid,
1900 struct kvm_cpuid_entry2 __user *entries)
1905 if (cpuid->nent < vcpu->arch.cpuid_nent)
1908 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1909 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1914 cpuid->nent = vcpu->arch.cpuid_nent;
1918 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1921 entry->function = function;
1922 entry->index = index;
1923 cpuid_count(entry->function, entry->index,
1924 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1928 #define F(x) bit(X86_FEATURE_##x)
1930 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1931 u32 index, int *nent, int maxnent)
1933 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1934 #ifdef CONFIG_X86_64
1935 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1937 unsigned f_lm = F(LM);
1939 unsigned f_gbpages = 0;
1942 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1945 const u32 kvm_supported_word0_x86_features =
1946 F(FPU) | F(VME) | F(DE) | F(PSE) |
1947 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1948 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1949 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1950 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1951 0 /* Reserved, DS, ACPI */ | F(MMX) |
1952 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1953 0 /* HTT, TM, Reserved, PBE */;
1954 /* cpuid 0x80000001.edx */
1955 const u32 kvm_supported_word1_x86_features =
1956 F(FPU) | F(VME) | F(DE) | F(PSE) |
1957 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1958 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1959 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1960 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1961 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1962 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1963 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1965 const u32 kvm_supported_word4_x86_features =
1966 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1967 0 /* DS-CPL, VMX, SMX, EST */ |
1968 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1969 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1970 0 /* Reserved, DCA */ | F(XMM4_1) |
1971 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1972 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */;
1973 /* cpuid 0x80000001.ecx */
1974 const u32 kvm_supported_word6_x86_features =
1975 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1976 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1977 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1978 0 /* SKINIT */ | 0 /* WDT */;
1980 /* all calls to cpuid_count() should be made on the same cpu */
1982 do_cpuid_1_ent(entry, function, index);
1987 entry->eax = min(entry->eax, (u32)0xd);
1990 entry->edx &= kvm_supported_word0_x86_features;
1991 entry->ecx &= kvm_supported_word4_x86_features;
1992 /* we support x2apic emulation even if host does not support
1993 * it since we emulate x2apic in software */
1994 entry->ecx |= F(X2APIC);
1996 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1997 * may return different values. This forces us to get_cpu() before
1998 * issuing the first command, and also to emulate this annoying behavior
1999 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2001 int t, times = entry->eax & 0xff;
2003 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2004 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2005 for (t = 1; t < times && *nent < maxnent; ++t) {
2006 do_cpuid_1_ent(&entry[t], function, 0);
2007 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2012 /* function 4 and 0xb have additional index. */
2016 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2017 /* read more entries until cache_type is zero */
2018 for (i = 1; *nent < maxnent; ++i) {
2019 cache_type = entry[i - 1].eax & 0x1f;
2022 do_cpuid_1_ent(&entry[i], function, i);
2024 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2032 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2033 /* read more entries until level_type is zero */
2034 for (i = 1; *nent < maxnent; ++i) {
2035 level_type = entry[i - 1].ecx & 0xff00;
2038 do_cpuid_1_ent(&entry[i], function, i);
2040 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2048 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2049 for (i = 1; *nent < maxnent; ++i) {
2050 if (entry[i - 1].eax == 0 && i != 2)
2052 do_cpuid_1_ent(&entry[i], function, i);
2054 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2059 case KVM_CPUID_SIGNATURE: {
2060 char signature[12] = "KVMKVMKVM\0\0";
2061 u32 *sigptr = (u32 *)signature;
2063 entry->ebx = sigptr[0];
2064 entry->ecx = sigptr[1];
2065 entry->edx = sigptr[2];
2068 case KVM_CPUID_FEATURES:
2069 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2070 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2071 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2072 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2078 entry->eax = min(entry->eax, 0x8000001a);
2081 entry->edx &= kvm_supported_word1_x86_features;
2082 entry->ecx &= kvm_supported_word6_x86_features;
2086 kvm_x86_ops->set_supported_cpuid(function, entry);
2093 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2094 struct kvm_cpuid_entry2 __user *entries)
2096 struct kvm_cpuid_entry2 *cpuid_entries;
2097 int limit, nent = 0, r = -E2BIG;
2100 if (cpuid->nent < 1)
2102 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2103 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2105 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2109 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2110 limit = cpuid_entries[0].eax;
2111 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2112 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2113 &nent, cpuid->nent);
2115 if (nent >= cpuid->nent)
2118 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2119 limit = cpuid_entries[nent - 1].eax;
2120 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2121 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2122 &nent, cpuid->nent);
2127 if (nent >= cpuid->nent)
2130 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2134 if (nent >= cpuid->nent)
2137 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2141 if (nent >= cpuid->nent)
2145 if (copy_to_user(entries, cpuid_entries,
2146 nent * sizeof(struct kvm_cpuid_entry2)))
2152 vfree(cpuid_entries);
2157 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2158 struct kvm_lapic_state *s)
2160 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2165 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2166 struct kvm_lapic_state *s)
2168 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2169 kvm_apic_post_state_restore(vcpu);
2170 update_cr8_intercept(vcpu);
2175 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2176 struct kvm_interrupt *irq)
2178 if (irq->irq < 0 || irq->irq >= 256)
2180 if (irqchip_in_kernel(vcpu->kvm))
2183 kvm_queue_interrupt(vcpu, irq->irq, false);
2188 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2190 kvm_inject_nmi(vcpu);
2195 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2196 struct kvm_tpr_access_ctl *tac)
2200 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2204 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2208 unsigned bank_num = mcg_cap & 0xff, bank;
2211 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2213 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2216 vcpu->arch.mcg_cap = mcg_cap;
2217 /* Init IA32_MCG_CTL to all 1s */
2218 if (mcg_cap & MCG_CTL_P)
2219 vcpu->arch.mcg_ctl = ~(u64)0;
2220 /* Init IA32_MCi_CTL to all 1s */
2221 for (bank = 0; bank < bank_num; bank++)
2222 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2227 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2228 struct kvm_x86_mce *mce)
2230 u64 mcg_cap = vcpu->arch.mcg_cap;
2231 unsigned bank_num = mcg_cap & 0xff;
2232 u64 *banks = vcpu->arch.mce_banks;
2234 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2237 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2238 * reporting is disabled
2240 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2241 vcpu->arch.mcg_ctl != ~(u64)0)
2243 banks += 4 * mce->bank;
2245 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2246 * reporting is disabled for the bank
2248 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2250 if (mce->status & MCI_STATUS_UC) {
2251 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2252 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2253 printk(KERN_DEBUG "kvm: set_mce: "
2254 "injects mce exception while "
2255 "previous one is in progress!\n");
2256 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2259 if (banks[1] & MCI_STATUS_VAL)
2260 mce->status |= MCI_STATUS_OVER;
2261 banks[2] = mce->addr;
2262 banks[3] = mce->misc;
2263 vcpu->arch.mcg_status = mce->mcg_status;
2264 banks[1] = mce->status;
2265 kvm_queue_exception(vcpu, MC_VECTOR);
2266 } else if (!(banks[1] & MCI_STATUS_VAL)
2267 || !(banks[1] & MCI_STATUS_UC)) {
2268 if (banks[1] & MCI_STATUS_VAL)
2269 mce->status |= MCI_STATUS_OVER;
2270 banks[2] = mce->addr;
2271 banks[3] = mce->misc;
2272 banks[1] = mce->status;
2274 banks[1] |= MCI_STATUS_OVER;
2278 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2279 struct kvm_vcpu_events *events)
2281 events->exception.injected =
2282 vcpu->arch.exception.pending &&
2283 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2284 events->exception.nr = vcpu->arch.exception.nr;
2285 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2286 events->exception.error_code = vcpu->arch.exception.error_code;
2288 events->interrupt.injected =
2289 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2290 events->interrupt.nr = vcpu->arch.interrupt.nr;
2291 events->interrupt.soft = 0;
2292 events->interrupt.shadow =
2293 kvm_x86_ops->get_interrupt_shadow(vcpu,
2294 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2296 events->nmi.injected = vcpu->arch.nmi_injected;
2297 events->nmi.pending = vcpu->arch.nmi_pending;
2298 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2300 events->sipi_vector = vcpu->arch.sipi_vector;
2302 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2303 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2304 | KVM_VCPUEVENT_VALID_SHADOW);
2307 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2308 struct kvm_vcpu_events *events)
2310 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2311 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2312 | KVM_VCPUEVENT_VALID_SHADOW))
2315 vcpu->arch.exception.pending = events->exception.injected;
2316 vcpu->arch.exception.nr = events->exception.nr;
2317 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2318 vcpu->arch.exception.error_code = events->exception.error_code;
2320 vcpu->arch.interrupt.pending = events->interrupt.injected;
2321 vcpu->arch.interrupt.nr = events->interrupt.nr;
2322 vcpu->arch.interrupt.soft = events->interrupt.soft;
2323 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2324 kvm_pic_clear_isr_ack(vcpu->kvm);
2325 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2326 kvm_x86_ops->set_interrupt_shadow(vcpu,
2327 events->interrupt.shadow);
2329 vcpu->arch.nmi_injected = events->nmi.injected;
2330 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2331 vcpu->arch.nmi_pending = events->nmi.pending;
2332 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2334 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2335 vcpu->arch.sipi_vector = events->sipi_vector;
2340 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2341 struct kvm_debugregs *dbgregs)
2343 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2344 dbgregs->dr6 = vcpu->arch.dr6;
2345 dbgregs->dr7 = vcpu->arch.dr7;
2349 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2350 struct kvm_debugregs *dbgregs)
2355 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2356 vcpu->arch.dr6 = dbgregs->dr6;
2357 vcpu->arch.dr7 = dbgregs->dr7;
2362 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2363 struct kvm_xsave *guest_xsave)
2366 memcpy(guest_xsave->region,
2367 &vcpu->arch.guest_fpu.state->xsave,
2368 sizeof(struct xsave_struct));
2370 memcpy(guest_xsave->region,
2371 &vcpu->arch.guest_fpu.state->fxsave,
2372 sizeof(struct i387_fxsave_struct));
2373 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2378 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2379 struct kvm_xsave *guest_xsave)
2382 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2385 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2386 guest_xsave->region, sizeof(struct xsave_struct));
2388 if (xstate_bv & ~XSTATE_FPSSE)
2390 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2391 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2396 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2397 struct kvm_xcrs *guest_xcrs)
2399 if (!cpu_has_xsave) {
2400 guest_xcrs->nr_xcrs = 0;
2404 guest_xcrs->nr_xcrs = 1;
2405 guest_xcrs->flags = 0;
2406 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2407 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2410 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2411 struct kvm_xcrs *guest_xcrs)
2418 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2421 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2422 /* Only support XCR0 currently */
2423 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2424 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2425 guest_xcrs->xcrs[0].value);
2433 long kvm_arch_vcpu_ioctl(struct file *filp,
2434 unsigned int ioctl, unsigned long arg)
2436 struct kvm_vcpu *vcpu = filp->private_data;
2437 void __user *argp = (void __user *)arg;
2440 struct kvm_lapic_state *lapic;
2441 struct kvm_xsave *xsave;
2442 struct kvm_xcrs *xcrs;
2448 case KVM_GET_LAPIC: {
2450 if (!vcpu->arch.apic)
2452 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2457 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2461 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2466 case KVM_SET_LAPIC: {
2468 if (!vcpu->arch.apic)
2470 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2475 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2477 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2483 case KVM_INTERRUPT: {
2484 struct kvm_interrupt irq;
2487 if (copy_from_user(&irq, argp, sizeof irq))
2489 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2496 r = kvm_vcpu_ioctl_nmi(vcpu);
2502 case KVM_SET_CPUID: {
2503 struct kvm_cpuid __user *cpuid_arg = argp;
2504 struct kvm_cpuid cpuid;
2507 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2509 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2514 case KVM_SET_CPUID2: {
2515 struct kvm_cpuid2 __user *cpuid_arg = argp;
2516 struct kvm_cpuid2 cpuid;
2519 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2521 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2522 cpuid_arg->entries);
2527 case KVM_GET_CPUID2: {
2528 struct kvm_cpuid2 __user *cpuid_arg = argp;
2529 struct kvm_cpuid2 cpuid;
2532 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2534 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2535 cpuid_arg->entries);
2539 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2545 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2548 r = msr_io(vcpu, argp, do_set_msr, 0);
2550 case KVM_TPR_ACCESS_REPORTING: {
2551 struct kvm_tpr_access_ctl tac;
2554 if (copy_from_user(&tac, argp, sizeof tac))
2556 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2560 if (copy_to_user(argp, &tac, sizeof tac))
2565 case KVM_SET_VAPIC_ADDR: {
2566 struct kvm_vapic_addr va;
2569 if (!irqchip_in_kernel(vcpu->kvm))
2572 if (copy_from_user(&va, argp, sizeof va))
2575 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2578 case KVM_X86_SETUP_MCE: {
2582 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2584 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2587 case KVM_X86_SET_MCE: {
2588 struct kvm_x86_mce mce;
2591 if (copy_from_user(&mce, argp, sizeof mce))
2593 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2596 case KVM_GET_VCPU_EVENTS: {
2597 struct kvm_vcpu_events events;
2599 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2602 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2607 case KVM_SET_VCPU_EVENTS: {
2608 struct kvm_vcpu_events events;
2611 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2614 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2617 case KVM_GET_DEBUGREGS: {
2618 struct kvm_debugregs dbgregs;
2620 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2623 if (copy_to_user(argp, &dbgregs,
2624 sizeof(struct kvm_debugregs)))
2629 case KVM_SET_DEBUGREGS: {
2630 struct kvm_debugregs dbgregs;
2633 if (copy_from_user(&dbgregs, argp,
2634 sizeof(struct kvm_debugregs)))
2637 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2640 case KVM_GET_XSAVE: {
2641 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2646 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2649 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2654 case KVM_SET_XSAVE: {
2655 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2661 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2664 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2667 case KVM_GET_XCRS: {
2668 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2673 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2676 if (copy_to_user(argp, u.xcrs,
2677 sizeof(struct kvm_xcrs)))
2682 case KVM_SET_XCRS: {
2683 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2689 if (copy_from_user(u.xcrs, argp,
2690 sizeof(struct kvm_xcrs)))
2693 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2704 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2708 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2710 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2714 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2717 kvm->arch.ept_identity_map_addr = ident_addr;
2721 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2722 u32 kvm_nr_mmu_pages)
2724 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2727 mutex_lock(&kvm->slots_lock);
2728 spin_lock(&kvm->mmu_lock);
2730 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2731 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2733 spin_unlock(&kvm->mmu_lock);
2734 mutex_unlock(&kvm->slots_lock);
2738 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2740 return kvm->arch.n_alloc_mmu_pages;
2743 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2746 struct kvm_mem_alias *alias;
2747 struct kvm_mem_aliases *aliases;
2749 aliases = kvm_aliases(kvm);
2751 for (i = 0; i < aliases->naliases; ++i) {
2752 alias = &aliases->aliases[i];
2753 if (alias->flags & KVM_ALIAS_INVALID)
2755 if (gfn >= alias->base_gfn
2756 && gfn < alias->base_gfn + alias->npages)
2757 return alias->target_gfn + gfn - alias->base_gfn;
2762 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2765 struct kvm_mem_alias *alias;
2766 struct kvm_mem_aliases *aliases;
2768 aliases = kvm_aliases(kvm);
2770 for (i = 0; i < aliases->naliases; ++i) {
2771 alias = &aliases->aliases[i];
2772 if (gfn >= alias->base_gfn
2773 && gfn < alias->base_gfn + alias->npages)
2774 return alias->target_gfn + gfn - alias->base_gfn;
2780 * Set a new alias region. Aliases map a portion of physical memory into
2781 * another portion. This is useful for memory windows, for example the PC
2784 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2785 struct kvm_memory_alias *alias)
2788 struct kvm_mem_alias *p;
2789 struct kvm_mem_aliases *aliases, *old_aliases;
2792 /* General sanity checks */
2793 if (alias->memory_size & (PAGE_SIZE - 1))
2795 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2797 if (alias->slot >= KVM_ALIAS_SLOTS)
2799 if (alias->guest_phys_addr + alias->memory_size
2800 < alias->guest_phys_addr)
2802 if (alias->target_phys_addr + alias->memory_size
2803 < alias->target_phys_addr)
2807 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2811 mutex_lock(&kvm->slots_lock);
2813 /* invalidate any gfn reference in case of deletion/shrinking */
2814 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2815 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2816 old_aliases = kvm->arch.aliases;
2817 rcu_assign_pointer(kvm->arch.aliases, aliases);
2818 synchronize_srcu_expedited(&kvm->srcu);
2819 kvm_mmu_zap_all(kvm);
2823 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2827 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2829 p = &aliases->aliases[alias->slot];
2830 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2831 p->npages = alias->memory_size >> PAGE_SHIFT;
2832 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2833 p->flags &= ~(KVM_ALIAS_INVALID);
2835 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2836 if (aliases->aliases[n - 1].npages)
2838 aliases->naliases = n;
2840 old_aliases = kvm->arch.aliases;
2841 rcu_assign_pointer(kvm->arch.aliases, aliases);
2842 synchronize_srcu_expedited(&kvm->srcu);
2847 mutex_unlock(&kvm->slots_lock);
2852 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2857 switch (chip->chip_id) {
2858 case KVM_IRQCHIP_PIC_MASTER:
2859 memcpy(&chip->chip.pic,
2860 &pic_irqchip(kvm)->pics[0],
2861 sizeof(struct kvm_pic_state));
2863 case KVM_IRQCHIP_PIC_SLAVE:
2864 memcpy(&chip->chip.pic,
2865 &pic_irqchip(kvm)->pics[1],
2866 sizeof(struct kvm_pic_state));
2868 case KVM_IRQCHIP_IOAPIC:
2869 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2878 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2883 switch (chip->chip_id) {
2884 case KVM_IRQCHIP_PIC_MASTER:
2885 raw_spin_lock(&pic_irqchip(kvm)->lock);
2886 memcpy(&pic_irqchip(kvm)->pics[0],
2888 sizeof(struct kvm_pic_state));
2889 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2891 case KVM_IRQCHIP_PIC_SLAVE:
2892 raw_spin_lock(&pic_irqchip(kvm)->lock);
2893 memcpy(&pic_irqchip(kvm)->pics[1],
2895 sizeof(struct kvm_pic_state));
2896 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2898 case KVM_IRQCHIP_IOAPIC:
2899 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2905 kvm_pic_update_irq(pic_irqchip(kvm));
2909 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2913 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2914 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2915 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2919 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2923 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2924 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2925 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2926 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2930 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2934 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2935 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2936 sizeof(ps->channels));
2937 ps->flags = kvm->arch.vpit->pit_state.flags;
2938 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2942 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2944 int r = 0, start = 0;
2945 u32 prev_legacy, cur_legacy;
2946 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2947 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2948 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2949 if (!prev_legacy && cur_legacy)
2951 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2952 sizeof(kvm->arch.vpit->pit_state.channels));
2953 kvm->arch.vpit->pit_state.flags = ps->flags;
2954 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2955 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2959 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2960 struct kvm_reinject_control *control)
2962 if (!kvm->arch.vpit)
2964 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2965 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2966 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2971 * Get (and clear) the dirty memory log for a memory slot.
2973 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2974 struct kvm_dirty_log *log)
2977 struct kvm_memory_slot *memslot;
2979 unsigned long is_dirty = 0;
2981 mutex_lock(&kvm->slots_lock);
2984 if (log->slot >= KVM_MEMORY_SLOTS)
2987 memslot = &kvm->memslots->memslots[log->slot];
2989 if (!memslot->dirty_bitmap)
2992 n = kvm_dirty_bitmap_bytes(memslot);
2994 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2995 is_dirty = memslot->dirty_bitmap[i];
2997 /* If nothing is dirty, don't bother messing with page tables. */
2999 struct kvm_memslots *slots, *old_slots;
3000 unsigned long *dirty_bitmap;
3002 spin_lock(&kvm->mmu_lock);
3003 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3004 spin_unlock(&kvm->mmu_lock);
3007 dirty_bitmap = vmalloc(n);
3010 memset(dirty_bitmap, 0, n);
3013 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3015 vfree(dirty_bitmap);
3018 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3019 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3021 old_slots = kvm->memslots;
3022 rcu_assign_pointer(kvm->memslots, slots);
3023 synchronize_srcu_expedited(&kvm->srcu);
3024 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3028 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3029 vfree(dirty_bitmap);
3032 vfree(dirty_bitmap);
3035 if (clear_user(log->dirty_bitmap, n))
3041 mutex_unlock(&kvm->slots_lock);
3045 long kvm_arch_vm_ioctl(struct file *filp,
3046 unsigned int ioctl, unsigned long arg)
3048 struct kvm *kvm = filp->private_data;
3049 void __user *argp = (void __user *)arg;
3052 * This union makes it completely explicit to gcc-3.x
3053 * that these two variables' stack usage should be
3054 * combined, not added together.
3057 struct kvm_pit_state ps;
3058 struct kvm_pit_state2 ps2;
3059 struct kvm_memory_alias alias;
3060 struct kvm_pit_config pit_config;
3064 case KVM_SET_TSS_ADDR:
3065 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3069 case KVM_SET_IDENTITY_MAP_ADDR: {
3073 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3075 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3080 case KVM_SET_MEMORY_REGION: {
3081 struct kvm_memory_region kvm_mem;
3082 struct kvm_userspace_memory_region kvm_userspace_mem;
3085 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
3087 kvm_userspace_mem.slot = kvm_mem.slot;
3088 kvm_userspace_mem.flags = kvm_mem.flags;
3089 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
3090 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
3091 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
3096 case KVM_SET_NR_MMU_PAGES:
3097 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3101 case KVM_GET_NR_MMU_PAGES:
3102 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3104 case KVM_SET_MEMORY_ALIAS:
3106 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
3108 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
3112 case KVM_CREATE_IRQCHIP: {
3113 struct kvm_pic *vpic;
3115 mutex_lock(&kvm->lock);
3118 goto create_irqchip_unlock;
3120 vpic = kvm_create_pic(kvm);
3122 r = kvm_ioapic_init(kvm);
3124 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3127 goto create_irqchip_unlock;
3130 goto create_irqchip_unlock;
3132 kvm->arch.vpic = vpic;
3134 r = kvm_setup_default_irq_routing(kvm);
3136 mutex_lock(&kvm->irq_lock);
3137 kvm_ioapic_destroy(kvm);
3138 kvm_destroy_pic(kvm);
3139 mutex_unlock(&kvm->irq_lock);
3141 create_irqchip_unlock:
3142 mutex_unlock(&kvm->lock);
3145 case KVM_CREATE_PIT:
3146 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3148 case KVM_CREATE_PIT2:
3150 if (copy_from_user(&u.pit_config, argp,
3151 sizeof(struct kvm_pit_config)))
3154 mutex_lock(&kvm->slots_lock);
3157 goto create_pit_unlock;
3159 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3163 mutex_unlock(&kvm->slots_lock);
3165 case KVM_IRQ_LINE_STATUS:
3166 case KVM_IRQ_LINE: {
3167 struct kvm_irq_level irq_event;
3170 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3173 if (irqchip_in_kernel(kvm)) {
3175 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3176 irq_event.irq, irq_event.level);
3177 if (ioctl == KVM_IRQ_LINE_STATUS) {
3179 irq_event.status = status;
3180 if (copy_to_user(argp, &irq_event,
3188 case KVM_GET_IRQCHIP: {
3189 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3190 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3196 if (copy_from_user(chip, argp, sizeof *chip))
3197 goto get_irqchip_out;
3199 if (!irqchip_in_kernel(kvm))
3200 goto get_irqchip_out;
3201 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3203 goto get_irqchip_out;
3205 if (copy_to_user(argp, chip, sizeof *chip))
3206 goto get_irqchip_out;
3214 case KVM_SET_IRQCHIP: {
3215 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3216 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3222 if (copy_from_user(chip, argp, sizeof *chip))
3223 goto set_irqchip_out;
3225 if (!irqchip_in_kernel(kvm))
3226 goto set_irqchip_out;
3227 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3229 goto set_irqchip_out;
3239 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3242 if (!kvm->arch.vpit)
3244 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3248 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3255 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3258 if (!kvm->arch.vpit)
3260 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3266 case KVM_GET_PIT2: {
3268 if (!kvm->arch.vpit)
3270 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3274 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3279 case KVM_SET_PIT2: {
3281 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3284 if (!kvm->arch.vpit)
3286 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3292 case KVM_REINJECT_CONTROL: {
3293 struct kvm_reinject_control control;
3295 if (copy_from_user(&control, argp, sizeof(control)))
3297 r = kvm_vm_ioctl_reinject(kvm, &control);
3303 case KVM_XEN_HVM_CONFIG: {
3305 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3306 sizeof(struct kvm_xen_hvm_config)))
3309 if (kvm->arch.xen_hvm_config.flags)
3314 case KVM_SET_CLOCK: {
3315 struct timespec now;
3316 struct kvm_clock_data user_ns;
3321 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3330 now_ns = timespec_to_ns(&now);
3331 delta = user_ns.clock - now_ns;
3332 kvm->arch.kvmclock_offset = delta;
3335 case KVM_GET_CLOCK: {
3336 struct timespec now;
3337 struct kvm_clock_data user_ns;
3341 now_ns = timespec_to_ns(&now);
3342 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3346 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3359 static void kvm_init_msr_list(void)
3364 /* skip the first msrs in the list. KVM-specific */
3365 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3366 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3369 msrs_to_save[j] = msrs_to_save[i];
3372 num_msrs_to_save = j;
3375 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3378 if (vcpu->arch.apic &&
3379 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3382 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3385 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3387 if (vcpu->arch.apic &&
3388 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3391 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3394 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3395 struct kvm_segment *var, int seg)
3397 kvm_x86_ops->set_segment(vcpu, var, seg);
3400 void kvm_get_segment(struct kvm_vcpu *vcpu,
3401 struct kvm_segment *var, int seg)
3403 kvm_x86_ops->get_segment(vcpu, var, seg);
3406 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3408 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3409 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3412 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3414 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3415 access |= PFERR_FETCH_MASK;
3416 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3419 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3421 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3422 access |= PFERR_WRITE_MASK;
3423 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3426 /* uses this to access any guest's mapped memory without checking CPL */
3427 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3429 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3432 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3433 struct kvm_vcpu *vcpu, u32 access,
3437 int r = X86EMUL_CONTINUE;
3440 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3441 unsigned offset = addr & (PAGE_SIZE-1);
3442 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3445 if (gpa == UNMAPPED_GVA) {
3446 r = X86EMUL_PROPAGATE_FAULT;
3449 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3451 r = X86EMUL_IO_NEEDED;
3463 /* used for instruction fetching */
3464 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3465 struct kvm_vcpu *vcpu, u32 *error)
3467 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3468 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3469 access | PFERR_FETCH_MASK, error);
3472 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3473 struct kvm_vcpu *vcpu, u32 *error)
3475 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3476 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3480 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3481 struct kvm_vcpu *vcpu, u32 *error)
3483 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3486 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3488 struct kvm_vcpu *vcpu,
3492 int r = X86EMUL_CONTINUE;
3495 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3496 PFERR_WRITE_MASK, error);
3497 unsigned offset = addr & (PAGE_SIZE-1);
3498 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3501 if (gpa == UNMAPPED_GVA) {
3502 r = X86EMUL_PROPAGATE_FAULT;
3505 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3507 r = X86EMUL_IO_NEEDED;
3519 static int emulator_read_emulated(unsigned long addr,
3522 unsigned int *error_code,
3523 struct kvm_vcpu *vcpu)
3527 if (vcpu->mmio_read_completed) {
3528 memcpy(val, vcpu->mmio_data, bytes);
3529 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3530 vcpu->mmio_phys_addr, *(u64 *)val);
3531 vcpu->mmio_read_completed = 0;
3532 return X86EMUL_CONTINUE;
3535 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3537 if (gpa == UNMAPPED_GVA)
3538 return X86EMUL_PROPAGATE_FAULT;
3540 /* For APIC access vmexit */
3541 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3544 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3545 == X86EMUL_CONTINUE)
3546 return X86EMUL_CONTINUE;
3550 * Is this MMIO handled locally?
3552 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3553 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3554 return X86EMUL_CONTINUE;
3557 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3559 vcpu->mmio_needed = 1;
3560 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3561 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3562 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3563 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3565 return X86EMUL_IO_NEEDED;
3568 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3569 const void *val, int bytes)
3573 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3576 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3580 static int emulator_write_emulated_onepage(unsigned long addr,
3583 unsigned int *error_code,
3584 struct kvm_vcpu *vcpu)
3588 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3590 if (gpa == UNMAPPED_GVA)
3591 return X86EMUL_PROPAGATE_FAULT;
3593 /* For APIC access vmexit */
3594 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3597 if (emulator_write_phys(vcpu, gpa, val, bytes))
3598 return X86EMUL_CONTINUE;
3601 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3603 * Is this MMIO handled locally?
3605 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3606 return X86EMUL_CONTINUE;
3608 vcpu->mmio_needed = 1;
3609 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3610 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3611 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3612 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3613 memcpy(vcpu->run->mmio.data, val, bytes);
3615 return X86EMUL_CONTINUE;
3618 int emulator_write_emulated(unsigned long addr,
3621 unsigned int *error_code,
3622 struct kvm_vcpu *vcpu)
3624 /* Crossing a page boundary? */
3625 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3628 now = -addr & ~PAGE_MASK;
3629 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3631 if (rc != X86EMUL_CONTINUE)
3637 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3641 #define CMPXCHG_TYPE(t, ptr, old, new) \
3642 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3644 #ifdef CONFIG_X86_64
3645 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3647 # define CMPXCHG64(ptr, old, new) \
3648 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3651 static int emulator_cmpxchg_emulated(unsigned long addr,
3655 unsigned int *error_code,
3656 struct kvm_vcpu *vcpu)
3663 /* guests cmpxchg8b have to be emulated atomically */
3664 if (bytes > 8 || (bytes & (bytes - 1)))
3667 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3669 if (gpa == UNMAPPED_GVA ||
3670 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3673 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3676 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3678 kaddr = kmap_atomic(page, KM_USER0);
3679 kaddr += offset_in_page(gpa);
3682 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3685 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3688 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3691 exchanged = CMPXCHG64(kaddr, old, new);
3696 kunmap_atomic(kaddr, KM_USER0);
3697 kvm_release_page_dirty(page);
3700 return X86EMUL_CMPXCHG_FAILED;
3702 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3704 return X86EMUL_CONTINUE;
3707 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3709 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3712 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3714 /* TODO: String I/O for in kernel device */
3717 if (vcpu->arch.pio.in)
3718 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3719 vcpu->arch.pio.size, pd);
3721 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3722 vcpu->arch.pio.port, vcpu->arch.pio.size,
3728 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3729 unsigned int count, struct kvm_vcpu *vcpu)
3731 if (vcpu->arch.pio.count)
3734 trace_kvm_pio(1, port, size, 1);
3736 vcpu->arch.pio.port = port;
3737 vcpu->arch.pio.in = 1;
3738 vcpu->arch.pio.count = count;
3739 vcpu->arch.pio.size = size;
3741 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3743 memcpy(val, vcpu->arch.pio_data, size * count);
3744 vcpu->arch.pio.count = 0;
3748 vcpu->run->exit_reason = KVM_EXIT_IO;
3749 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3750 vcpu->run->io.size = size;
3751 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3752 vcpu->run->io.count = count;
3753 vcpu->run->io.port = port;
3758 static int emulator_pio_out_emulated(int size, unsigned short port,
3759 const void *val, unsigned int count,
3760 struct kvm_vcpu *vcpu)
3762 trace_kvm_pio(0, port, size, 1);
3764 vcpu->arch.pio.port = port;
3765 vcpu->arch.pio.in = 0;
3766 vcpu->arch.pio.count = count;
3767 vcpu->arch.pio.size = size;
3769 memcpy(vcpu->arch.pio_data, val, size * count);
3771 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3772 vcpu->arch.pio.count = 0;
3776 vcpu->run->exit_reason = KVM_EXIT_IO;
3777 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3778 vcpu->run->io.size = size;
3779 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3780 vcpu->run->io.count = count;
3781 vcpu->run->io.port = port;
3786 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3788 return kvm_x86_ops->get_segment_base(vcpu, seg);
3791 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3793 kvm_mmu_invlpg(vcpu, address);
3794 return X86EMUL_CONTINUE;
3797 int emulate_clts(struct kvm_vcpu *vcpu)
3799 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3800 kvm_x86_ops->fpu_activate(vcpu);
3801 return X86EMUL_CONTINUE;
3804 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3806 return _kvm_get_dr(vcpu, dr, dest);
3809 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3812 return __kvm_set_dr(vcpu, dr, value);
3815 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3817 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3820 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3822 unsigned long value;
3826 value = kvm_read_cr0(vcpu);
3829 value = vcpu->arch.cr2;
3832 value = vcpu->arch.cr3;
3835 value = kvm_read_cr4(vcpu);
3838 value = kvm_get_cr8(vcpu);
3841 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3848 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3854 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3857 vcpu->arch.cr2 = val;
3860 res = kvm_set_cr3(vcpu, val);
3863 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3866 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3869 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3876 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3878 return kvm_x86_ops->get_cpl(vcpu);
3881 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3883 kvm_x86_ops->get_gdt(vcpu, dt);
3886 static unsigned long emulator_get_cached_segment_base(int seg,
3887 struct kvm_vcpu *vcpu)
3889 return get_segment_base(vcpu, seg);
3892 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3893 struct kvm_vcpu *vcpu)
3895 struct kvm_segment var;
3897 kvm_get_segment(vcpu, &var, seg);
3904 set_desc_limit(desc, var.limit);
3905 set_desc_base(desc, (unsigned long)var.base);
3906 desc->type = var.type;
3908 desc->dpl = var.dpl;
3909 desc->p = var.present;
3910 desc->avl = var.avl;
3918 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3919 struct kvm_vcpu *vcpu)
3921 struct kvm_segment var;
3923 /* needed to preserve selector */
3924 kvm_get_segment(vcpu, &var, seg);
3926 var.base = get_desc_base(desc);
3927 var.limit = get_desc_limit(desc);
3929 var.limit = (var.limit << 12) | 0xfff;
3930 var.type = desc->type;
3931 var.present = desc->p;
3932 var.dpl = desc->dpl;
3937 var.avl = desc->avl;
3938 var.present = desc->p;
3939 var.unusable = !var.present;
3942 kvm_set_segment(vcpu, &var, seg);
3946 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3948 struct kvm_segment kvm_seg;
3950 kvm_get_segment(vcpu, &kvm_seg, seg);
3951 return kvm_seg.selector;
3954 static void emulator_set_segment_selector(u16 sel, int seg,
3955 struct kvm_vcpu *vcpu)
3957 struct kvm_segment kvm_seg;
3959 kvm_get_segment(vcpu, &kvm_seg, seg);
3960 kvm_seg.selector = sel;
3961 kvm_set_segment(vcpu, &kvm_seg, seg);
3964 static struct x86_emulate_ops emulate_ops = {
3965 .read_std = kvm_read_guest_virt_system,
3966 .write_std = kvm_write_guest_virt_system,
3967 .fetch = kvm_fetch_guest_virt,
3968 .read_emulated = emulator_read_emulated,
3969 .write_emulated = emulator_write_emulated,
3970 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3971 .pio_in_emulated = emulator_pio_in_emulated,
3972 .pio_out_emulated = emulator_pio_out_emulated,
3973 .get_cached_descriptor = emulator_get_cached_descriptor,
3974 .set_cached_descriptor = emulator_set_cached_descriptor,
3975 .get_segment_selector = emulator_get_segment_selector,
3976 .set_segment_selector = emulator_set_segment_selector,
3977 .get_cached_segment_base = emulator_get_cached_segment_base,
3978 .get_gdt = emulator_get_gdt,
3979 .get_cr = emulator_get_cr,
3980 .set_cr = emulator_set_cr,
3981 .cpl = emulator_get_cpl,
3982 .get_dr = emulator_get_dr,
3983 .set_dr = emulator_set_dr,
3984 .set_msr = kvm_set_msr,
3985 .get_msr = kvm_get_msr,
3988 static void cache_all_regs(struct kvm_vcpu *vcpu)
3990 kvm_register_read(vcpu, VCPU_REGS_RAX);
3991 kvm_register_read(vcpu, VCPU_REGS_RSP);
3992 kvm_register_read(vcpu, VCPU_REGS_RIP);
3993 vcpu->arch.regs_dirty = ~0;
3996 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3998 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4000 * an sti; sti; sequence only disable interrupts for the first
4001 * instruction. So, if the last instruction, be it emulated or
4002 * not, left the system with the INT_STI flag enabled, it
4003 * means that the last instruction is an sti. We should not
4004 * leave the flag on in this case. The same goes for mov ss
4006 if (!(int_shadow & mask))
4007 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4010 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4012 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4013 if (ctxt->exception == PF_VECTOR)
4014 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
4015 else if (ctxt->error_code_valid)
4016 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4018 kvm_queue_exception(vcpu, ctxt->exception);
4021 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4023 ++vcpu->stat.insn_emulation_fail;
4024 trace_kvm_emulate_insn_failed(vcpu);
4025 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4026 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4027 vcpu->run->internal.ndata = 0;
4028 kvm_queue_exception(vcpu, UD_VECTOR);
4029 return EMULATE_FAIL;
4032 int emulate_instruction(struct kvm_vcpu *vcpu,
4038 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4040 kvm_clear_exception_queue(vcpu);
4041 vcpu->arch.mmio_fault_cr2 = cr2;
4043 * TODO: fix emulate.c to use guest_read/write_register
4044 * instead of direct ->regs accesses, can save hundred cycles
4045 * on Intel for instructions that don't read/change RSP, for
4048 cache_all_regs(vcpu);
4050 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4052 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4054 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4055 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4056 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4057 vcpu->arch.emulate_ctxt.mode =
4058 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4059 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4060 ? X86EMUL_MODE_VM86 : cs_l
4061 ? X86EMUL_MODE_PROT64 : cs_db
4062 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4063 memset(c, 0, sizeof(struct decode_cache));
4064 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4065 vcpu->arch.emulate_ctxt.interruptibility = 0;
4066 vcpu->arch.emulate_ctxt.exception = -1;
4068 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
4069 trace_kvm_emulate_insn_start(vcpu);
4071 /* Only allow emulation of specific instructions on #UD
4072 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4073 if (emulation_type & EMULTYPE_TRAP_UD) {
4075 return EMULATE_FAIL;
4077 case 0x01: /* VMMCALL */
4078 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4079 return EMULATE_FAIL;
4081 case 0x34: /* sysenter */
4082 case 0x35: /* sysexit */
4083 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4084 return EMULATE_FAIL;
4086 case 0x05: /* syscall */
4087 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4088 return EMULATE_FAIL;
4091 return EMULATE_FAIL;
4094 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4095 return EMULATE_FAIL;
4098 ++vcpu->stat.insn_emulation;
4100 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
4101 return EMULATE_DONE;
4102 if (emulation_type & EMULTYPE_SKIP)
4103 return EMULATE_FAIL;
4104 return handle_emulation_failure(vcpu);
4108 if (emulation_type & EMULTYPE_SKIP) {
4109 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4110 return EMULATE_DONE;
4113 /* this is needed for vmware backdor interface to work since it
4114 changes registers values during IO operation */
4115 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4118 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
4120 if (r) { /* emulation failed */
4122 * if emulation was due to access to shadowed page table
4123 * and it failed try to unshadow page and re-entetr the
4124 * guest to let CPU execute the instruction.
4126 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
4127 return EMULATE_DONE;
4129 return handle_emulation_failure(vcpu);
4132 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4133 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4134 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4135 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4137 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4138 inject_emulated_exception(vcpu);
4139 return EMULATE_DONE;
4142 if (vcpu->arch.pio.count) {
4143 if (!vcpu->arch.pio.in)
4144 vcpu->arch.pio.count = 0;
4145 return EMULATE_DO_MMIO;
4148 if (vcpu->mmio_needed) {
4149 if (vcpu->mmio_is_write)
4150 vcpu->mmio_needed = 0;
4151 return EMULATE_DO_MMIO;
4154 if (vcpu->arch.emulate_ctxt.restart)
4157 return EMULATE_DONE;
4159 EXPORT_SYMBOL_GPL(emulate_instruction);
4161 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4163 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4164 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4165 /* do not return to emulator after return from userspace */
4166 vcpu->arch.pio.count = 0;
4169 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4171 static void bounce_off(void *info)
4176 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4179 struct cpufreq_freqs *freq = data;
4181 struct kvm_vcpu *vcpu;
4182 int i, send_ipi = 0;
4184 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4186 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4188 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
4190 spin_lock(&kvm_lock);
4191 list_for_each_entry(kvm, &vm_list, vm_list) {
4192 kvm_for_each_vcpu(i, vcpu, kvm) {
4193 if (vcpu->cpu != freq->cpu)
4195 if (!kvm_request_guest_time_update(vcpu))
4197 if (vcpu->cpu != smp_processor_id())
4201 spin_unlock(&kvm_lock);
4203 if (freq->old < freq->new && send_ipi) {
4205 * We upscale the frequency. Must make the guest
4206 * doesn't see old kvmclock values while running with
4207 * the new frequency, otherwise we risk the guest sees
4208 * time go backwards.
4210 * In case we update the frequency for another cpu
4211 * (which might be in guest context) send an interrupt
4212 * to kick the cpu out of guest context. Next time
4213 * guest context is entered kvmclock will be updated,
4214 * so the guest will not see stale values.
4216 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4221 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4222 .notifier_call = kvmclock_cpufreq_notifier
4225 static void kvm_timer_init(void)
4229 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4230 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4231 CPUFREQ_TRANSITION_NOTIFIER);
4232 for_each_online_cpu(cpu) {
4233 unsigned long khz = cpufreq_get(cpu);
4236 per_cpu(cpu_tsc_khz, cpu) = khz;
4239 for_each_possible_cpu(cpu)
4240 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4244 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4246 static int kvm_is_in_guest(void)
4248 return percpu_read(current_vcpu) != NULL;
4251 static int kvm_is_user_mode(void)
4255 if (percpu_read(current_vcpu))
4256 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4258 return user_mode != 0;
4261 static unsigned long kvm_get_guest_ip(void)
4263 unsigned long ip = 0;
4265 if (percpu_read(current_vcpu))
4266 ip = kvm_rip_read(percpu_read(current_vcpu));
4271 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4272 .is_in_guest = kvm_is_in_guest,
4273 .is_user_mode = kvm_is_user_mode,
4274 .get_guest_ip = kvm_get_guest_ip,
4277 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4279 percpu_write(current_vcpu, vcpu);
4281 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4283 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4285 percpu_write(current_vcpu, NULL);
4287 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4289 int kvm_arch_init(void *opaque)
4292 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4295 printk(KERN_ERR "kvm: already loaded the other module\n");
4300 if (!ops->cpu_has_kvm_support()) {
4301 printk(KERN_ERR "kvm: no hardware support\n");
4305 if (ops->disabled_by_bios()) {
4306 printk(KERN_ERR "kvm: disabled by bios\n");
4311 r = kvm_mmu_module_init();
4315 kvm_init_msr_list();
4318 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4319 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4320 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4321 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4325 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4328 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4336 void kvm_arch_exit(void)
4338 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4340 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4341 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4342 CPUFREQ_TRANSITION_NOTIFIER);
4344 kvm_mmu_module_exit();
4347 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4349 ++vcpu->stat.halt_exits;
4350 if (irqchip_in_kernel(vcpu->kvm)) {
4351 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4354 vcpu->run->exit_reason = KVM_EXIT_HLT;
4358 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4360 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4363 if (is_long_mode(vcpu))
4366 return a0 | ((gpa_t)a1 << 32);
4369 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4371 u64 param, ingpa, outgpa, ret;
4372 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4373 bool fast, longmode;
4377 * hypercall generates UD from non zero cpl and real mode
4380 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4381 kvm_queue_exception(vcpu, UD_VECTOR);
4385 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4386 longmode = is_long_mode(vcpu) && cs_l == 1;
4389 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4390 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4391 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4392 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4393 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4394 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4396 #ifdef CONFIG_X86_64
4398 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4399 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4400 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4404 code = param & 0xffff;
4405 fast = (param >> 16) & 0x1;
4406 rep_cnt = (param >> 32) & 0xfff;
4407 rep_idx = (param >> 48) & 0xfff;
4409 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4412 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4413 kvm_vcpu_on_spin(vcpu);
4416 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4420 ret = res | (((u64)rep_done & 0xfff) << 32);
4422 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4424 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4425 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4431 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4433 unsigned long nr, a0, a1, a2, a3, ret;
4436 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4437 return kvm_hv_hypercall(vcpu);
4439 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4440 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4441 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4442 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4443 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4445 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4447 if (!is_long_mode(vcpu)) {
4455 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4461 case KVM_HC_VAPIC_POLL_IRQ:
4465 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4472 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4473 ++vcpu->stat.hypercalls;
4476 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4478 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4480 char instruction[3];
4481 unsigned long rip = kvm_rip_read(vcpu);
4484 * Blow out the MMU to ensure that no other VCPU has an active mapping
4485 * to ensure that the updated hypercall appears atomically across all
4488 kvm_mmu_zap_all(vcpu->kvm);
4490 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4492 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4495 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4497 struct desc_ptr dt = { limit, base };
4499 kvm_x86_ops->set_gdt(vcpu, &dt);
4502 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4504 struct desc_ptr dt = { limit, base };
4506 kvm_x86_ops->set_idt(vcpu, &dt);
4509 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4511 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4512 int j, nent = vcpu->arch.cpuid_nent;
4514 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4515 /* when no next entry is found, the current entry[i] is reselected */
4516 for (j = i + 1; ; j = (j + 1) % nent) {
4517 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4518 if (ej->function == e->function) {
4519 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4523 return 0; /* silence gcc, even though control never reaches here */
4526 /* find an entry with matching function, matching index (if needed), and that
4527 * should be read next (if it's stateful) */
4528 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4529 u32 function, u32 index)
4531 if (e->function != function)
4533 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4535 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4536 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4541 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4542 u32 function, u32 index)
4545 struct kvm_cpuid_entry2 *best = NULL;
4547 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4548 struct kvm_cpuid_entry2 *e;
4550 e = &vcpu->arch.cpuid_entries[i];
4551 if (is_matching_cpuid_entry(e, function, index)) {
4552 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4553 move_to_next_stateful_cpuid_entry(vcpu, i);
4558 * Both basic or both extended?
4560 if (((e->function ^ function) & 0x80000000) == 0)
4561 if (!best || e->function > best->function)
4566 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4568 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4570 struct kvm_cpuid_entry2 *best;
4572 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4573 if (!best || best->eax < 0x80000008)
4575 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4577 return best->eax & 0xff;
4582 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4584 u32 function, index;
4585 struct kvm_cpuid_entry2 *best;
4587 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4588 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4589 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4590 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4591 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4592 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4593 best = kvm_find_cpuid_entry(vcpu, function, index);
4595 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4596 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4597 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4598 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4600 kvm_x86_ops->skip_emulated_instruction(vcpu);
4601 trace_kvm_cpuid(function,
4602 kvm_register_read(vcpu, VCPU_REGS_RAX),
4603 kvm_register_read(vcpu, VCPU_REGS_RBX),
4604 kvm_register_read(vcpu, VCPU_REGS_RCX),
4605 kvm_register_read(vcpu, VCPU_REGS_RDX));
4607 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4610 * Check if userspace requested an interrupt window, and that the
4611 * interrupt window is open.
4613 * No need to exit to userspace if we already have an interrupt queued.
4615 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4617 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4618 vcpu->run->request_interrupt_window &&
4619 kvm_arch_interrupt_allowed(vcpu));
4622 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4624 struct kvm_run *kvm_run = vcpu->run;
4626 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4627 kvm_run->cr8 = kvm_get_cr8(vcpu);
4628 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4629 if (irqchip_in_kernel(vcpu->kvm))
4630 kvm_run->ready_for_interrupt_injection = 1;
4632 kvm_run->ready_for_interrupt_injection =
4633 kvm_arch_interrupt_allowed(vcpu) &&
4634 !kvm_cpu_has_interrupt(vcpu) &&
4635 !kvm_event_needs_reinjection(vcpu);
4638 static void vapic_enter(struct kvm_vcpu *vcpu)
4640 struct kvm_lapic *apic = vcpu->arch.apic;
4643 if (!apic || !apic->vapic_addr)
4646 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4648 vcpu->arch.apic->vapic_page = page;
4651 static void vapic_exit(struct kvm_vcpu *vcpu)
4653 struct kvm_lapic *apic = vcpu->arch.apic;
4656 if (!apic || !apic->vapic_addr)
4659 idx = srcu_read_lock(&vcpu->kvm->srcu);
4660 kvm_release_page_dirty(apic->vapic_page);
4661 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4662 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4665 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4669 if (!kvm_x86_ops->update_cr8_intercept)
4672 if (!vcpu->arch.apic)
4675 if (!vcpu->arch.apic->vapic_addr)
4676 max_irr = kvm_lapic_find_highest_irr(vcpu);
4683 tpr = kvm_lapic_get_cr8(vcpu);
4685 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4688 static void inject_pending_event(struct kvm_vcpu *vcpu)
4690 /* try to reinject previous events if any */
4691 if (vcpu->arch.exception.pending) {
4692 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4693 vcpu->arch.exception.has_error_code,
4694 vcpu->arch.exception.error_code);
4695 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4696 vcpu->arch.exception.has_error_code,
4697 vcpu->arch.exception.error_code,
4698 vcpu->arch.exception.reinject);
4702 if (vcpu->arch.nmi_injected) {
4703 kvm_x86_ops->set_nmi(vcpu);
4707 if (vcpu->arch.interrupt.pending) {
4708 kvm_x86_ops->set_irq(vcpu);
4712 /* try to inject new event if pending */
4713 if (vcpu->arch.nmi_pending) {
4714 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4715 vcpu->arch.nmi_pending = false;
4716 vcpu->arch.nmi_injected = true;
4717 kvm_x86_ops->set_nmi(vcpu);
4719 } else if (kvm_cpu_has_interrupt(vcpu)) {
4720 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4721 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4723 kvm_x86_ops->set_irq(vcpu);
4728 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4730 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4731 !vcpu->guest_xcr0_loaded) {
4732 /* kvm_set_xcr() also depends on this */
4733 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4734 vcpu->guest_xcr0_loaded = 1;
4738 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4740 if (vcpu->guest_xcr0_loaded) {
4741 if (vcpu->arch.xcr0 != host_xcr0)
4742 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4743 vcpu->guest_xcr0_loaded = 0;
4747 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4750 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4751 vcpu->run->request_interrupt_window;
4754 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4755 kvm_mmu_unload(vcpu);
4757 r = kvm_mmu_reload(vcpu);
4761 if (vcpu->requests) {
4762 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4763 __kvm_migrate_timers(vcpu);
4764 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4765 kvm_write_guest_time(vcpu);
4766 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4767 kvm_mmu_sync_roots(vcpu);
4768 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4769 kvm_x86_ops->tlb_flush(vcpu);
4770 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4772 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4776 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4777 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4781 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4782 vcpu->fpu_active = 0;
4783 kvm_x86_ops->fpu_deactivate(vcpu);
4789 kvm_x86_ops->prepare_guest_switch(vcpu);
4790 if (vcpu->fpu_active)
4791 kvm_load_guest_fpu(vcpu);
4792 kvm_load_guest_xcr0(vcpu);
4794 atomic_set(&vcpu->guest_mode, 1);
4797 local_irq_disable();
4799 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4800 || need_resched() || signal_pending(current)) {
4801 atomic_set(&vcpu->guest_mode, 0);
4809 inject_pending_event(vcpu);
4811 /* enable NMI/IRQ window open exits if needed */
4812 if (vcpu->arch.nmi_pending)
4813 kvm_x86_ops->enable_nmi_window(vcpu);
4814 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4815 kvm_x86_ops->enable_irq_window(vcpu);
4817 if (kvm_lapic_enabled(vcpu)) {
4818 update_cr8_intercept(vcpu);
4819 kvm_lapic_sync_to_vapic(vcpu);
4822 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4826 if (unlikely(vcpu->arch.switch_db_regs)) {
4828 set_debugreg(vcpu->arch.eff_db[0], 0);
4829 set_debugreg(vcpu->arch.eff_db[1], 1);
4830 set_debugreg(vcpu->arch.eff_db[2], 2);
4831 set_debugreg(vcpu->arch.eff_db[3], 3);
4834 trace_kvm_entry(vcpu->vcpu_id);
4835 kvm_x86_ops->run(vcpu);
4838 * If the guest has used debug registers, at least dr7
4839 * will be disabled while returning to the host.
4840 * If we don't have active breakpoints in the host, we don't
4841 * care about the messed up debug address registers. But if
4842 * we have some of them active, restore the old state.
4844 if (hw_breakpoint_active())
4845 hw_breakpoint_restore();
4847 atomic_set(&vcpu->guest_mode, 0);
4854 * We must have an instruction between local_irq_enable() and
4855 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4856 * the interrupt shadow. The stat.exits increment will do nicely.
4857 * But we need to prevent reordering, hence this barrier():
4865 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4868 * Profile KVM exit RIPs:
4870 if (unlikely(prof_on == KVM_PROFILING)) {
4871 unsigned long rip = kvm_rip_read(vcpu);
4872 profile_hit(KVM_PROFILING, (void *)rip);
4876 kvm_lapic_sync_from_vapic(vcpu);
4878 r = kvm_x86_ops->handle_exit(vcpu);
4884 static int __vcpu_run(struct kvm_vcpu *vcpu)
4887 struct kvm *kvm = vcpu->kvm;
4889 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4890 pr_debug("vcpu %d received sipi with vector # %x\n",
4891 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4892 kvm_lapic_reset(vcpu);
4893 r = kvm_arch_vcpu_reset(vcpu);
4896 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4899 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4904 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4905 r = vcpu_enter_guest(vcpu);
4907 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4908 kvm_vcpu_block(vcpu);
4909 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4910 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4912 switch(vcpu->arch.mp_state) {
4913 case KVM_MP_STATE_HALTED:
4914 vcpu->arch.mp_state =
4915 KVM_MP_STATE_RUNNABLE;
4916 case KVM_MP_STATE_RUNNABLE:
4918 case KVM_MP_STATE_SIPI_RECEIVED:
4929 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4930 if (kvm_cpu_has_pending_timer(vcpu))
4931 kvm_inject_pending_timer_irqs(vcpu);
4933 if (dm_request_for_irq_injection(vcpu)) {
4935 vcpu->run->exit_reason = KVM_EXIT_INTR;
4936 ++vcpu->stat.request_irq_exits;
4938 if (signal_pending(current)) {
4940 vcpu->run->exit_reason = KVM_EXIT_INTR;
4941 ++vcpu->stat.signal_exits;
4943 if (need_resched()) {
4944 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4946 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4950 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4957 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4962 if (vcpu->sigset_active)
4963 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4965 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4966 kvm_vcpu_block(vcpu);
4967 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4972 /* re-sync apic's tpr */
4973 if (!irqchip_in_kernel(vcpu->kvm))
4974 kvm_set_cr8(vcpu, kvm_run->cr8);
4976 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4977 vcpu->arch.emulate_ctxt.restart) {
4978 if (vcpu->mmio_needed) {
4979 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4980 vcpu->mmio_read_completed = 1;
4981 vcpu->mmio_needed = 0;
4983 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4984 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4985 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4986 if (r != EMULATE_DONE) {
4991 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4992 kvm_register_write(vcpu, VCPU_REGS_RAX,
4993 kvm_run->hypercall.ret);
4995 r = __vcpu_run(vcpu);
4998 post_kvm_run_save(vcpu);
4999 if (vcpu->sigset_active)
5000 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5005 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5007 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5008 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5009 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5010 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5011 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5012 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5013 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5014 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5015 #ifdef CONFIG_X86_64
5016 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5017 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5018 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5019 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5020 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5021 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5022 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5023 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5026 regs->rip = kvm_rip_read(vcpu);
5027 regs->rflags = kvm_get_rflags(vcpu);
5032 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5034 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5035 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5036 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5037 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5038 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5039 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5040 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5041 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5042 #ifdef CONFIG_X86_64
5043 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5044 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5045 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5046 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5047 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5048 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5049 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5050 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5053 kvm_rip_write(vcpu, regs->rip);
5054 kvm_set_rflags(vcpu, regs->rflags);
5056 vcpu->arch.exception.pending = false;
5061 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5063 struct kvm_segment cs;
5065 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5069 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5071 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5072 struct kvm_sregs *sregs)
5076 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5077 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5078 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5079 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5080 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5081 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5083 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5084 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5086 kvm_x86_ops->get_idt(vcpu, &dt);
5087 sregs->idt.limit = dt.size;
5088 sregs->idt.base = dt.address;
5089 kvm_x86_ops->get_gdt(vcpu, &dt);
5090 sregs->gdt.limit = dt.size;
5091 sregs->gdt.base = dt.address;
5093 sregs->cr0 = kvm_read_cr0(vcpu);
5094 sregs->cr2 = vcpu->arch.cr2;
5095 sregs->cr3 = vcpu->arch.cr3;
5096 sregs->cr4 = kvm_read_cr4(vcpu);
5097 sregs->cr8 = kvm_get_cr8(vcpu);
5098 sregs->efer = vcpu->arch.efer;
5099 sregs->apic_base = kvm_get_apic_base(vcpu);
5101 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5103 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5104 set_bit(vcpu->arch.interrupt.nr,
5105 (unsigned long *)sregs->interrupt_bitmap);
5110 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5111 struct kvm_mp_state *mp_state)
5113 mp_state->mp_state = vcpu->arch.mp_state;
5117 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5118 struct kvm_mp_state *mp_state)
5120 vcpu->arch.mp_state = mp_state->mp_state;
5124 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5125 bool has_error_code, u32 error_code)
5127 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5128 int cs_db, cs_l, ret;
5129 cache_all_regs(vcpu);
5131 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5133 vcpu->arch.emulate_ctxt.vcpu = vcpu;
5134 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
5135 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
5136 vcpu->arch.emulate_ctxt.mode =
5137 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5138 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
5139 ? X86EMUL_MODE_VM86 : cs_l
5140 ? X86EMUL_MODE_PROT64 : cs_db
5141 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
5142 memset(c, 0, sizeof(struct decode_cache));
5143 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
5145 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
5146 tss_selector, reason, has_error_code,
5150 return EMULATE_FAIL;
5152 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5153 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5154 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5155 return EMULATE_DONE;
5157 EXPORT_SYMBOL_GPL(kvm_task_switch);
5159 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5160 struct kvm_sregs *sregs)
5162 int mmu_reset_needed = 0;
5163 int pending_vec, max_bits;
5166 dt.size = sregs->idt.limit;
5167 dt.address = sregs->idt.base;
5168 kvm_x86_ops->set_idt(vcpu, &dt);
5169 dt.size = sregs->gdt.limit;
5170 dt.address = sregs->gdt.base;
5171 kvm_x86_ops->set_gdt(vcpu, &dt);
5173 vcpu->arch.cr2 = sregs->cr2;
5174 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5175 vcpu->arch.cr3 = sregs->cr3;
5177 kvm_set_cr8(vcpu, sregs->cr8);
5179 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5180 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5181 kvm_set_apic_base(vcpu, sregs->apic_base);
5183 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5184 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5185 vcpu->arch.cr0 = sregs->cr0;
5187 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5188 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5189 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5190 load_pdptrs(vcpu, vcpu->arch.cr3);
5191 mmu_reset_needed = 1;
5194 if (mmu_reset_needed)
5195 kvm_mmu_reset_context(vcpu);
5197 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5198 pending_vec = find_first_bit(
5199 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5200 if (pending_vec < max_bits) {
5201 kvm_queue_interrupt(vcpu, pending_vec, false);
5202 pr_debug("Set back pending irq %d\n", pending_vec);
5203 if (irqchip_in_kernel(vcpu->kvm))
5204 kvm_pic_clear_isr_ack(vcpu->kvm);
5207 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5208 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5209 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5210 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5211 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5212 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5214 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5215 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5217 update_cr8_intercept(vcpu);
5219 /* Older userspace won't unhalt the vcpu on reset. */
5220 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5221 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5223 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5228 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5229 struct kvm_guest_debug *dbg)
5231 unsigned long rflags;
5234 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5236 if (vcpu->arch.exception.pending)
5238 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5239 kvm_queue_exception(vcpu, DB_VECTOR);
5241 kvm_queue_exception(vcpu, BP_VECTOR);
5245 * Read rflags as long as potentially injected trace flags are still
5248 rflags = kvm_get_rflags(vcpu);
5250 vcpu->guest_debug = dbg->control;
5251 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5252 vcpu->guest_debug = 0;
5254 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5255 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5256 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5257 vcpu->arch.switch_db_regs =
5258 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5260 for (i = 0; i < KVM_NR_DB_REGS; i++)
5261 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5262 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5265 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5266 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5267 get_segment_base(vcpu, VCPU_SREG_CS);
5270 * Trigger an rflags update that will inject or remove the trace
5273 kvm_set_rflags(vcpu, rflags);
5275 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5285 * Translate a guest virtual address to a guest physical address.
5287 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5288 struct kvm_translation *tr)
5290 unsigned long vaddr = tr->linear_address;
5294 idx = srcu_read_lock(&vcpu->kvm->srcu);
5295 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5296 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5297 tr->physical_address = gpa;
5298 tr->valid = gpa != UNMAPPED_GVA;
5305 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5307 struct i387_fxsave_struct *fxsave =
5308 &vcpu->arch.guest_fpu.state->fxsave;
5310 memcpy(fpu->fpr, fxsave->st_space, 128);
5311 fpu->fcw = fxsave->cwd;
5312 fpu->fsw = fxsave->swd;
5313 fpu->ftwx = fxsave->twd;
5314 fpu->last_opcode = fxsave->fop;
5315 fpu->last_ip = fxsave->rip;
5316 fpu->last_dp = fxsave->rdp;
5317 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5322 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5324 struct i387_fxsave_struct *fxsave =
5325 &vcpu->arch.guest_fpu.state->fxsave;
5327 memcpy(fxsave->st_space, fpu->fpr, 128);
5328 fxsave->cwd = fpu->fcw;
5329 fxsave->swd = fpu->fsw;
5330 fxsave->twd = fpu->ftwx;
5331 fxsave->fop = fpu->last_opcode;
5332 fxsave->rip = fpu->last_ip;
5333 fxsave->rdp = fpu->last_dp;
5334 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5339 int fx_init(struct kvm_vcpu *vcpu)
5343 err = fpu_alloc(&vcpu->arch.guest_fpu);
5347 fpu_finit(&vcpu->arch.guest_fpu);
5350 * Ensure guest xcr0 is valid for loading
5352 vcpu->arch.xcr0 = XSTATE_FP;
5354 vcpu->arch.cr0 |= X86_CR0_ET;
5358 EXPORT_SYMBOL_GPL(fx_init);
5360 static void fx_free(struct kvm_vcpu *vcpu)
5362 fpu_free(&vcpu->arch.guest_fpu);
5365 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5367 if (vcpu->guest_fpu_loaded)
5371 * Restore all possible states in the guest,
5372 * and assume host would use all available bits.
5373 * Guest xcr0 would be loaded later.
5375 kvm_put_guest_xcr0(vcpu);
5376 vcpu->guest_fpu_loaded = 1;
5377 unlazy_fpu(current);
5378 fpu_restore_checking(&vcpu->arch.guest_fpu);
5382 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5384 kvm_put_guest_xcr0(vcpu);
5386 if (!vcpu->guest_fpu_loaded)
5389 vcpu->guest_fpu_loaded = 0;
5390 fpu_save_init(&vcpu->arch.guest_fpu);
5391 ++vcpu->stat.fpu_reload;
5392 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5396 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5398 if (vcpu->arch.time_page) {
5399 kvm_release_page_dirty(vcpu->arch.time_page);
5400 vcpu->arch.time_page = NULL;
5404 kvm_x86_ops->vcpu_free(vcpu);
5407 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5410 return kvm_x86_ops->vcpu_create(kvm, id);
5413 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5417 vcpu->arch.mtrr_state.have_fixed = 1;
5419 r = kvm_arch_vcpu_reset(vcpu);
5421 r = kvm_mmu_setup(vcpu);
5428 kvm_x86_ops->vcpu_free(vcpu);
5432 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5435 kvm_mmu_unload(vcpu);
5439 kvm_x86_ops->vcpu_free(vcpu);
5442 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5444 vcpu->arch.nmi_pending = false;
5445 vcpu->arch.nmi_injected = false;
5447 vcpu->arch.switch_db_regs = 0;
5448 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5449 vcpu->arch.dr6 = DR6_FIXED_1;
5450 vcpu->arch.dr7 = DR7_FIXED_1;
5452 return kvm_x86_ops->vcpu_reset(vcpu);
5455 int kvm_arch_hardware_enable(void *garbage)
5458 * Since this may be called from a hotplug notifcation,
5459 * we can't get the CPU frequency directly.
5461 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5462 int cpu = raw_smp_processor_id();
5463 per_cpu(cpu_tsc_khz, cpu) = 0;
5466 kvm_shared_msr_cpu_online();
5468 return kvm_x86_ops->hardware_enable(garbage);
5471 void kvm_arch_hardware_disable(void *garbage)
5473 kvm_x86_ops->hardware_disable(garbage);
5474 drop_user_return_notifiers(garbage);
5477 int kvm_arch_hardware_setup(void)
5479 return kvm_x86_ops->hardware_setup();
5482 void kvm_arch_hardware_unsetup(void)
5484 kvm_x86_ops->hardware_unsetup();
5487 void kvm_arch_check_processor_compat(void *rtn)
5489 kvm_x86_ops->check_processor_compatibility(rtn);
5492 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5498 BUG_ON(vcpu->kvm == NULL);
5501 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5502 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5503 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5505 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5507 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5512 vcpu->arch.pio_data = page_address(page);
5514 r = kvm_mmu_create(vcpu);
5516 goto fail_free_pio_data;
5518 if (irqchip_in_kernel(kvm)) {
5519 r = kvm_create_lapic(vcpu);
5521 goto fail_mmu_destroy;
5524 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5526 if (!vcpu->arch.mce_banks) {
5528 goto fail_free_lapic;
5530 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5534 kvm_free_lapic(vcpu);
5536 kvm_mmu_destroy(vcpu);
5538 free_page((unsigned long)vcpu->arch.pio_data);
5543 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5547 kfree(vcpu->arch.mce_banks);
5548 kvm_free_lapic(vcpu);
5549 idx = srcu_read_lock(&vcpu->kvm->srcu);
5550 kvm_mmu_destroy(vcpu);
5551 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5552 free_page((unsigned long)vcpu->arch.pio_data);
5555 struct kvm *kvm_arch_create_vm(void)
5557 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5560 return ERR_PTR(-ENOMEM);
5562 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5563 if (!kvm->arch.aliases) {
5565 return ERR_PTR(-ENOMEM);
5568 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5569 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5571 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5572 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5574 rdtscll(kvm->arch.vm_init_tsc);
5579 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5582 kvm_mmu_unload(vcpu);
5586 static void kvm_free_vcpus(struct kvm *kvm)
5589 struct kvm_vcpu *vcpu;
5592 * Unpin any mmu pages first.
5594 kvm_for_each_vcpu(i, vcpu, kvm)
5595 kvm_unload_vcpu_mmu(vcpu);
5596 kvm_for_each_vcpu(i, vcpu, kvm)
5597 kvm_arch_vcpu_free(vcpu);
5599 mutex_lock(&kvm->lock);
5600 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5601 kvm->vcpus[i] = NULL;
5603 atomic_set(&kvm->online_vcpus, 0);
5604 mutex_unlock(&kvm->lock);
5607 void kvm_arch_sync_events(struct kvm *kvm)
5609 kvm_free_all_assigned_devices(kvm);
5612 void kvm_arch_destroy_vm(struct kvm *kvm)
5614 kvm_iommu_unmap_guest(kvm);
5616 kfree(kvm->arch.vpic);
5617 kfree(kvm->arch.vioapic);
5618 kvm_free_vcpus(kvm);
5619 kvm_free_physmem(kvm);
5620 if (kvm->arch.apic_access_page)
5621 put_page(kvm->arch.apic_access_page);
5622 if (kvm->arch.ept_identity_pagetable)
5623 put_page(kvm->arch.ept_identity_pagetable);
5624 cleanup_srcu_struct(&kvm->srcu);
5625 kfree(kvm->arch.aliases);
5629 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5630 struct kvm_memory_slot *memslot,
5631 struct kvm_memory_slot old,
5632 struct kvm_userspace_memory_region *mem,
5635 int npages = memslot->npages;
5637 /*To keep backward compatibility with older userspace,
5638 *x86 needs to hanlde !user_alloc case.
5641 if (npages && !old.rmap) {
5642 unsigned long userspace_addr;
5644 down_write(¤t->mm->mmap_sem);
5645 userspace_addr = do_mmap(NULL, 0,
5647 PROT_READ | PROT_WRITE,
5648 MAP_PRIVATE | MAP_ANONYMOUS,
5650 up_write(¤t->mm->mmap_sem);
5652 if (IS_ERR((void *)userspace_addr))
5653 return PTR_ERR((void *)userspace_addr);
5655 memslot->userspace_addr = userspace_addr;
5663 void kvm_arch_commit_memory_region(struct kvm *kvm,
5664 struct kvm_userspace_memory_region *mem,
5665 struct kvm_memory_slot old,
5669 int npages = mem->memory_size >> PAGE_SHIFT;
5671 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5674 down_write(¤t->mm->mmap_sem);
5675 ret = do_munmap(current->mm, old.userspace_addr,
5676 old.npages * PAGE_SIZE);
5677 up_write(¤t->mm->mmap_sem);
5680 "kvm_vm_ioctl_set_memory_region: "
5681 "failed to munmap memory\n");
5684 spin_lock(&kvm->mmu_lock);
5685 if (!kvm->arch.n_requested_mmu_pages) {
5686 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5687 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5690 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5691 spin_unlock(&kvm->mmu_lock);
5694 void kvm_arch_flush_shadow(struct kvm *kvm)
5696 kvm_mmu_zap_all(kvm);
5697 kvm_reload_remote_mmus(kvm);
5700 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5702 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5703 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5704 || vcpu->arch.nmi_pending ||
5705 (kvm_arch_interrupt_allowed(vcpu) &&
5706 kvm_cpu_has_interrupt(vcpu));
5709 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5712 int cpu = vcpu->cpu;
5714 if (waitqueue_active(&vcpu->wq)) {
5715 wake_up_interruptible(&vcpu->wq);
5716 ++vcpu->stat.halt_wakeup;
5720 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5721 if (atomic_xchg(&vcpu->guest_mode, 0))
5722 smp_send_reschedule(cpu);
5726 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5728 return kvm_x86_ops->interrupt_allowed(vcpu);
5731 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5733 unsigned long current_rip = kvm_rip_read(vcpu) +
5734 get_segment_base(vcpu, VCPU_SREG_CS);
5736 return current_rip == linear_rip;
5738 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5740 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5742 unsigned long rflags;
5744 rflags = kvm_x86_ops->get_rflags(vcpu);
5745 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5746 rflags &= ~X86_EFLAGS_TF;
5749 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5751 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5753 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5754 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5755 rflags |= X86_EFLAGS_TF;
5756 kvm_x86_ops->set_rflags(vcpu, rflags);
5758 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5760 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5761 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5762 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5763 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5764 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5765 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5766 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5767 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5768 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5769 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5770 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5771 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);