3 * arch/arm/mach-u300/include/mach/gpio.h
6 * Copyright (C) 2007-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * GPIO block resgister definitions and inline macros for
9 * U300 GPIO COH 901 335 or COH 901 571/3
10 * Author: Linus Walleij <linus.walleij@stericsson.com>
13 #ifndef __MACH_U300_GPIO_H
14 #define __MACH_U300_GPIO_H
16 #include <linux/kernel.h>
18 #include <mach/hardware.h>
21 #define __ARM_GPIOLIB_COMPLEX
23 /* Switch type depending on platform/chip variant */
24 #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
25 #define U300_COH901335
27 #if defined(CONFIG_MACH_U300_BS365) || defined(CONFIG_MACH_U300_BS335)
28 #define U300_COH901571_3
31 /* Get base address for regs here */
32 #include "u300-regs.h"
37 * This is the GPIO block definitions. GPIO (General Purpose I/O) can be
38 * used for anything, and often is. The event/enable etc figures are for
39 * the lowermost pin (pin 0 on each port), shift this left to match your
40 * pin if you're gonna use these values.
43 #define U300_GPIO_PORTX_SPACING (0x1C)
44 /* Port X Pin Data Register 32bit, this is both input and output (R/W) */
45 #define U300_GPIO_PXPDIR (0x00)
46 #define U300_GPIO_PXPDOR (0x00)
47 /* Port X Pin Config Register 32bit (R/W) */
48 #define U300_GPIO_PXPCR (0x04)
49 #define U300_GPIO_PXPCR_ALL_PINS_MODE_MASK (0x0000FFFFUL)
50 #define U300_GPIO_PXPCR_PIN_MODE_MASK (0x00000003UL)
51 #define U300_GPIO_PXPCR_PIN_MODE_SHIFT (0x00000002UL)
52 #define U300_GPIO_PXPCR_PIN_MODE_INPUT (0x00000000UL)
53 #define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL (0x00000001UL)
54 #define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_DRAIN (0x00000002UL)
55 #define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_SOURCE (0x00000003UL)
56 /* Port X Interrupt Event Register 32bit (R/W) */
57 #define U300_GPIO_PXIEV (0x08)
58 #define U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK (0x000000FFUL)
59 #define U300_GPIO_PXIEV_IRQ_EVENT (0x00000001UL)
60 /* Port X Interrupt Enable Register 32bit (R/W) */
61 #define U300_GPIO_PXIEN (0x0C)
62 #define U300_GPIO_PXIEN_ALL_IRQ_ENABLE_MASK (0x000000FFUL)
63 #define U300_GPIO_PXIEN_IRQ_ENABLE (0x00000001UL)
64 /* Port X Interrupt Force Register 32bit (R/W) */
65 #define U300_GPIO_PXIFR (0x10)
66 #define U300_GPIO_PXIFR_ALL_IRQ_FORCE_MASK (0x000000FFUL)
67 #define U300_GPIO_PXIFR_IRQ_FORCE (0x00000001UL)
68 /* Port X Interrupt Config Register 32bit (R/W) */
69 #define U300_GPIO_PXICR (0x14)
70 #define U300_GPIO_PXICR_ALL_IRQ_CONFIG_MASK (0x000000FFUL)
71 #define U300_GPIO_PXICR_IRQ_CONFIG_MASK (0x00000001UL)
72 #define U300_GPIO_PXICR_IRQ_CONFIG_FALLING_EDGE (0x00000000UL)
73 #define U300_GPIO_PXICR_IRQ_CONFIG_RISING_EDGE (0x00000001UL)
74 /* Port X Pull-up Enable Register 32bit (R/W) */
75 #define U300_GPIO_PXPER (0x18)
76 #define U300_GPIO_PXPER_ALL_PULL_UP_DISABLE_MASK (0x000000FFUL)
77 #define U300_GPIO_PXPER_PULL_UP_DISABLE (0x00000001UL)
78 /* Control Register 32bit (R/W) */
79 #define U300_GPIO_CR (0x54)
80 #define U300_GPIO_CR_BLOCK_CLOCK_ENABLE (0x00000001UL)
81 /* three ports of 8 bits each = GPIO pins 0..23 */
82 #define U300_GPIO_NUM_PORTS 3
83 #define U300_GPIO_PINS_PER_PORT 8
84 #define U300_GPIO_MAX (U300_GPIO_PINS_PER_PORT * U300_GPIO_NUM_PORTS - 1)
87 #ifdef U300_COH901571_3
89 * Control Register 32bit (R/W)
90 * bit 15-9 (mask 0x0000FE00) contains the number of cores. 8*cores
91 * gives the number of GPIO pins.
92 * bit 8-2 (mask 0x000001FC) contains the core version ID.
94 #define U300_GPIO_CR (0x00)
95 #define U300_GPIO_CR_SYNC_SEL_ENABLE (0x00000002UL)
96 #define U300_GPIO_CR_BLOCK_CLKRQ_ENABLE (0x00000001UL)
97 #define U300_GPIO_PORTX_SPACING (0x30)
98 /* Port X Pin Data INPUT Register 32bit (R/W) */
99 #define U300_GPIO_PXPDIR (0x04)
100 /* Port X Pin Data OUTPUT Register 32bit (R/W) */
101 #define U300_GPIO_PXPDOR (0x08)
102 /* Port X Pin Config Register 32bit (R/W) */
103 #define U300_GPIO_PXPCR (0x0C)
104 #define U300_GPIO_PXPCR_ALL_PINS_MODE_MASK (0x0000FFFFUL)
105 #define U300_GPIO_PXPCR_PIN_MODE_MASK (0x00000003UL)
106 #define U300_GPIO_PXPCR_PIN_MODE_SHIFT (0x00000002UL)
107 #define U300_GPIO_PXPCR_PIN_MODE_INPUT (0x00000000UL)
108 #define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL (0x00000001UL)
109 #define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_DRAIN (0x00000002UL)
110 #define U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_SOURCE (0x00000003UL)
111 /* Port X Pull-up Enable Register 32bit (R/W) */
112 #define U300_GPIO_PXPER (0x10)
113 #define U300_GPIO_PXPER_ALL_PULL_UP_DISABLE_MASK (0x000000FFUL)
114 #define U300_GPIO_PXPER_PULL_UP_DISABLE (0x00000001UL)
115 /* Port X Interrupt Event Register 32bit (R/W) */
116 #define U300_GPIO_PXIEV (0x14)
117 #define U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK (0x000000FFUL)
118 #define U300_GPIO_PXIEV_IRQ_EVENT (0x00000001UL)
119 /* Port X Interrupt Enable Register 32bit (R/W) */
120 #define U300_GPIO_PXIEN (0x18)
121 #define U300_GPIO_PXIEN_ALL_IRQ_ENABLE_MASK (0x000000FFUL)
122 #define U300_GPIO_PXIEN_IRQ_ENABLE (0x00000001UL)
123 /* Port X Interrupt Force Register 32bit (R/W) */
124 #define U300_GPIO_PXIFR (0x1C)
125 #define U300_GPIO_PXIFR_ALL_IRQ_FORCE_MASK (0x000000FFUL)
126 #define U300_GPIO_PXIFR_IRQ_FORCE (0x00000001UL)
127 /* Port X Interrupt Config Register 32bit (R/W) */
128 #define U300_GPIO_PXICR (0x20)
129 #define U300_GPIO_PXICR_ALL_IRQ_CONFIG_MASK (0x000000FFUL)
130 #define U300_GPIO_PXICR_IRQ_CONFIG_MASK (0x00000001UL)
131 #define U300_GPIO_PXICR_IRQ_CONFIG_FALLING_EDGE (0x00000000UL)
132 #define U300_GPIO_PXICR_IRQ_CONFIG_RISING_EDGE (0x00000001UL)
133 #ifdef CONFIG_MACH_U300_BS335
134 /* seven ports of 8 bits each = GPIO pins 0..55 */
135 #define U300_GPIO_NUM_PORTS 7
137 /* five ports of 8 bits each = GPIO pins 0..39 */
138 #define U300_GPIO_NUM_PORTS 5
140 #define U300_GPIO_PINS_PER_PORT 8
141 #define U300_GPIO_MAX (U300_GPIO_PINS_PER_PORT * U300_GPIO_NUM_PORTS - 1)
145 * Individual pin assignments for the B26/S26. Notice that the
146 * actual usage of these pins depends on the PAD MUX settings, that
147 * is why the same number can potentially appear several times.
148 * In the reference design each pin is only used for one purpose.
149 * These were determined by inspecting the B26/S26 schematic:
150 * 2/1911-ROA 128 1603
152 #ifdef CONFIG_MACH_U300_BS2X
153 #define U300_GPIO_PIN_UART_RX 0
154 #define U300_GPIO_PIN_UART_TX 1
155 #define U300_GPIO_PIN_GPIO02 2 /* Unrouted */
156 #define U300_GPIO_PIN_GPIO03 3 /* Unrouted */
157 #define U300_GPIO_PIN_CAM_SLEEP 4
158 #define U300_GPIO_PIN_CAM_REG_EN 5
159 #define U300_GPIO_PIN_GPIO06 6 /* Unrouted */
160 #define U300_GPIO_PIN_GPIO07 7 /* Unrouted */
162 #define U300_GPIO_PIN_GPIO08 8 /* Service point SP2321 */
163 #define U300_GPIO_PIN_GPIO09 9 /* Service point SP2322 */
164 #define U300_GPIO_PIN_PHFSENSE 10 /* Headphone jack sensing */
165 #define U300_GPIO_PIN_MMC_CLKRET 11 /* Clock return from MMC/SD card */
166 #define U300_GPIO_PIN_MMC_CD 12 /* MMC Card insertion detection */
167 #define U300_GPIO_PIN_FLIPSENSE 13 /* Mechanical flip sensing */
168 #define U300_GPIO_PIN_GPIO14 14 /* DSP JTAG Port RTCK */
169 #define U300_GPIO_PIN_GPIO15 15 /* Unrouted */
171 #define U300_GPIO_PIN_GPIO16 16 /* Unrouted */
172 #define U300_GPIO_PIN_GPIO17 17 /* Unrouted */
173 #define U300_GPIO_PIN_GPIO18 18 /* Unrouted */
174 #define U300_GPIO_PIN_GPIO19 19 /* Unrouted */
175 #define U300_GPIO_PIN_GPIO20 20 /* Unrouted */
176 #define U300_GPIO_PIN_GPIO21 21 /* Unrouted */
177 #define U300_GPIO_PIN_GPIO22 22 /* Unrouted */
178 #define U300_GPIO_PIN_GPIO23 23 /* Unrouted */
182 * Individual pin assignments for the B330/S330 and B365/S365.
183 * Notice that the actual usage of these pins depends on the
184 * PAD MUX settings, that is why the same number can potentially
185 * appear several times. In the reference design each pin is only
186 * used for one purpose. These were determined by inspecting the
189 #if defined(CONFIG_MACH_U300_BS330) || defined(CONFIG_MACH_U300_BS365) || \
190 defined(CONFIG_MACH_U300_BS335)
191 #define U300_GPIO_PIN_UART_RX 0
192 #define U300_GPIO_PIN_UART_TX 1
193 #define U300_GPIO_PIN_UART_CTS 2
194 #define U300_GPIO_PIN_UART_RTS 3
195 #define U300_GPIO_PIN_CAM_MAIN_STANDBY 4 /* Camera MAIN standby */
196 #define U300_GPIO_PIN_GPIO05 5 /* Unrouted */
197 #define U300_GPIO_PIN_MS_CD 6 /* Memory Stick Card insertion */
198 #define U300_GPIO_PIN_GPIO07 7 /* Test point TP2430 */
200 #define U300_GPIO_PIN_GPIO08 8 /* Test point TP2437 */
201 #define U300_GPIO_PIN_GPIO09 9 /* Test point TP2431 */
202 #define U300_GPIO_PIN_GPIO10 10 /* Test point TP2432 */
203 #define U300_GPIO_PIN_MMC_CLKRET 11 /* Clock return from MMC/SD card */
204 #define U300_GPIO_PIN_MMC_CD 12 /* MMC Card insertion detection */
205 #define U300_GPIO_PIN_CAM_SUB_STANDBY 13 /* Camera SUB standby */
206 #define U300_GPIO_PIN_GPIO14 14 /* Test point TP2436 */
207 #define U300_GPIO_PIN_GPIO15 15 /* Unrouted */
209 #define U300_GPIO_PIN_GPIO16 16 /* Test point TP2438 */
210 #define U300_GPIO_PIN_PHFSENSE 17 /* Headphone jack sensing */
211 #define U300_GPIO_PIN_GPIO18 18 /* Test point TP2439 */
212 #define U300_GPIO_PIN_GPIO19 19 /* Routed somewhere */
213 #define U300_GPIO_PIN_GPIO20 20 /* Unrouted */
214 #define U300_GPIO_PIN_GPIO21 21 /* Unrouted */
215 #define U300_GPIO_PIN_GPIO22 22 /* Unrouted */
216 #define U300_GPIO_PIN_GPIO23 23 /* Unrouted */
218 #define U300_GPIO_PIN_GPIO24 24 /* Unrouted */
219 #define U300_GPIO_PIN_GPIO25 25 /* Unrouted */
220 #define U300_GPIO_PIN_GPIO26 26 /* Unrouted */
221 #define U300_GPIO_PIN_GPIO27 27 /* Unrouted */
222 #define U300_GPIO_PIN_GPIO28 28 /* Unrouted */
223 #define U300_GPIO_PIN_GPIO29 29 /* Unrouted */
224 #define U300_GPIO_PIN_GPIO30 30 /* Unrouted */
225 #define U300_GPIO_PIN_GPIO31 31 /* Unrouted */
227 #define U300_GPIO_PIN_GPIO32 32 /* Unrouted */
228 #define U300_GPIO_PIN_GPIO33 33 /* Unrouted */
229 #define U300_GPIO_PIN_GPIO34 34 /* Unrouted */
230 #define U300_GPIO_PIN_GPIO35 35 /* Unrouted */
231 #define U300_GPIO_PIN_GPIO36 36 /* Unrouted */
232 #define U300_GPIO_PIN_GPIO37 37 /* Unrouted */
233 #define U300_GPIO_PIN_GPIO38 38 /* Unrouted */
234 #define U300_GPIO_PIN_GPIO39 39 /* Unrouted */
236 #ifdef CONFIG_MACH_U300_BS335
238 #define U300_GPIO_PIN_GPIO40 40 /* Unrouted */
239 #define U300_GPIO_PIN_GPIO41 41 /* Unrouted */
240 #define U300_GPIO_PIN_GPIO42 42 /* Unrouted */
241 #define U300_GPIO_PIN_GPIO43 43 /* Unrouted */
242 #define U300_GPIO_PIN_GPIO44 44 /* Unrouted */
243 #define U300_GPIO_PIN_GPIO45 45 /* Unrouted */
244 #define U300_GPIO_PIN_GPIO46 46 /* Unrouted */
245 #define U300_GPIO_PIN_GPIO47 47 /* Unrouted */
247 #define U300_GPIO_PIN_GPIO48 48 /* Unrouted */
248 #define U300_GPIO_PIN_GPIO49 49 /* Unrouted */
249 #define U300_GPIO_PIN_GPIO50 50 /* Unrouted */
250 #define U300_GPIO_PIN_GPIO51 51 /* Unrouted */
251 #define U300_GPIO_PIN_GPIO52 52 /* Unrouted */
252 #define U300_GPIO_PIN_GPIO53 53 /* Unrouted */
253 #define U300_GPIO_PIN_GPIO54 54 /* Unrouted */
254 #define U300_GPIO_PIN_GPIO55 55 /* Unrouted */
259 /* translates a pin number to a port number */
260 #define PIN_TO_PORT(val) (val >> 3)
262 /* These can be found in arch/arm/mach-u300/gpio.c */
263 extern int gpio_is_valid(int number);
264 extern int gpio_request(unsigned gpio, const char *label);
265 extern void gpio_free(unsigned gpio);
266 extern int gpio_direction_input(unsigned gpio);
267 extern int gpio_direction_output(unsigned gpio, int value);
268 extern int gpio_register_callback(unsigned gpio,
269 int (*func)(void *arg),
271 extern int gpio_unregister_callback(unsigned gpio);
272 extern void enable_irq_on_gpio_pin(unsigned gpio, int edge);
273 extern void disable_irq_on_gpio_pin(unsigned gpio);
274 extern void gpio_pullup(unsigned gpio, int value);
275 extern int gpio_get_value(unsigned gpio);
276 extern void gpio_set_value(unsigned gpio, int value);
278 #define gpio_get_value_cansleep gpio_get_value
279 #define gpio_set_value_cansleep gpio_set_value
281 /* wrappers to sleep-enable the previous two functions */
282 static inline unsigned gpio_to_irq(unsigned gpio)
284 return PIN_TO_PORT(gpio) + IRQ_U300_GPIO_PORT0;
286 #define gpio_to_irq gpio_to_irq
288 static inline unsigned irq_to_gpio(unsigned irq)
291 * FIXME: This is no 1-1 mapping at all, it points to the
292 * whole block of 8 pins.
294 return (irq - IRQ_U300_GPIO_PORT0) << 3;