arch/arm/dts/zynqmp.dtsi

   1 /*
   2  * dts file for Xilinx ZynqMP
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10 / {
  11         compatible = "xlnx,zynqmp";
  12         #address-cells = <2>;
  13         #size-cells = <2>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         compatible = "arm,cortex-a53", "arm,armv8";
  21                         device_type = "cpu";
  22                         enable-method = "psci";
  23                         reg = <0x0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         enable-method = "psci";
  30                         reg = <0x1>;
  31                 };
  32
  33                 cpu@2 {
  34                         compatible = "arm,cortex-a53", "arm,armv8";
  35                         device_type = "cpu";
  36                         enable-method = "psci";
  37                         reg = <0x2>;
  38                 };
  39
  40                 cpu@3 {
  41                         compatible = "arm,cortex-a53", "arm,armv8";
  42                         device_type = "cpu";
  43                         enable-method = "psci";
  44                         reg = <0x3>;
  45                 };
  46         };
  47
  48         dcc: dcc {
  49                 compatible = "arm,dcc";
  50                 status = "disabled";
  51                 u-boot,dm-pre-reloc;
  52         };
  53
  54         power-domains {
  55                 compatible = "xlnx,zynqmp-genpd";
  56
  57                 pd_usb0: pd-usb0 {
  58                         #power-domain-cells = <0x0>;
  59                         pd-id = <0x16>;
  60                 };
  61
  62                 pd_usb1: pd-usb1 {
  63                         #power-domain-cells = <0x0>;
  64                         pd-id = <0x17>;
  65                 };
  66
  67                 pd_sata: pd-sata {
  68                         #power-domain-cells = <0x0>;
  69                         pd-id = <0x1c>;
  70                 };
  71
  72                 pd_spi0: pd-spi0 {
  73                         #power-domain-cells = <0x0>;
  74                         pd-id = <0x23>;
  75                 };
  76
  77                 pd_spi1: pd-spi1 {
  78                         #power-domain-cells = <0x0>;
  79                         pd-id = <0x24>;
  80                 };
  81
  82                 pd_uart0: pd-uart0 {
  83                         #power-domain-cells = <0x0>;
  84                         pd-id = <0x21>;
  85                 };
  86
  87                 pd_uart1: pd-uart1 {
  88                         #power-domain-cells = <0x0>;
  89                         pd-id = <0x22>;
  90                 };
  91
  92                 pd_eth0: pd-eth0 {
  93                         #power-domain-cells = <0x0>;
  94                         pd-id = <0x1d>;
  95                 };
  96
  97                 pd_eth1: pd-eth1 {
  98                         #power-domain-cells = <0x0>;
  99                         pd-id = <0x1e>;
 100                 };
 101
 102                 pd_eth2: pd-eth2 {
 103                         #power-domain-cells = <0x0>;
 104                         pd-id = <0x1f>;
 105                 };
 106
 107                 pd_eth3: pd-eth3 {
 108                         #power-domain-cells = <0x0>;
 109                         pd-id = <0x20>;
 110                 };
 111
 112                 pd_i2c0: pd-i2c0 {
 113                         #power-domain-cells = <0x0>;
 114                         pd-id = <0x25>;
 115                 };
 116
 117                 pd_i2c1: pd-i2c1 {
 118                         #power-domain-cells = <0x0>;
 119                         pd-id = <0x26>;
 120                 };
 121
 122                 pd_dp: pd-dp {
 123                         /* fixme: what to attach to */
 124                         #power-domain-cells = <0x0>;
 125                         pd-id = <0x29>;
 126                 };
 127
 128                 pd_gdma: pd-gdma {
 129                         #power-domain-cells = <0x0>;
 130                         pd-id = <0x2a>;
 131                 };
 132
 133                 pd_adma: pd-adma {
 134                         #power-domain-cells = <0x0>;
 135                         pd-id = <0x2b>;
 136                 };
 137
 138                 pd_ttc0: pd-ttc0 {
 139                         #power-domain-cells = <0x0>;
 140                         pd-id = <0x18>;
 141                 };
 142
 143                 pd_ttc1: pd-ttc1 {
 144                         #power-domain-cells = <0x0>;
 145                         pd-id = <0x19>;
 146                 };
 147
 148                 pd_ttc2: pd-ttc2 {
 149                         #power-domain-cells = <0x0>;
 150                         pd-id = <0x1a>;
 151                 };
 152
 153                 pd_ttc3: pd-ttc3 {
 154                         #power-domain-cells = <0x0>;
 155                         pd-id = <0x1b>;
 156                 };
 157
 158                 pd_sd0: pd-sd0 {
 159                         #power-domain-cells = <0x0>;
 160                         pd-id = <0x27>;
 161                 };
 162
 163                 pd_sd1: pd-sd1 {
 164                         #power-domain-cells = <0x0>;
 165                         pd-id = <0x28>;
 166                 };
 167
 168                 pd_nand: pd-nand {
 169                         #power-domain-cells = <0x0>;
 170                         pd-id = <0x2c>;
 171                 };
 172
 173                 pd_qspi: pd-qspi {
 174                         #power-domain-cells = <0x0>;
 175                         pd-id = <0x2d>;
 176                 };
 177
 178                 pd_gpio: pd-gpio {
 179                         #power-domain-cells = <0x0>;
 180                         pd-id = <0x2e>;
 181                 };
 182
 183                 pd_can0: pd-can0 {
 184                         #power-domain-cells = <0x0>;
 185                         pd-id = <0x2f>;
 186                 };
 187
 188                 pd_can1: pd-can1 {
 189                         #power-domain-cells = <0x0>;
 190                         pd-id = <0x30>;
 191                 };
 192
 193                 pd_apll: pd-apll {
 194                         #power-domain-cells = <0x0>;
 195                         pd-id = <0x32>;
 196                 };
 197
 198                 pd_vpll: pd-vpll {
 199                         #power-domain-cells = <0x0>;
 200                         pd-id = <0x33>;
 201                 };
 202
 203                 pd_dpll: pd-dpll {
 204                         #power-domain-cells = <0x0>;
 205                         pd-id = <0x34>;
 206                 };
 207
 208                 pd_rpll: pd-rpll {
 209                         #power-domain-cells = <0x0>;
 210                         pd-id = <0x35>;
 211                 };
 212
 213                 pd_iopll: pd-iopll {
 214                         #power-domain-cells = <0x0>;
 215                         pd-id = <0x36>;
 216                 };
 217         };
 218
 219         pmu {
 220                 compatible = "arm,armv8-pmuv3";
 221                 interrupt-parent = <&gic>;
 222                 interrupts = <0 143 4>,
 223                              <0 144 4>,
 224                              <0 145 4>,
 225                              <0 146 4>;
 226         };
 227
 228         psci {
 229                 compatible = "arm,psci-0.2";
 230                 method = "smc";
 231         };
 232
 233         firmware {
 234                 compatible = "xlnx,zynqmp-pm";
 235                 method = "smc";
 236         };
 237
 238         timer {
 239                 compatible = "arm,armv8-timer";
 240                 interrupt-parent = <&gic>;
 241                 interrupts = <1 13 0xf01>,
 242                              <1 14 0xf01>,
 243                              <1 11 0xf01>,
 244                              <1 10 0xf01>;
 245         };
 246
 247         amba_apu: amba_apu@0 {
 248                 compatible = "simple-bus";
 249                 #address-cells = <2>;
 250                 #size-cells = <1>;
 251                 ranges = <0 0 0 0 0xffffffff>;
 252
 253                 gic: interrupt-controller@f9010000 {
 254                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
 255                         #interrupt-cells = <3>;
 256                         reg = <0x0 0xf9010000 0x10000>,
 257                               <0x0 0xf9020000 0x20000>,
 258                               <0x0 0xf9040000 0x20000>,
 259                               <0x0 0xf9060000 0x20000>;
 260                         interrupt-controller;
 261                         interrupt-parent = <&gic>;
 262                         interrupts = <1 9 0xf04>;
 263                 };
 264         };
 265
 266         amba: amba@0 {
 267                 compatible = "simple-bus";
 268                 u-boot,dm-pre-reloc;
 269                 #address-cells = <2>;
 270                 #size-cells = <1>;
 271                 ranges = <0 0 0 0 0xffffffff>;
 272
 273                 can0: can@ff060000 {
 274                         compatible = "xlnx,zynq-can-1.0";
 275                         status = "disabled";
 276                         clock-names = "can_clk", "pclk";
 277                         reg = <0x0 0xff060000 0x1000>;
 278                         interrupts = <0 23 4>;
 279                         interrupt-parent = <&gic>;
 280                         tx-fifo-depth = <0x40>;
 281                         rx-fifo-depth = <0x40>;
 282                         power-domains = <&pd_can0>;
 283                 };
 284
 285                 can1: can@ff070000 {
 286                         compatible = "xlnx,zynq-can-1.0";
 287                         status = "disabled";
 288                         clock-names = "can_clk", "pclk";
 289                         reg = <0x0 0xff070000 0x1000>;
 290                         interrupts = <0 24 4>;
 291                         interrupt-parent = <&gic>;
 292                         tx-fifo-depth = <0x40>;
 293                         rx-fifo-depth = <0x40>;
 294                         power-domains = <&pd_can1>;
 295                 };
 296
 297                 cci: cci@fd6e0000 {
 298                         compatible = "arm,cci-400";
 299                         reg = <0x0 0xfd6e0000 0x9000>;
 300                         ranges = <0x0 0x0 0xfd6e0000 0x10000>;
 301                         #address-cells = <1>;
 302                         #size-cells = <1>;
 303
 304                         pmu@9000 {
 305                                 compatible = "arm,cci-400-pmu,r1";
 306                                 reg = <0x9000 0x5000>;
 307                                 interrupt-parent = <&gic>;
 308                                 interrupts = <0 123 4>,
 309                                              <0 123 4>,
 310                                              <0 123 4>,
 311                                              <0 123 4>,
 312                                              <0 123 4>;
 313                         };
 314                 };
 315
 316                 /* GDMA */
 317                 fpd_dma_chan1: dma@fd500000 {
 318                         status = "disabled";
 319                         compatible = "xlnx,zynqmp-dma-1.0";
 320                         reg = <0x0 0xfd500000 0x1000>;
 321                         interrupt-parent = <&gic>;
 322                         interrupts = <0 124 4>;
 323                         clock-names = "clk_main", "clk_apb";
 324                         xlnx,id = <0>;
 325                         xlnx,bus-width = <128>;
 326                         power-domains = <&pd_gdma>;
 327                 };
 328
 329                 fpd_dma_chan2: dma@fd510000 {
 330                         status = "disabled";
 331                         compatible = "xlnx,zynqmp-dma-1.0";
 332                         reg = <0x0 0xfd510000 0x1000>;
 333                         interrupt-parent = <&gic>;
 334                         interrupts = <0 125 4>;
 335                         clock-names = "clk_main", "clk_apb";
 336                         xlnx,id = <1>;
 337                         xlnx,bus-width = <128>;
 338                         power-domains = <&pd_gdma>;
 339                 };
 340
 341                 fpd_dma_chan3: dma@fd520000 {
 342                         status = "disabled";
 343                         compatible = "xlnx,zynqmp-dma-1.0";
 344                         reg = <0x0 0xfd520000 0x1000>;
 345                         interrupt-parent = <&gic>;
 346                         interrupts = <0 126 4>;
 347                         clock-names = "clk_main", "clk_apb";
 348                         xlnx,id = <2>;
 349                         xlnx,bus-width = <128>;
 350                         power-domains = <&pd_gdma>;
 351                 };
 352
 353                 fpd_dma_chan4: dma@fd530000 {
 354                         status = "disabled";
 355                         compatible = "xlnx,zynqmp-dma-1.0";
 356                         reg = <0x0 0xfd530000 0x1000>;
 357                         interrupt-parent = <&gic>;
 358                         interrupts = <0 127 4>;
 359                         clock-names = "clk_main", "clk_apb";
 360                         xlnx,id = <3>;
 361                         xlnx,bus-width = <128>;
 362                         power-domains = <&pd_gdma>;
 363                 };
 364
 365                 fpd_dma_chan5: dma@fd540000 {
 366                         status = "disabled";
 367                         compatible = "xlnx,zynqmp-dma-1.0";
 368                         reg = <0x0 0xfd540000 0x1000>;
 369                         interrupt-parent = <&gic>;
 370                         interrupts = <0 128 4>;
 371                         clock-names = "clk_main", "clk_apb";
 372                         xlnx,id = <4>;
 373                         xlnx,bus-width = <128>;
 374                         power-domains = <&pd_gdma>;
 375                 };
 376
 377                 fpd_dma_chan6: dma@fd550000 {
 378                         status = "disabled";
 379                         compatible = "xlnx,zynqmp-dma-1.0";
 380                         reg = <0x0 0xfd550000 0x1000>;
 381                         interrupt-parent = <&gic>;
 382                         interrupts = <0 129 4>;
 383                         clock-names = "clk_main", "clk_apb";
 384                         xlnx,id = <5>;
 385                         xlnx,bus-width = <128>;
 386                         power-domains = <&pd_gdma>;
 387                 };
 388
 389                 fpd_dma_chan7: dma@fd560000 {
 390                         status = "disabled";
 391                         compatible = "xlnx,zynqmp-dma-1.0";
 392                         reg = <0x0 0xfd560000 0x1000>;
 393                         interrupt-parent = <&gic>;
 394                         interrupts = <0 130 4>;
 395                         clock-names = "clk_main", "clk_apb";
 396                         xlnx,id = <6>;
 397                         xlnx,bus-width = <128>;
 398                         power-domains = <&pd_gdma>;
 399                 };
 400
 401                 fpd_dma_chan8: dma@fd570000 {
 402                         status = "disabled";
 403                         compatible = "xlnx,zynqmp-dma-1.0";
 404                         reg = <0x0 0xfd570000 0x1000>;
 405                         interrupt-parent = <&gic>;
 406                         interrupts = <0 131 4>;
 407                         clock-names = "clk_main", "clk_apb";
 408                         xlnx,id = <7>;
 409                         xlnx,bus-width = <128>;
 410                         power-domains = <&pd_gdma>;
 411                 };
 412
 413                 gpu: gpu@fd4b0000 {
 414                         status = "disabled";
 415                         compatible = "arm,mali-400", "arm,mali-utgard";
 416                         reg = <0x0 0xfd4b0000 0x30000>;
 417                         interrupt-parent = <&gic>;
 418                         interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
 419                         interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
 420                 };
 421
 422                 /* ADMA */
 423                 lpd_dma_chan1: dma@ffa80000 {
 424                         status = "disabled";
 425                         compatible = "xlnx,zynqmp-dma-1.0";
 426                         reg = <0x0 0xffa80000 0x1000>;
 427                         interrupt-parent = <&gic>;
 428                         interrupts = <0 77 4>;
 429                         xlnx,id = <0>;
 430                         xlnx,bus-width = <64>;
 431                         power-domains = <&pd_adma>;
 432                 };
 433
 434                 lpd_dma_chan2: dma@ffa90000 {
 435                         status = "disabled";
 436                         compatible = "xlnx,zynqmp-dma-1.0";
 437                         reg = <0x0 0xffa90000 0x1000>;
 438                         interrupt-parent = <&gic>;
 439                         interrupts = <0 78 4>;
 440                         xlnx,id = <1>;
 441                         xlnx,bus-width = <64>;
 442                         power-domains = <&pd_adma>;
 443                 };
 444
 445                 lpd_dma_chan3: dma@ffaa0000 {
 446                         status = "disabled";
 447                         compatible = "xlnx,zynqmp-dma-1.0";
 448                         reg = <0x0 0xffaa0000 0x1000>;
 449                         interrupt-parent = <&gic>;
 450                         interrupts = <0 79 4>;
 451                         xlnx,id = <2>;
 452                         xlnx,bus-width = <64>;
 453                         power-domains = <&pd_adma>;
 454                 };
 455
 456                 lpd_dma_chan4: dma@ffab0000 {
 457                         status = "disabled";
 458                         compatible = "xlnx,zynqmp-dma-1.0";
 459                         reg = <0x0 0xffab0000 0x1000>;
 460                         interrupt-parent = <&gic>;
 461                         interrupts = <0 80 4>;
 462                         xlnx,id = <3>;
 463                         xlnx,bus-width = <64>;
 464                         power-domains = <&pd_adma>;
 465                 };
 466
 467                 lpd_dma_chan5: dma@ffac0000 {
 468                         status = "disabled";
 469                         compatible = "xlnx,zynqmp-dma-1.0";
 470                         reg = <0x0 0xffac0000 0x1000>;
 471                         interrupt-parent = <&gic>;
 472                         interrupts = <0 81 4>;
 473                         xlnx,id = <4>;
 474                         xlnx,bus-width = <64>;
 475                         power-domains = <&pd_adma>;
 476                 };
 477
 478                 lpd_dma_chan6: dma@ffad0000 {
 479                         status = "disabled";
 480                         compatible = "xlnx,zynqmp-dma-1.0";
 481                         reg = <0x0 0xffad0000 0x1000>;
 482                         interrupt-parent = <&gic>;
 483                         interrupts = <0 82 4>;
 484                         xlnx,id = <5>;
 485                         xlnx,bus-width = <64>;
 486                         power-domains = <&pd_adma>;
 487                 };
 488
 489                 lpd_dma_chan7: dma@ffae0000 {
 490                         status = "disabled";
 491                         compatible = "xlnx,zynqmp-dma-1.0";
 492                         reg = <0x0 0xffae0000 0x1000>;
 493                         interrupt-parent = <&gic>;
 494                         interrupts = <0 83 4>;
 495                         xlnx,id = <6>;
 496                         xlnx,bus-width = <64>;
 497                         power-domains = <&pd_adma>;
 498                 };
 499
 500                 lpd_dma_chan8: dma@ffaf0000 {
 501                         status = "disabled";
 502                         compatible = "xlnx,zynqmp-dma-1.0";
 503                         reg = <0x0 0xffaf0000 0x1000>;
 504                         interrupt-parent = <&gic>;
 505                         interrupts = <0 84 4>;
 506                         xlnx,id = <7>;
 507                         xlnx,bus-width = <64>;
 508                         power-domains = <&pd_adma>;
 509                 };
 510
 511                 mc: memory-controller@fd070000 {
 512                         compatible = "xlnx,zynqmp-ddrc-2.40a";
 513                         reg = <0x0 0xfd070000 0x30000>;
 514                         interrupt-parent = <&gic>;
 515                         interrupts = <0 112 4>;
 516                 };
 517
 518                 nand0: nand@ff100000 {
 519                         compatible = "arasan,nfc-v3p10";
 520                         status = "disabled";
 521                         reg = <0x0 0xff100000 0x1000>;
 522                         clock-names = "clk_sys", "clk_flash";
 523                         interrupt-parent = <&gic>;
 524                         interrupts = <0 14 4>;
 525                         #address-cells = <2>;
 526                         #size-cells = <1>;
 527                         power-domains = <&pd_nand>;
 528                 };
 529
 530                 gem0: ethernet@ff0b0000 {
 531                         compatible = "cdns,zynqmp-gem";
 532                         status = "disabled";
 533                         interrupt-parent = <&gic>;
 534                         interrupts = <0 57 4>, <0 57 4>;
 535                         reg = <0x0 0xff0b0000 0x1000>;
 536                         clock-names = "pclk", "hclk", "tx_clk";
 537                         #address-cells = <1>;
 538                         #size-cells = <0>;
 539                         #stream-id-cells = <1>;
 540                         power-domains = <&pd_eth0>;
 541                 };
 542
 543                 gem1: ethernet@ff0c0000 {
 544                         compatible = "cdns,zynqmp-gem";
 545                         status = "disabled";
 546                         interrupt-parent = <&gic>;
 547                         interrupts = <0 59 4>, <0 59 4>;
 548                         reg = <0x0 0xff0c0000 0x1000>;
 549                         clock-names = "pclk", "hclk", "tx_clk";
 550                         #address-cells = <1>;
 551                         #size-cells = <0>;
 552                         #stream-id-cells = <1>;
 553                         power-domains = <&pd_eth1>;
 554                 };
 555
 556                 gem2: ethernet@ff0d0000 {
 557                         compatible = "cdns,zynqmp-gem";
 558                         status = "disabled";
 559                         interrupt-parent = <&gic>;
 560                         interrupts = <0 61 4>, <0 61 4>;
 561                         reg = <0x0 0xff0d0000 0x1000>;
 562                         clock-names = "pclk", "hclk", "tx_clk";
 563                         #address-cells = <1>;
 564                         #size-cells = <0>;
 565                         #stream-id-cells = <1>;
 566                         power-domains = <&pd_eth2>;
 567                 };
 568
 569                 gem3: ethernet@ff0e0000 {
 570                         compatible = "cdns,zynqmp-gem";
 571                         status = "disabled";
 572                         interrupt-parent = <&gic>;
 573                         interrupts = <0 63 4>, <0 63 4>;
 574                         reg = <0x0 0xff0e0000 0x1000>;
 575                         clock-names = "pclk", "hclk", "tx_clk";
 576                         #address-cells = <1>;
 577                         #size-cells = <0>;
 578                         #stream-id-cells = <1>;
 579                         power-domains = <&pd_eth3>;
 580                 };
 581
 582                 gpio: gpio@ff0a0000 {
 583                         compatible = "xlnx,zynqmp-gpio-1.0";
 584                         status = "disabled";
 585                         #gpio-cells = <0x2>;
 586                         #interrupt-cells = <2>;
 587                         interrupt-controller;
 588                         interrupt-parent = <&gic>;
 589                         interrupts = <0 16 4>;
 590                         reg = <0x0 0xff0a0000 0x1000>;
 591                         power-domains = <&pd_gpio>;
 592                 };
 593
 594                 i2c0: i2c@ff020000 {
 595                         compatible = "cdns,i2c-r1p10";
 596                         status = "disabled";
 597                         interrupt-parent = <&gic>;
 598                         interrupts = <0 17 4>;
 599                         reg = <0x0 0xff020000 0x1000>;
 600                         #address-cells = <1>;
 601                         #size-cells = <0>;
 602                         power-domains = <&pd_i2c0>;
 603                 };
 604
 605                 i2c1: i2c@ff030000 {
 606                         compatible = "cdns,i2c-r1p10";
 607                         status = "disabled";
 608                         interrupt-parent = <&gic>;
 609                         interrupts = <0 18 4>;
 610                         reg = <0x0 0xff030000 0x1000>;
 611                         #address-cells = <1>;
 612                         #size-cells = <0>;
 613                         power-domains = <&pd_i2c1>;
 614                 };
 615
 616                 pcie: pcie@fd0e0000 {
 617                         compatible = "xlnx,nwl-pcie-2.11";
 618                         status = "disabled";
 619                         #address-cells = <3>;
 620                         #size-cells = <2>;
 621                         #interrupt-cells = <1>;
 622                         device_type = "pci";
 623                         interrupt-parent = <&gic>;
 624                         interrupts = <0 118 4>,
 625                                      <0 116 4>,
 626                                      <0 115 4>, /* MSI_1 [63...32] */
 627                                      <0 114 4>; /* MSI_0 [31...0] */
 628                         interrupt-names = "misc", "intx", "msi_1", "msi_0";
 629                         reg = <0x0 0xfd0e0000 0x1000>,
 630                               <0x0 0xfd480000 0x1000>,
 631                               <0x0 0xe0000000 0x1000000>;
 632                         reg-names = "breg", "pcireg", "cfg";
 633                         ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
 634                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 635                         interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
 636                                         <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
 637                                         <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
 638                                         <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
 639                         pcie_intc: legacy-interrupt-controller {
 640                                 interrupt-controller;
 641                                 #address-cells = <0>;
 642                                 #interrupt-cells = <1>;
 643                         };
 644                 };
 645
 646                 qspi: spi@ff0f0000 {
 647                         compatible = "xlnx,zynqmp-qspi-1.0";
 648                         status = "disabled";
 649                         clock-names = "ref_clk", "pclk";
 650                         interrupts = <0 15 4>;
 651                         interrupt-parent = <&gic>;
 652                         num-cs = <1>;
 653                         reg = <0x0 0xff0f0000 0x1000>,
 654                               <0x0 0xc0000000 0x8000000>;
 655                         #address-cells = <1>;
 656                         #size-cells = <0>;
 657                         power-domains = <&pd_qspi>;
 658                 };
 659
 660                 rtc: rtc@ffa60000 {
 661                         compatible = "xlnx,zynqmp-rtc";
 662                         status = "disabled";
 663                         reg = <0x0 0xffa60000 0x100>;
 664                         interrupt-parent = <&gic>;
 665                         interrupts = <0 26 4>, <0 27 4>;
 666                         interrupt-names = "alarm", "sec";
 667                 };
 668
 669                 sata: ahci@fd0c0000 {
 670                         compatible = "ceva,ahci-1v84";
 671                         status = "disabled";
 672                         reg = <0x0 0xfd0c0000 0x2000>;
 673                         interrupt-parent = <&gic>;
 674                         interrupts = <0 133 4>;
 675                         power-domains = <&pd_sata>;
 676                 };
 677
 678                 sdhci0: sdhci@ff160000 {
 679                         u-boot,dm-pre-reloc;
 680                         compatible = "arasan,sdhci-8.9a";
 681                         status = "disabled";
 682                         interrupt-parent = <&gic>;
 683                         interrupts = <0 48 4>;
 684                         reg = <0x0 0xff160000 0x1000>;
 685                         clock-names = "clk_xin", "clk_ahb";
 686                         broken-tuning;
 687                         power-domains = <&pd_sd0>;
 688                 };
 689
 690                 sdhci1: sdhci@ff170000 {
 691                         u-boot,dm-pre-reloc;
 692                         compatible = "arasan,sdhci-8.9a";
 693                         status = "disabled";
 694                         interrupt-parent = <&gic>;
 695                         interrupts = <0 49 4>;
 696                         reg = <0x0 0xff170000 0x1000>;
 697                         clock-names = "clk_xin", "clk_ahb";
 698                         broken-tuning;
 699                         power-domains = <&pd_sd1>;
 700                 };
 701
 702                 smmu: smmu@fd800000 {
 703                         compatible = "arm,mmu-500";
 704                         reg = <0x0 0xfd800000 0x20000>;
 705                         #global-interrupts = <1>;
 706                         interrupt-parent = <&gic>;
 707                         interrupts = <0 155 4>,
 708                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 709                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 710                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 711                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 712                         mmu-masters = < &gem0 0x874
 713                                         &gem1 0x875
 714                                         &gem2 0x876
 715                                         &gem3 0x877 >;
 716                 };
 717
 718                 spi0: spi@ff040000 {
 719                         compatible = "cdns,spi-r1p6";
 720                         status = "disabled";
 721                         interrupt-parent = <&gic>;
 722                         interrupts = <0 19 4>;
 723                         reg = <0x0 0xff040000 0x1000>;
 724                         clock-names = "ref_clk", "pclk";
 725                         #address-cells = <1>;
 726                         #size-cells = <0>;
 727                         power-domains = <&pd_spi0>;
 728                 };
 729
 730                 spi1: spi@ff050000 {
 731                         compatible = "cdns,spi-r1p6";
 732                         status = "disabled";
 733                         interrupt-parent = <&gic>;
 734                         interrupts = <0 20 4>;
 735                         reg = <0x0 0xff050000 0x1000>;
 736                         clock-names = "ref_clk", "pclk";
 737                         #address-cells = <1>;
 738                         #size-cells = <0>;
 739                         power-domains = <&pd_spi1>;
 740                 };
 741
 742                 ttc0: timer@ff110000 {
 743                         compatible = "cdns,ttc";
 744                         status = "disabled";
 745                         interrupt-parent = <&gic>;
 746                         interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
 747                         reg = <0x0 0xff110000 0x1000>;
 748                         timer-width = <32>;
 749                         power-domains = <&pd_ttc0>;
 750                 };
 751
 752                 ttc1: timer@ff120000 {
 753                         compatible = "cdns,ttc";
 754                         status = "disabled";
 755                         interrupt-parent = <&gic>;
 756                         interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
 757                         reg = <0x0 0xff120000 0x1000>;
 758                         timer-width = <32>;
 759                         power-domains = <&pd_ttc1>;
 760                 };
 761
 762                 ttc2: timer@ff130000 {
 763                         compatible = "cdns,ttc";
 764                         status = "disabled";
 765                         interrupt-parent = <&gic>;
 766                         interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
 767                         reg = <0x0 0xff130000 0x1000>;
 768                         timer-width = <32>;
 769                         power-domains = <&pd_ttc2>;
 770                 };
 771
 772                 ttc3: timer@ff140000 {
 773                         compatible = "cdns,ttc";
 774                         status = "disabled";
 775                         interrupt-parent = <&gic>;
 776                         interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
 777                         reg = <0x0 0xff140000 0x1000>;
 778                         timer-width = <32>;
 779                         power-domains = <&pd_ttc3>;
 780                 };
 781
 782                 uart0: serial@ff000000 {
 783                         u-boot,dm-pre-reloc;
 784                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 785                         status = "disabled";
 786                         interrupt-parent = <&gic>;
 787                         interrupts = <0 21 4>;
 788                         reg = <0x0 0xff000000 0x1000>;
 789                         clock-names = "uart_clk", "pclk";
 790                         power-domains = <&pd_uart0>;
 791                 };
 792
 793                 uart1: serial@ff010000 {
 794                         u-boot,dm-pre-reloc;
 795                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 796                         status = "disabled";
 797                         interrupt-parent = <&gic>;
 798                         interrupts = <0 22 4>;
 799                         reg = <0x0 0xff010000 0x1000>;
 800                         clock-names = "uart_clk", "pclk";
 801                         power-domains = <&pd_uart1>;
 802                 };
 803
 804                 usb0: usb0 {
 805                         #address-cells = <2>;
 806                         #size-cells = <1>;
 807                         status = "disabled";
 808                         compatible = "xlnx,zynqmp-dwc3";
 809                         clock-names = "bus_clk", "ref_clk";
 810                         clocks = <&clk125>, <&clk125>;
 811                         power-domains = <&pd_usb0>;
 812                         ranges;
 813
 814                         dwc3_0: dwc3@fe200000 {
 815                                 compatible = "snps,dwc3";
 816                                 status = "disabled";
 817                                 reg = <0x0 0xfe200000 0x40000>;
 818                                 interrupt-parent = <&gic>;
 819                                 interrupts = <0 65 4>;
 820                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 821                                 snps,refclk_fladj;
 822                         };
 823                 };
 824
 825                 usb1: usb1 {
 826                         #address-cells = <2>;
 827                         #size-cells = <1>;
 828                         status = "disabled";
 829                         compatible = "xlnx,zynqmp-dwc3";
 830                         clock-names = "bus_clk", "ref_clk";
 831                         clocks = <&clk125>, <&clk125>;
 832                         power-domains = <&pd_usb1>;
 833                         ranges;
 834
 835                         dwc3_1: dwc3@fe300000 {
 836                                 compatible = "snps,dwc3";
 837                                 status = "disabled";
 838                                 reg = <0x0 0xfe300000 0x40000>;
 839                                 interrupt-parent = <&gic>;
 840                                 interrupts = <0 70 4>;
 841                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 842                                 snps,refclk_fladj;
 843                         };
 844                 };
 845
 846                 watchdog0: watchdog@fd4d0000 {
 847                         compatible = "cdns,wdt-r1p2";
 848                         status = "disabled";
 849                         interrupt-parent = <&gic>;
 850                         interrupts = <0 113 1>;
 851                         reg = <0x0 0xfd4d0000 0x1000>;
 852                         timeout-sec = <10>;
 853                 };
 854
 855                 xilinx_drm: xilinx_drm {
 856                         compatible = "xlnx,drm";
 857                         status = "disabled";
 858                         xlnx,encoder-slave = <&xlnx_dp>;
 859                         xlnx,connector-type = "DisplayPort";
 860                         xlnx,dp-sub = <&xlnx_dp_sub>;
 861                         planes {
 862                                 xlnx,pixel-format = "rgb565";
 863                                 plane0 {
 864                                         dmas = <&xlnx_dpdma 3>;
 865                                         dma-names = "dma";
 866                                 };
 867                                 plane1 {
 868                                         dmas = <&xlnx_dpdma 0>;
 869                                         dma-names = "dma";
 870                                 };
 871                         };
 872                 };
 873
 874                 xlnx_dp: dp@fd4a0000 {
 875                         compatible = "xlnx,v-dp";
 876                         status = "disabled";
 877                         reg = <0x0 0xfd4a0000 0x1000>,
 878                               <0x0 0xfd400000 0x20000>;
 879                         interrupts = <0 119 4>;
 880                         interrupt-parent = <&gic>;
 881                         clock-names = "aclk", "aud_clk";
 882                         xlnx,dp-version = "v1.2";
 883                         xlnx,max-lanes = <2>;
 884                         xlnx,max-link-rate = <540000>;
 885                         xlnx,max-bpc = <16>;
 886                         xlnx,enable-ycrcb;
 887                         xlnx,colormetry = "rgb";
 888                         xlnx,bpc = <8>;
 889                         xlnx,audio-chan = <2>;
 890                         xlnx,dp-sub = <&xlnx_dp_sub>;
 891                         xlnx,max-pclock-frequency = <300000>;
 892                 };
 893
 894                 xlnx_dp_snd_card: dp_snd_card {
 895                         compatible = "xlnx,dp-snd-card";
 896                         status = "disabled";
 897                         xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
 898                         xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
 899                 };
 900
 901                 xlnx_dp_snd_codec0: dp_snd_codec0 {
 902                         compatible = "xlnx,dp-snd-codec";
 903                         status = "disabled";
 904                         clock-names = "aud_clk";
 905                 };
 906
 907                 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
 908                         compatible = "xlnx,dp-snd-pcm";
 909                         status = "disabled";
 910                         dmas = <&xlnx_dpdma 4>;
 911                         dma-names = "tx";
 912                 };
 913
 914                 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
 915                         compatible = "xlnx,dp-snd-pcm";
 916                         status = "disabled";
 917                         dmas = <&xlnx_dpdma 5>;
 918                         dma-names = "tx";
 919                 };
 920
 921                 xlnx_dp_sub: dp_sub@fd4aa000 {
 922                         compatible = "xlnx,dp-sub";
 923                         status = "disabled";
 924                         reg = <0x0 0xfd4aa000 0x1000>,
 925                               <0x0 0xfd4ab000 0x1000>,
 926                               <0x0 0xfd4ac000 0x1000>;
 927                         reg-names = "blend", "av_buf", "aud";
 928                         xlnx,output-fmt = "rgb";
 929                         xlnx,vid-fmt = "yuyv";
 930                         xlnx,gfx-fmt = "rgb565";
 931                 };
 932
 933                 xlnx_dpdma: dma@fd4c0000 {
 934                         compatible = "xlnx,dpdma";
 935                         status = "disabled";
 936                         reg = <0x0 0xfd4c0000 0x1000>;
 937                         interrupts = <0 122 4>;
 938                         interrupt-parent = <&gic>;
 939                         clock-names = "axi_clk";
 940                         dma-channels = <6>;
 941                         #dma-cells = <1>;
 942                         dma-video0channel {
 943                                 compatible = "xlnx,video0";
 944                         };
 945                         dma-video1channel {
 946                                 compatible = "xlnx,video1";
 947                         };
 948                         dma-video2channel {
 949                                 compatible = "xlnx,video2";
 950                         };
 951                         dma-graphicschannel {
 952                                 compatible = "xlnx,graphics";
 953                         };
 954                         dma-audio0channel {
 955                                 compatible = "xlnx,audio0";
 956                         };
 957                         dma-audio1channel {
 958                                 compatible = "xlnx,audio1";
 959                         };
 960                 };
 961         };
 962 };