rockchip: rk3399: Drop ethernet0 alias from SoC u-boot.dtsi
[pandora-u-boot.git] / arch / arm / dts / rk3399-u-boot.dtsi
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
4  */
5 #include "rockchip-u-boot.dtsi"
6
7 / {
8         aliases {
9                 mmc0 = &sdhci;
10                 mmc1 = &sdmmc;
11                 pci0 = &pcie0;
12                 spi1 = &spi1;
13         };
14
15         chosen {
16                 u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
17         };
18
19         pmusgrf: syscon@ff330000 {
20                 compatible = "rockchip,rk3399-pmusgrf", "syscon";
21                 reg = <0x0 0xff330000 0x0 0xe3d4>;
22                 bootph-all;
23         };
24
25         cic: syscon@ff620000 {
26                 compatible = "rockchip,rk3399-cic", "syscon";
27                 reg = <0x0 0xff620000 0x0 0x100>;
28                 bootph-all;
29         };
30 };
31
32 #if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
33 &binman {
34         multiple-images;
35         rom {
36                 filename = "u-boot.rom";
37                 size = <0x400000>;
38                 pad-byte = <0xff>;
39
40                 mkimage {
41                         args = "-n rk3399 -T rkspi";
42                         u-boot-spl {
43                         };
44                 };
45                 u-boot-img {
46                         offset = <0x40000>;
47                 };
48                 u-boot {
49                         offset = <0x300000>;
50                 };
51                 fdtmap {
52                 };
53         };
54 };
55 #endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
56
57 &cru {
58         bootph-all;
59 };
60
61 &dfi {
62         bootph-all;
63 };
64
65 &dmc {
66         reg = <0x0 0xffa80000 0x0 0x0800
67                0x0 0xffa80800 0x0 0x1800
68                0x0 0xffa82000 0x0 0x2000
69                0x0 0xffa84000 0x0 0x1000
70                0x0 0xffa88000 0x0 0x0800
71                0x0 0xffa88800 0x0 0x1800
72                0x0 0xffa8a000 0x0 0x2000
73                0x0 0xffa8c000 0x0 0x1000>;
74         bootph-all;
75         status = "okay";
76 };
77
78 &emmc_phy {
79         bootph-pre-ram;
80         bootph-some-ram;
81 };
82
83 &grf {
84         bootph-all;
85 };
86
87 &pcfg_pull_none {
88         bootph-all;
89 };
90
91 &pcfg_pull_up {
92         bootph-all;
93 };
94
95 &pinctrl {
96         bootph-all;
97 };
98
99 &pmu {
100         bootph-all;
101 };
102
103 &pmucru {
104         bootph-all;
105 };
106
107 &pmugrf {
108         bootph-all;
109 };
110
111 &sdhci {
112         bootph-pre-ram;
113         bootph-some-ram;
114         max-frequency = <200000000>;
115
116         /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
117         u-boot,spl-fifo-mode;
118 };
119
120 &sdmmc {
121         bootph-pre-ram;
122         bootph-some-ram;
123
124         /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
125         u-boot,spl-fifo-mode;
126 };
127
128 &sdmmc_bus4 {
129         bootph-pre-ram;
130         bootph-some-ram;
131 };
132
133 &sdmmc_cd {
134         bootph-pre-ram;
135         bootph-some-ram;
136 };
137
138 &sdmmc_clk {
139         bootph-pre-ram;
140         bootph-some-ram;
141 };
142
143 &sdmmc_cmd {
144         bootph-pre-ram;
145         bootph-some-ram;
146 };
147
148 &spi1_clk {
149         bootph-pre-ram;
150         bootph-some-ram;
151 };
152
153 &spi1_cs0 {
154         bootph-pre-ram;
155         bootph-some-ram;
156 };
157
158 &spi1_rx {
159         bootph-pre-ram;
160         bootph-some-ram;
161 };
162
163 &spi1_tx {
164         bootph-pre-ram;
165         bootph-some-ram;
166 };
167
168 &uart2 {
169         bootph-all;
170         clock-frequency = <24000000>;
171 };
172
173 &uart2c_xfer {
174         bootph-pre-sram;
175         bootph-pre-ram;
176 };
177
178 &vopb {
179         bootph-some-ram;
180 };
181
182 &vopl {
183         bootph-some-ram;
184 };
185
186 &xin24m {
187         bootph-all;
188 };