1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
14 bool "Enable support for CRC32 instruction"
15 depends on ARM64 && CC_IS_GCC
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
70 depends on INIT_SP_RELATIVE
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
78 config SPL_SYS_NO_VECTOR_TABLE
82 config SPL_USE_SEPARATE_FAULT_HANDLERS
83 bool "Use separate fault handlers instead of a single common one"
84 depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M
86 Instead of a common fault handler, generate a separate one for
87 undefined_instruction, software_interrupt, prefetch_abort etc.
88 This is for debugging purposes, when you want to set breakpoints
91 config LINUX_KERNEL_IMAGE_HEADER
95 Place a Linux kernel image header at the start of the U-Boot binary.
96 The format of the header is described in the Linux kernel source at
97 Documentation/arm64/booting.txt. This feature is useful since the
98 image header reports the amount of memory (BSS and similar) that
99 U-Boot needs to use, but which isn't part of the binary.
101 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
102 depends on LINUX_KERNEL_IMAGE_HEADER
105 The value subtracted from CONFIG_TEXT_BASE to calculate the
106 TEXT_OFFSET value written to the Linux kernel image header.
118 ARM GICV3 Interrupt translation service (ITS).
119 Basic support for programming locality specific peripheral
120 interrupts (LPI) configuration tables and enable LPI tables.
121 LPI configuration table can be used by u-boot or Linux.
122 ARM GICV3 has limitation, once the LPI table is enabled, LPI
123 configuration table can not be re-programmed, unless GICV3 reset.
129 config DMA_ADDR_T_64BIT
139 config GPIO_EXTRA_HEADER
142 # Used for compatibility with asm files copied from the kernel
143 config ARM_ASM_UNIFIED
147 # Used for compatibility with asm files copied from the kernel
151 config SYS_ICACHE_OFF
152 bool "Do not enable icache"
154 Do not enable instruction cache in U-Boot.
156 config SPL_SYS_ICACHE_OFF
157 bool "Do not enable icache in SPL"
159 default SYS_ICACHE_OFF
161 Do not enable instruction cache in SPL.
163 config SYS_DCACHE_OFF
164 bool "Do not enable dcache"
166 Do not enable data cache in U-Boot.
168 config SPL_SYS_DCACHE_OFF
169 bool "Do not enable dcache in SPL"
171 default SYS_DCACHE_OFF
173 Do not enable data cache in SPL.
175 config SYS_ARM_CACHE_CP15
176 bool "CP15 based cache enabling support"
178 Select this if your processor suports enabling caches by using
182 bool "MMU-based Paged Memory Management Support"
183 select SYS_ARM_CACHE_CP15
185 Select if you want MMU-based virtualised addressing space
186 support via paged memory management.
189 bool 'Use the ARM v7 PMSA Compliant MPU'
191 Some ARM systems without an MMU have instead a Memory Protection
192 Unit (MPU) that defines the type and permissions for regions of
194 If your CPU has an MPU then you should choose 'y' here unless you
195 know that you do not want to use the MPU.
197 # If set, the workarounds for these ARM errata are applied early during U-Boot
198 # startup. Note that in general these options force the workarounds to be
199 # applied; no CPU-type/version detection exists, unlike the similar options in
200 # the Linux kernel. Do not set these options unless they apply! Also note that
201 # the following can be machine-specific errata. These do have ability to
202 # provide rudimentary version and machine-specific checks, but expect no
204 # CONFIG_ARM_ERRATA_430973
205 # CONFIG_ARM_ERRATA_454179
206 # CONFIG_ARM_ERRATA_621766
207 # CONFIG_ARM_ERRATA_798870
208 # CONFIG_ARM_ERRATA_801819
209 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
210 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
212 config ARM_ERRATA_430973
215 config ARM_ERRATA_454179
218 config ARM_ERRATA_621766
221 config ARM_ERRATA_716044
224 config ARM_ERRATA_725233
227 config ARM_ERRATA_742230
230 config ARM_ERRATA_743622
233 config ARM_ERRATA_751472
236 config ARM_ERRATA_761320
239 config ARM_ERRATA_773022
242 config ARM_ERRATA_774769
245 config ARM_ERRATA_794072
248 config ARM_ERRATA_798870
251 config ARM_ERRATA_801819
254 config ARM_ERRATA_826974
257 config ARM_ERRATA_828024
260 config ARM_ERRATA_829520
263 config ARM_ERRATA_833069
266 config ARM_ERRATA_833471
269 config ARM_ERRATA_845369
272 config ARM_ERRATA_852421
275 config ARM_ERRATA_852423
278 config ARM_ERRATA_855873
281 config ARM_CORTEX_A8_CVE_2017_5715
284 config ARM_CORTEX_A15_CVE_2017_5715
289 select SYS_CACHE_SHIFT_5
294 select SYS_CACHE_SHIFT_5
299 select SYS_CACHE_SHIFT_5
301 imply SPL_SEPARATE_BSS
305 select SYS_CACHE_SHIFT_5
310 select SYS_CACHE_SHIFT_5
312 imply SPL_SEPARATE_BSS
317 select SYS_CACHE_SHIFT_5
324 select SYS_CACHE_SHIFT_6
331 select SYS_CACHE_SHIFT_5
332 select SYS_THUMB_BUILD
338 select SYS_ARM_CACHE_CP15
340 select SYS_CACHE_SHIFT_6
343 default "arm720t" if CPU_ARM720T
344 default "arm920t" if CPU_ARM920T
345 default "arm926ejs" if CPU_ARM926EJS
346 default "arm946es" if CPU_ARM946ES
347 default "arm1136" if CPU_ARM1136
348 default "arm1176" if CPU_ARM1176
349 default "armv7" if CPU_V7A
350 default "armv7" if CPU_V7R
351 default "armv7m" if CPU_V7M
352 default "armv8" if ARM64
356 default 4 if CPU_ARM720T
357 default 4 if CPU_ARM920T
358 default 5 if CPU_ARM926EJS
359 default 5 if CPU_ARM946ES
360 default 6 if CPU_ARM1136
361 default 6 if CPU_ARM1176
368 prompt "Select the ARM data write cache policy"
369 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
370 default SYS_ARM_CACHE_WRITEBACK
372 config SYS_ARM_CACHE_WRITEBACK
373 bool "Write-back (WB)"
375 A write updates the cache only and marks the cache line as dirty.
376 External memory is updated only when the line is evicted or explicitly
379 config SYS_ARM_CACHE_WRITETHROUGH
380 bool "Write-through (WT)"
382 A write updates both the cache and the external memory system.
383 This does not mark the cache line as dirty.
385 config SYS_ARM_CACHE_WRITEALLOC
386 bool "Write allocation (WA)"
388 A cache line is allocated on a write miss. This means that executing a
389 store instruction on the processor might cause a burst read to occur.
390 There is a linefill to obtain the data for the cache line, before the
394 config ARCH_VERY_EARLY_INIT
397 config SPL_ARCH_VERY_EARLY_INIT
401 bool "Enable ARCH_CPU_INIT"
403 Some architectures require a call to arch_cpu_init().
404 Say Y here to enable it
406 config SYS_ARCH_TIMER
407 bool "ARM Generic Timer support"
408 depends on CPU_V7A || ARM64
411 The ARM Generic Timer (aka arch-timer) provides an architected
412 interface to a timer source on an SoC.
413 It is mandatory for ARMv8 implementation and widely available
417 bool "Support for ARM SMC Calling Convention (SMCCC)"
418 depends on CPU_V7A || ARM64
421 Say Y here if you want to enable ARM SMC Calling Convention.
422 This should be enabled if U-Boot needs to communicate with system
423 firmware (for example, PSCI) according to SMCCC.
425 config SYS_THUMB_BUILD
426 bool "Build U-Boot using the Thumb instruction set"
429 Use this flag to build U-Boot using the Thumb instruction set for
430 ARM architectures. Thumb instruction set provides better code
431 density. For ARM architectures that support Thumb2 this flag will
432 result in Thumb2 code generated by GCC.
434 config SPL_SYS_THUMB_BUILD
435 bool "Build SPL using the Thumb instruction set"
436 default y if SYS_THUMB_BUILD
437 depends on !ARM64 && SPL
439 Use this flag to build SPL using the Thumb instruction set for
440 ARM architectures. Thumb instruction set provides better code
441 density. For ARM architectures that support Thumb2 this flag will
442 result in Thumb2 code generated by GCC.
444 config TPL_SYS_THUMB_BUILD
445 bool "Build TPL using the Thumb instruction set"
446 default y if SYS_THUMB_BUILD
447 depends on TPL && !ARM64
449 Use this flag to build TPL using the Thumb instruction set for
450 ARM architectures. Thumb instruction set provides better code
451 density. For ARM architectures that support Thumb2 this flag will
452 result in Thumb2 code generated by GCC.
455 bool "ARM PL310 L2 cache controller"
457 Enable support for ARM PL310 L2 cache controller in U-Boot
459 config SPL_SYS_L2_PL310
460 bool "ARM PL310 L2 cache controller in SPL"
462 Enable support for ARM PL310 L2 cache controller in SPL
464 config SYS_L2CACHE_OFF
467 If SoC does not support L2CACHE or one does not want to enable
468 L2CACHE, choose this option.
470 config ENABLE_ARM_SOC_BOOT0_HOOK
471 bool "prepare BOOT0 header"
473 If the SoC's BOOT0 requires a header area filled with (magic)
474 values, then choose this option, and create a file included as
475 <asm/arch/boot0.h> which contains the required assembler code.
477 config USE_ARCH_MEMCPY
478 bool "Use an assembly optimized implementation of memcpy"
480 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
482 Enable the generation of an optimized version of memcpy.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
486 config SPL_USE_ARCH_MEMCPY
487 bool "Use an assembly optimized implementation of memcpy for SPL"
488 default y if USE_ARCH_MEMCPY
491 Enable the generation of an optimized version of memcpy.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
495 config TPL_USE_ARCH_MEMCPY
496 bool "Use an assembly optimized implementation of memcpy for TPL"
497 default y if USE_ARCH_MEMCPY
500 Enable the generation of an optimized version of memcpy.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
504 config USE_ARCH_MEMMOVE
505 bool "Use an assembly optimized implementation of memmove" if !ARM64
506 default USE_ARCH_MEMCPY if ARM64
509 Enable the generation of an optimized version of memmove.
510 Such an implementation may be faster under some conditions
511 but may increase the binary size.
513 config SPL_USE_ARCH_MEMMOVE
514 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
515 default SPL_USE_ARCH_MEMCPY if ARM64
516 depends on SPL && ARM64
518 Enable the generation of an optimized version of memmove.
519 Such an implementation may be faster under some conditions
520 but may increase the binary size.
522 config TPL_USE_ARCH_MEMMOVE
523 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
524 default TPL_USE_ARCH_MEMCPY if ARM64
525 depends on TPL && ARM64
527 Enable the generation of an optimized version of memmove.
528 Such an implementation may be faster under some conditions
529 but may increase the binary size.
531 config USE_ARCH_MEMSET
532 bool "Use an assembly optimized implementation of memset"
534 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
536 Enable the generation of an optimized version of memset.
537 Such an implementation may be faster under some conditions
538 but may increase the binary size.
540 config SPL_USE_ARCH_MEMSET
541 bool "Use an assembly optimized implementation of memset for SPL"
542 default y if USE_ARCH_MEMSET
545 Enable the generation of an optimized version of memset.
546 Such an implementation may be faster under some conditions
547 but may increase the binary size.
549 config TPL_USE_ARCH_MEMSET
550 bool "Use an assembly optimized implementation of memset for TPL"
551 default y if USE_ARCH_MEMSET
554 Enable the generation of an optimized version of memset.
555 Such an implementation may be faster under some conditions
556 but may increase the binary size.
558 config ARM64_SUPPORT_AARCH32
559 bool "ARM64 system support AArch32 execution state"
561 default y if !TARGET_THUNDERX_88XX
563 This ARM64 system supports AArch32 execution state.
569 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
572 prompt "Target select"
577 select GPIO_EXTRA_HEADER
578 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
579 select SPL_SEPARATE_BSS if SPL
580 imply SYS_THUMB_BUILD
585 select GPIO_EXTRA_HEADER
586 select SPL_DM_SPI if SPL
589 Support for TI's DaVinci platform.
592 bool "Hisilicon HiSTB SoCs"
599 Support for HiSTB SoCs.
602 bool "Marvell Kirkwood"
603 select ARCH_MISC_INIT
604 select BOARD_EARLY_INIT_F
606 select GPIO_EXTRA_HEADER
610 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
611 select ARCH_EARLY_INIT_R if ARM64
616 select GPIO_EXTRA_HEADER
618 select SPL_DM_SPI if SPL
619 select SPL_DM_SPI_FLASH if SPL
620 select SPL_TIMER if SPL
621 select TIMER if !ARM64
630 select GPIO_EXTRA_HEADER
631 select SPL_SEPARATE_BSS if SPL
634 config TARGET_STV0991
635 bool "Support stv0991"
641 select GPIO_EXTRA_HEADER
649 bool "Broadcom BCM283X family"
653 select GPIO_EXTRA_HEADER
656 select SERIAL_SEARCH_ALL
661 bool "Broadcom BCM7XXX family"
664 select GPIO_EXTRA_HEADER
667 imply OF_HAS_PRIOR_STAGE
669 This enables support for Broadcom ARM-based set-top box
670 chipsets, including the 7445 family of chips.
673 bool "Broadcom broadband chip family"
678 config TARGET_VEXPRESS_CA9X4
679 bool "Support vexpress_ca9x4"
684 bool "Support Broadcom Northstar"
692 select ARM_GLOBAL_TIMER
693 imply SYS_THUMB_BUILD
696 imply NAND_BRCMNAND_IPROC
698 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
699 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
703 bool "Support Broadcom Northstar2"
705 select GPIO_EXTRA_HEADER
707 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
708 ARMv8 Cortex-A57 processors targeting a broad range of networking
712 bool "Support Broadcom NS3"
714 select BOARD_LATE_INIT
716 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
717 ARMv8 Cortex-A72 processors targeting a broad range of networking
721 bool "Samsung EXYNOS"
731 select GPIO_EXTRA_HEADER
732 imply SYS_THUMB_BUILD
737 bool "Samsung S5PC1XX"
743 select GPIO_EXTRA_HEADER
747 bool "Calxeda Highbank"
759 imply OF_HAS_PRIOR_STAGE
761 config ARCH_INTEGRATOR
762 bool "ARM Ltd. Integrator family"
765 select GPIO_EXTRA_HEADER
770 bool "Qualcomm IPQ40xx SoCs"
776 select GPIO_EXTRA_HEADER
782 select CLK_QCOM_IPQ4019
783 select PINCTRL_QCOM_IPQ4019
792 select SPL_BOARD_INIT if SPL
794 select SYS_ARCH_TIMER
795 select SYS_THUMB_BUILD
802 imply TI_KEYSTONE_SERDES
805 bool "Texas Instruments' K3 Architecture"
810 select FIT_SIGNATURE if ARM64
811 imply TI_SECURE_DEVICE
813 config ARCH_OMAP2PLUS
816 select GPIO_EXTRA_HEADER
817 select SPL_BOARD_INIT if SPL
818 select SPL_STACK_R if SPL
820 imply TI_SYSC if DM && OF_CONTROL
822 imply SPL_SEPARATE_BSS
826 select GPIO_EXTRA_HEADER
827 imply DISTRO_DEFAULTS
830 Support for the Meson SoC family developed by Amlogic Inc.,
831 targeted at media players and tablet computers. We currently
832 support the S905 (GXBaby) 64-bit SoC.
837 select GPIO_EXTRA_HEADER
840 select SPL_LIBCOMMON_SUPPORT if SPL
841 select SPL_LIBGENERIC_SUPPORT if SPL
842 select SPL_OF_CONTROL if SPL
845 Support for the MediaTek SoCs family developed by MediaTek Inc.
846 Please refer to doc/README.mediatek for more information.
849 bool "NXP LPC32xx platform"
854 select GPIO_EXTRA_HEADER
860 bool "NXP i.MX8 platform"
862 select SYS_FSL_HAS_SEC
863 select SYS_FSL_SEC_COMPAT_4
864 select SYS_FSL_SEC_LE
867 select GPIO_EXTRA_HEADER
870 select ENABLE_ARM_SOC_BOOT0_HOOK
873 bool "NXP i.MX8M platform"
875 select GPIO_EXTRA_HEADER
877 select SYS_FSL_HAS_SEC
878 select SYS_FSL_SEC_COMPAT_4
879 select SYS_FSL_SEC_LE
882 select DM_EVENT if CLK
887 bool "NXP i.MX8ULP platform"
894 select GPIO_EXTRA_HEADER
900 bool "NXP i.MX9 platform"
906 select GPIO_EXTRA_HEADER
912 bool "NXP i.MXRT platform"
916 select GPIO_EXTRA_HEADER
922 bool "NXP i.MX23 family"
924 select GPIO_EXTRA_HEADER
929 bool "NXP i.MX28 family"
931 select GPIO_EXTRA_HEADER
936 bool "NXP i.MX31 family"
938 select GPIO_EXTRA_HEADER
943 select BOARD_POSTCLK_INIT
945 select GPIO_EXTRA_HEADER
947 select SYS_FSL_HAS_SEC
948 select SYS_FSL_SEC_COMPAT_4
949 select SYS_FSL_SEC_LE
950 select ROM_UNIFIED_SECTIONS
952 imply SYS_THUMB_BUILD
956 select ARCH_MISC_INIT
958 select GPIO_EXTRA_HEADER
961 select SYS_FSL_HAS_SEC
962 select SYS_FSL_SEC_COMPAT_4
963 select SYS_FSL_SEC_LE
964 imply BOARD_EARLY_INIT_F
966 imply SYS_THUMB_BUILD
970 select BOARD_POSTCLK_INIT
972 select GPIO_EXTRA_HEADER
975 select SYS_FSL_HAS_SEC
976 select SYS_FSL_SEC_COMPAT_4
977 select SYS_FSL_SEC_LE
978 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
980 imply SYS_THUMB_BUILD
981 imply SPL_SEPARATE_BSS
985 select BOARD_EARLY_INIT_F
987 select GPIO_EXTRA_HEADER
992 bool "Nexell S5P4418/S5P6818 SoC"
993 select ENABLE_ARM_SOC_BOOT0_HOOK
995 select GPIO_EXTRA_HEADER
998 bool "Support Nuvoton SoCs"
1019 select LINUX_KERNEL_IMAGE_HEADER
1021 select OF_BOARD_SETUP
1026 select POSITION_INDEPENDENT
1032 select SYSRESET_WATCHDOG
1033 select SYSRESET_WATCHDOG_AUTO
1037 imply DISTRO_DEFAULTS
1038 imply OF_HAS_PRIOR_STAGE
1041 bool "Actions Semi OWL SoCs"
1044 select GPIO_EXTRA_HEADER
1049 select SYS_RELOC_GD_ENV_ADDR
1053 bool "QEMU Virtual Platform"
1062 imply OF_HAS_PRIOR_STAGE
1065 imply SYS_WHITE_ON_BLACK
1066 imply SYS_CONSOLE_IS_IN_ENV
1067 imply PRE_CONSOLE_BUFFER
1075 bool "Renesas ARM SoCs"
1078 select GPIO_EXTRA_HEADER
1079 imply BOARD_EARLY_INIT_F
1082 imply SYS_THUMB_BUILD
1083 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1085 config ARCH_SNAPDRAGON
1086 bool "Qualcomm Snapdragon SoCs"
1092 select GPIO_EXTRA_HEADER
1101 bool "Altera SOCFPGA family"
1102 select ARCH_EARLY_INIT_R
1103 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1104 select ARM64 if TARGET_SOCFPGA_SOC64
1105 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1109 select GPIO_EXTRA_HEADER
1110 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1112 select SPL_DM_RESET if DM_RESET
1113 select SPL_DM_SERIAL
1114 select SPL_LIBCOMMON_SUPPORT
1115 select SPL_LIBGENERIC_SUPPORT
1116 select SPL_OF_CONTROL
1117 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1123 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1125 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1126 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1137 imply SPL_DM_SPI_FLASH
1138 imply SPL_LIBDISK_SUPPORT
1140 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1141 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1142 imply SPL_SPI_FLASH_SUPPORT
1147 bool "Support sunxi (Allwinner) SoCs"
1150 select CMD_MMC if MMC
1151 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1155 select DM_I2C if I2C
1156 select DM_SPI if SPI
1157 select DM_SPI_FLASH if SPI && MTD
1159 select DM_MMC if MMC
1161 select OF_BOARD_SETUP
1165 select SPECIFY_CONSOLE_INDEX
1166 select SPL_SEPARATE_BSS if SPL
1167 select SPL_STACK_R if SPL
1168 select SPL_SYS_MALLOC_SIMPLE if SPL
1169 select SPL_SYS_THUMB_BUILD if SPL && !ARM64
1172 select SYS_THUMB_BUILD if !ARM64
1173 select USB if DISTRO_DEFAULTS
1174 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1175 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1176 select SPL_USE_TINY_PRINTF if SPL
1178 select SYS_RELOC_GD_ENV_ADDR
1179 imply BOARD_LATE_INIT
1182 imply CMD_UBI if MTD_RAW_NAND
1183 imply DISTRO_DEFAULTS
1185 imply DM_REGULATOR_FIXED
1188 imply OF_LIBFDT_OVERLAY
1189 imply PRE_CONSOLE_BUFFER
1191 imply SPL_LIBCOMMON_SUPPORT
1192 imply SPL_LIBGENERIC_SUPPORT
1193 imply SPL_MMC if MMC
1197 imply SYSRESET_WATCHDOG
1198 imply SYSRESET_WATCHDOG_AUTO
1203 bool "ST-Ericsson U8500 Series"
1207 select DM_MMC if MMC
1209 select DM_USB_GADGET if DM_USB
1213 imply AB8500_USB_PHY
1214 imply ARM_PL180_MMCI
1219 imply NOMADIK_MTU_TIMER
1224 imply SYS_THUMB_BUILD
1225 imply SYSRESET_SYSCON
1228 bool "Support Xilinx Versal Platform"
1232 select DM_MMC if MMC
1237 imply BOARD_LATE_INIT
1238 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1240 config ARCH_VERSAL_NET
1241 bool "Support Xilinx Versal NET Platform"
1245 select DM_MMC if MMC
1248 imply BOARD_LATE_INIT
1249 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1252 bool "Freescale Vybrid"
1254 select GPIO_EXTRA_HEADER
1255 select IOMUX_SHARE_CONF_REG
1257 select SYS_FSL_ERRATUM_ESDHC111
1262 bool "Xilinx Zynq based platform"
1263 select ARM_TWD_TIMER
1264 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1268 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1270 select DM_MMC if MMC
1277 select SPL_BOARD_INIT if SPL
1278 select SPL_CLK if SPL
1279 select SPL_DM if SPL
1280 select SPL_DM_SPI if SPL
1281 select SPL_DM_SPI_FLASH if SPL
1282 select SPL_OF_CONTROL if SPL
1283 select SPL_SEPARATE_BSS if SPL
1284 select SPL_TIMER if SPL
1287 imply BOARD_LATE_INIT
1291 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1294 config ARCH_ZYNQMP_R5
1295 bool "Xilinx ZynqMP R5 based platform"
1299 select DM_MMC if MMC
1306 bool "Xilinx ZynqMP based platform"
1310 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1312 select DM_MMC if MMC
1315 select DM_SPI if SPI
1316 select DM_SPI_FLASH if DM_SPI
1320 select SPL_BOARD_INIT if SPL
1321 select SPL_CLK if SPL
1322 select SPL_DM if SPL
1323 select SPL_DM_SPI if SPI && SPL_DM
1324 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1325 select SPL_DM_MAILBOX if SPL
1326 imply SPL_FIRMWARE if SPL
1327 select SPL_SEPARATE_BSS if SPL
1329 imply ZYNQMP_IPI if DM_MAILBOX
1331 imply BOARD_LATE_INIT
1333 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1337 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1341 select GPIO_EXTRA_HEADER
1342 imply DISTRO_DEFAULTS
1344 imply SPL_TIMER if SPL
1346 config ARCH_VEXPRESS64
1347 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1355 select MTD_NOR_FLASH if MTD
1356 select FLASH_CFI_DRIVER if MTD
1357 select ENV_IS_IN_FLASH if MTD
1358 imply DISTRO_DEFAULTS
1360 config TARGET_CORSTONE1000
1361 bool "Support Corstone1000 Platform"
1366 config TARGET_TOTAL_COMPUTE
1367 bool "Support Total Compute Platform"
1375 config TARGET_LS2080A_EMU
1376 bool "Support ls2080a_emu"
1379 select ARMV8_MULTIENTRY
1380 select FSL_DDR_SYNC_REFRESH
1381 select GPIO_EXTRA_HEADER
1383 Support for Freescale LS2080A_EMU platform.
1384 The LS2080A Development System (EMULATOR) is a pre-silicon
1385 development platform that supports the QorIQ LS2080A
1386 Layerscape Architecture processor.
1388 config TARGET_LS1088AQDS
1389 bool "Support ls1088aqds"
1392 select ARMV8_MULTIENTRY
1393 select ARCH_SUPPORT_TFABOOT
1394 select BOARD_LATE_INIT
1395 select GPIO_EXTRA_HEADER
1397 select FSL_DDR_INTERACTIVE if !SD_BOOT
1399 Support for NXP LS1088AQDS platform.
1400 The LS1088A Development System (QDS) is a high-performance
1401 development platform that supports the QorIQ LS1088A
1402 Layerscape Architecture processor.
1404 config TARGET_LS2080AQDS
1405 bool "Support ls2080aqds"
1408 select ARMV8_MULTIENTRY
1409 select ARCH_SUPPORT_TFABOOT
1410 select BOARD_LATE_INIT
1411 select GPIO_EXTRA_HEADER
1416 select FSL_DDR_INTERACTIVE if !SPL
1418 Support for Freescale LS2080AQDS platform.
1419 The LS2080A Development System (QDS) is a high-performance
1420 development platform that supports the QorIQ LS2080A
1421 Layerscape Architecture processor.
1423 config TARGET_LS2080ARDB
1424 bool "Support ls2080ardb"
1427 select ARMV8_MULTIENTRY
1428 select ARCH_SUPPORT_TFABOOT
1429 select BOARD_LATE_INIT
1432 select FSL_DDR_INTERACTIVE if !SPL
1433 select GPIO_EXTRA_HEADER
1437 Support for Freescale LS2080ARDB platform.
1438 The LS2080A Reference design board (RDB) is a high-performance
1439 development platform that supports the QorIQ LS2080A
1440 Layerscape Architecture processor.
1442 config TARGET_LS2081ARDB
1443 bool "Support ls2081ardb"
1446 select ARMV8_MULTIENTRY
1447 select BOARD_LATE_INIT
1448 select GPIO_EXTRA_HEADER
1451 Support for Freescale LS2081ARDB platform.
1452 The LS2081A Reference design board (RDB) is a high-performance
1453 development platform that supports the QorIQ LS2081A/LS2041A
1454 Layerscape Architecture processor.
1456 config TARGET_LX2160ARDB
1457 bool "Support lx2160ardb"
1460 select ARMV8_MULTIENTRY
1461 select ARCH_SUPPORT_TFABOOT
1462 select BOARD_LATE_INIT
1463 select GPIO_EXTRA_HEADER
1465 Support for NXP LX2160ARDB platform.
1466 The lx2160ardb (LX2160A Reference design board (RDB)
1467 is a high-performance development platform that supports the
1468 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1470 config TARGET_LX2160AQDS
1471 bool "Support lx2160aqds"
1474 select ARMV8_MULTIENTRY
1475 select ARCH_SUPPORT_TFABOOT
1476 select BOARD_LATE_INIT
1477 select GPIO_EXTRA_HEADER
1479 Support for NXP LX2160AQDS platform.
1480 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1481 is a high-performance development platform that supports the
1482 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1484 config TARGET_LX2162AQDS
1485 bool "Support lx2162aqds"
1487 select ARCH_MISC_INIT
1489 select ARMV8_MULTIENTRY
1490 select ARCH_SUPPORT_TFABOOT
1491 select BOARD_LATE_INIT
1492 select GPIO_EXTRA_HEADER
1494 Support for NXP LX2162AQDS platform.
1495 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1498 bool "Support HiKey 96boards Consumer Edition Platform"
1503 select GPIO_EXTRA_HEADER
1506 select SPECIFY_CONSOLE_INDEX
1509 Support for HiKey 96boards platform. It features a HI6220
1510 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1512 config TARGET_HIKEY960
1513 bool "Support HiKey960 96boards Consumer Edition Platform"
1517 select GPIO_EXTRA_HEADER
1522 Support for HiKey960 96boards platform. It features a HI3660
1523 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1525 config TARGET_POPLAR
1526 bool "Support Poplar 96boards Enterprise Edition Platform"
1530 select GPIO_EXTRA_HEADER
1535 Support for Poplar 96boards EE platform. It features a HI3798cv200
1536 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1537 making it capable of running any commercial set-top solution based on
1540 config TARGET_LS1012AQDS
1541 bool "Support ls1012aqds"
1544 select ARCH_SUPPORT_TFABOOT
1545 select BOARD_LATE_INIT
1546 select GPIO_EXTRA_HEADER
1548 Support for Freescale LS1012AQDS platform.
1549 The LS1012A Development System (QDS) is a high-performance
1550 development platform that supports the QorIQ LS1012A
1551 Layerscape Architecture processor.
1553 config TARGET_LS1012ARDB
1554 bool "Support ls1012ardb"
1557 select ARCH_SUPPORT_TFABOOT
1558 select BOARD_LATE_INIT
1559 select GPIO_EXTRA_HEADER
1563 Support for Freescale LS1012ARDB platform.
1564 The LS1012A Reference design board (RDB) is a high-performance
1565 development platform that supports the QorIQ LS1012A
1566 Layerscape Architecture processor.
1568 config TARGET_LS1012A2G5RDB
1569 bool "Support ls1012a2g5rdb"
1572 select ARCH_SUPPORT_TFABOOT
1573 select BOARD_LATE_INIT
1574 select GPIO_EXTRA_HEADER
1577 Support for Freescale LS1012A2G5RDB platform.
1578 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1579 development platform that supports the QorIQ LS1012A
1580 Layerscape Architecture processor.
1582 config TARGET_LS1012AFRWY
1583 bool "Support ls1012afrwy"
1586 select ARCH_SUPPORT_TFABOOT
1587 select BOARD_LATE_INIT
1588 select GPIO_EXTRA_HEADER
1592 Support for Freescale LS1012AFRWY platform.
1593 The LS1012A FRWY board (FRWY) is a high-performance
1594 development platform that supports the QorIQ LS1012A
1595 Layerscape Architecture processor.
1597 config TARGET_LS1012AFRDM
1598 bool "Support ls1012afrdm"
1601 select ARCH_SUPPORT_TFABOOT
1602 select GPIO_EXTRA_HEADER
1604 Support for Freescale LS1012AFRDM platform.
1605 The LS1012A Freedom board (FRDM) is a high-performance
1606 development platform that supports the QorIQ LS1012A
1607 Layerscape Architecture processor.
1609 config TARGET_LS1028AQDS
1610 bool "Support ls1028aqds"
1613 select ARMV8_MULTIENTRY
1614 select ARCH_SUPPORT_TFABOOT
1615 select BOARD_LATE_INIT
1616 select GPIO_EXTRA_HEADER
1618 Support for Freescale LS1028AQDS platform
1619 The LS1028A Development System (QDS) is a high-performance
1620 development platform that supports the QorIQ LS1028A
1621 Layerscape Architecture processor.
1623 config TARGET_LS1028ARDB
1624 bool "Support ls1028ardb"
1627 select ARMV8_MULTIENTRY
1628 select ARCH_SUPPORT_TFABOOT
1629 select BOARD_LATE_INIT
1630 select GPIO_EXTRA_HEADER
1632 Support for Freescale LS1028ARDB platform
1633 The LS1028A Development System (RDB) is a high-performance
1634 development platform that supports the QorIQ LS1028A
1635 Layerscape Architecture processor.
1637 config TARGET_LS1088ARDB
1638 bool "Support ls1088ardb"
1641 select ARMV8_MULTIENTRY
1642 select ARCH_SUPPORT_TFABOOT
1643 select BOARD_LATE_INIT
1645 select FSL_DDR_INTERACTIVE if !SD_BOOT
1646 select GPIO_EXTRA_HEADER
1648 Support for NXP LS1088ARDB platform.
1649 The LS1088A Reference design board (RDB) is a high-performance
1650 development platform that supports the QorIQ LS1088A
1651 Layerscape Architecture processor.
1653 config TARGET_LS1021AQDS
1654 bool "Support ls1021aqds"
1656 select ARCH_SUPPORT_PSCI
1657 select BOARD_EARLY_INIT_F
1658 select BOARD_LATE_INIT
1660 select CPU_V7_HAS_NONSEC
1661 select CPU_V7_HAS_VIRT
1662 select LS1_DEEP_SLEEP
1663 select PEN_ADDR_BIG_ENDIAN
1666 select FSL_DDR_INTERACTIVE
1667 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1668 select GPIO_EXTRA_HEADER
1669 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1672 config TARGET_LS1021ATWR
1673 bool "Support ls1021atwr"
1675 select ARCH_SUPPORT_PSCI
1676 select BOARD_EARLY_INIT_F
1677 select BOARD_LATE_INIT
1679 select CPU_V7_HAS_NONSEC
1680 select CPU_V7_HAS_VIRT
1681 select LS1_DEEP_SLEEP
1682 select PEN_ADDR_BIG_ENDIAN
1684 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1685 select GPIO_EXTRA_HEADER
1688 config TARGET_PG_WCOM_SELI8
1689 bool "Support Hitachi-Powergrids SELI8 service unit card"
1691 select ARCH_SUPPORT_PSCI
1692 select BOARD_EARLY_INIT_F
1693 select BOARD_LATE_INIT
1695 select CPU_V7_HAS_NONSEC
1696 select CPU_V7_HAS_VIRT
1698 select FSL_DDR_INTERACTIVE
1699 select GPIO_EXTRA_HEADER
1703 Support for Hitachi-Powergrids SELI8 service unit card.
1704 SELI8 is a QorIQ LS1021a based service unit card used
1705 in XMC20 and FOX615 product families.
1707 config TARGET_PG_WCOM_EXPU1
1708 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1710 select ARCH_SUPPORT_PSCI
1711 select BOARD_EARLY_INIT_F
1712 select BOARD_LATE_INIT
1714 select CPU_V7_HAS_NONSEC
1715 select CPU_V7_HAS_VIRT
1717 select FSL_DDR_INTERACTIVE
1721 Support for Hitachi-Powergrids EXPU1 service unit card.
1722 EXPU1 is a QorIQ LS1021a based service unit card used
1723 in XMC20 and FOX615 product families.
1725 config TARGET_LS1021ATSN
1726 bool "Support ls1021atsn"
1728 select ARCH_SUPPORT_PSCI
1729 select BOARD_EARLY_INIT_F
1730 select BOARD_LATE_INIT
1732 select CPU_V7_HAS_NONSEC
1733 select CPU_V7_HAS_VIRT
1734 select LS1_DEEP_SLEEP
1736 select GPIO_EXTRA_HEADER
1739 config TARGET_LS1021AIOT
1740 bool "Support ls1021aiot"
1742 select ARCH_SUPPORT_PSCI
1743 select BOARD_LATE_INIT
1745 select CPU_V7_HAS_NONSEC
1746 select CPU_V7_HAS_VIRT
1747 select PEN_ADDR_BIG_ENDIAN
1749 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1750 select GPIO_EXTRA_HEADER
1753 Support for Freescale LS1021AIOT platform.
1754 The LS1021A Freescale board (IOT) is a high-performance
1755 development platform that supports the QorIQ LS1021A
1756 Layerscape Architecture processor.
1758 config TARGET_LS1043AQDS
1759 bool "Support ls1043aqds"
1762 select ARMV8_MULTIENTRY
1763 select ARCH_SUPPORT_TFABOOT
1764 select BOARD_EARLY_INIT_F
1765 select BOARD_LATE_INIT
1767 select FSL_DDR_INTERACTIVE if !SPL
1768 select FSL_DSPI if !SPL_NO_DSPI
1769 select DM_SPI_FLASH if FSL_DSPI
1770 select GPIO_EXTRA_HEADER
1774 Support for Freescale LS1043AQDS platform.
1776 config TARGET_LS1043ARDB
1777 bool "Support ls1043ardb"
1780 select ARMV8_MULTIENTRY
1781 select ARCH_SUPPORT_TFABOOT
1782 select BOARD_EARLY_INIT_F
1783 select BOARD_LATE_INIT
1785 select FSL_DSPI if !SPL_NO_DSPI
1786 select DM_SPI_FLASH if FSL_DSPI
1787 select GPIO_EXTRA_HEADER
1789 Support for Freescale LS1043ARDB platform.
1791 config TARGET_LS1046AQDS
1792 bool "Support ls1046aqds"
1795 select ARMV8_MULTIENTRY
1796 select ARCH_SUPPORT_TFABOOT
1797 select BOARD_EARLY_INIT_F
1798 select BOARD_LATE_INIT
1799 select DM_SPI_FLASH if DM_SPI
1801 select FSL_DDR_BIST if !SPL
1802 select FSL_DDR_INTERACTIVE if !SPL
1803 select FSL_DDR_INTERACTIVE if !SPL
1804 select GPIO_EXTRA_HEADER
1807 Support for Freescale LS1046AQDS platform.
1808 The LS1046A Development System (QDS) is a high-performance
1809 development platform that supports the QorIQ LS1046A
1810 Layerscape Architecture processor.
1812 config TARGET_LS1046ARDB
1813 bool "Support ls1046ardb"
1816 select ARMV8_MULTIENTRY
1817 select ARCH_SUPPORT_TFABOOT
1818 select BOARD_EARLY_INIT_F
1819 select BOARD_LATE_INIT
1820 select DM_SPI_FLASH if DM_SPI
1821 select POWER_MC34VR500
1824 select FSL_DDR_INTERACTIVE if !SPL
1825 select GPIO_EXTRA_HEADER
1828 Support for Freescale LS1046ARDB platform.
1829 The LS1046A Reference Design Board (RDB) is a high-performance
1830 development platform that supports the QorIQ LS1046A
1831 Layerscape Architecture processor.
1833 config TARGET_LS1046AFRWY
1834 bool "Support ls1046afrwy"
1837 select ARMV8_MULTIENTRY
1838 select ARCH_SUPPORT_TFABOOT
1839 select BOARD_EARLY_INIT_F
1840 select BOARD_LATE_INIT
1841 select DM_SPI_FLASH if DM_SPI
1842 select GPIO_EXTRA_HEADER
1845 Support for Freescale LS1046AFRWY platform.
1846 The LS1046A Freeway Board (FRWY) is a high-performance
1847 development platform that supports the QorIQ LS1046A
1848 Layerscape Architecture processor.
1854 select ARMV8_MULTIENTRY
1870 select GPIO_EXTRA_HEADER
1871 select SPL_DM if SPL
1872 select SPL_DM_SPI if SPL
1873 select SPL_DM_SPI_FLASH if SPL
1874 select SPL_DM_I2C if SPL
1875 select SPL_DM_MMC if SPL
1876 select SPL_DM_SERIAL if SPL
1878 Support for Kontron SMARC-sAL28 board.
1881 bool "Support ten64"
1883 select ARCH_MISC_INIT
1885 select ARMV8_MULTIENTRY
1886 select ARCH_SUPPORT_TFABOOT
1887 select BOARD_LATE_INIT
1889 select FSL_DDR_INTERACTIVE if !SD_BOOT
1890 select GPIO_EXTRA_HEADER
1892 Support for Traverse Technologies Ten64 board, based
1895 config ARCH_UNIPHIER
1896 bool "Socionext UniPhier SoCs"
1897 select BOARD_LATE_INIT
1905 select OF_BOARD_SETUP
1909 select SPL_BOARD_INIT if SPL
1910 select SPL_DM if SPL
1911 select SPL_LIBCOMMON_SUPPORT if SPL
1912 select SPL_LIBGENERIC_SUPPORT if SPL
1913 select SPL_OF_CONTROL if SPL
1914 select SPL_PINCTRL if SPL
1917 imply DISTRO_DEFAULTS
1920 Support for UniPhier SoC family developed by Socionext Inc.
1921 (formerly, System LSI Business Division of Panasonic Corporation)
1923 config ARCH_SYNQUACER
1924 bool "Socionext SynQuacer SoCs"
1930 select SYSRESET_PSCI
1933 Support for SynQuacer SoC family developed by Socionext Inc.
1934 This SoC is used on 96boards EE DeveloperBox.
1937 bool "Support STMicroelectronics STM32 MCU with cortex M"
1944 bool "Support STMicroelectronics SoCs"
1953 Support for STMicroelectronics STiH407/10 SoC family.
1954 This SoC is used on Linaro 96Board STiH410-B2260
1957 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1958 select ARCH_MISC_INIT
1959 select ARCH_SUPPORT_TFABOOT
1960 select BOARD_LATE_INIT
1969 select OF_SYSTEM_SETUP
1974 select SYS_THUMB_BUILD if !ARM64
1978 imply OF_LIBFDT_OVERLAY
1979 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1983 Support for STM32MP SoC family developed by STMicroelectronics,
1984 MPUs based on ARM cortex A core
1985 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1986 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1988 SPL is the unsecure FSBL for the basic boot chain.
1990 config ARCH_ROCKCHIP
1991 bool "Support Rockchip SoCs"
1993 select BINMAN if SPL_OPTEE || SPL
2003 select DM_USB_GADGET if USB_DWC3_GADGET
2004 select ENABLE_ARM_SOC_BOOT0_HOOK
2008 select SPL_DM if SPL
2009 select SPL_DM_SPI if SPL
2010 select SPL_DM_SPI_FLASH if SPL
2012 select SYS_THUMB_BUILD if !ARM64
2015 imply DEBUG_UART_BOARD_INIT
2016 imply BOOTSTD_DEFAULTS
2018 imply SARADC_ROCKCHIP
2020 imply SPL_SYS_MALLOC_SIMPLE
2023 imply USB_FUNCTION_FASTBOOT
2025 config ARCH_OCTEONTX
2026 bool "Support OcteonTX SoCs"
2029 select GPIO_EXTRA_HEADER
2033 select BOARD_LATE_INIT
2034 select SYS_CACHE_SHIFT_7
2035 select SYS_PCI_64BIT if PCI
2036 imply OF_HAS_PRIOR_STAGE
2038 config ARCH_OCTEONTX2
2039 bool "Support OcteonTX2 SoCs"
2042 select GPIO_EXTRA_HEADER
2046 select BOARD_LATE_INIT
2047 select SYS_CACHE_SHIFT_7
2048 select SYS_PCI_64BIT if PCI
2049 imply OF_HAS_PRIOR_STAGE
2051 config TARGET_THUNDERX_88XX
2052 bool "Support ThunderX 88xx"
2054 select GPIO_EXTRA_HEADER
2057 select SYS_CACHE_SHIFT_7
2060 bool "Support Aspeed SoCs"
2065 config TARGET_DURIAN
2066 bool "Support Phytium Durian Platform"
2068 select GPIO_EXTRA_HEADER
2070 Support for durian platform.
2071 It has 2GB Sdram, uart and pcie.
2073 config TARGET_POMELO
2074 bool "Support Phytium Pomelo Platform"
2087 Support for pomelo platform.
2088 It has 8GB Sdram, uart and pcie.
2090 config TARGET_PE2201
2091 bool "Support Phytium PE2201 Platform"
2094 Support for pe2201 platform.It has 2GB Sdram, uart and pcie.
2096 config TARGET_PRESIDIO_ASIC
2097 bool "Support Cortina Presidio ASIC Platform"
2101 config TARGET_XENGUEST_ARM64
2102 bool "Xen guest ARM64"
2106 select LINUX_KERNEL_IMAGE_HEADER
2108 imply OF_HAS_PRIOR_STAGE
2111 bool "Support HPE GXP SoCs"
2118 config SUPPORT_PASSING_ATAGS
2119 bool "Support pre-devicetree ATAG-based booting"
2121 imply SETUP_MEMORY_TAGS
2123 Support for booting older Linux kernels, using ATAGs rather than
2124 passing a devicetree. This is option is rarely used, and the
2125 semantics are defined at
2126 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2128 config SETUP_MEMORY_TAGS
2129 bool "Pass memory size information via ATAG"
2130 depends on SUPPORT_PASSING_ATAGS
2133 bool "Pass Linux kernel cmdline via ATAG"
2134 depends on SUPPORT_PASSING_ATAGS
2137 bool "Pass initrd starting point and size via ATAG"
2138 depends on SUPPORT_PASSING_ATAGS
2141 bool "Pass system revision via ATAG"
2142 depends on SUPPORT_PASSING_ATAGS
2145 bool "Pass system serial number via ATAG"
2146 depends on SUPPORT_PASSING_ATAGS
2148 config STATIC_MACH_TYPE
2149 bool "Statically define the Machine ID number"
2150 default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2152 When booting via ATAGs, enable this option if we know the correct
2153 machine ID number to use at compile time. Some systems will be
2154 passed the number dynamically by whatever loads U-Boot.
2157 int "Machine ID number"
2158 depends on STATIC_MACH_TYPE
2159 default 527 if TARGET_DS109
2160 default 3036 if TARGET_DS414
2161 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2163 When booting via ATAGs, the machine type must be passed as a number.
2164 For the full list see https://www.arm.linux.org.uk/developer/machines
2166 config ARCH_SUPPORT_TFABOOT
2170 bool "Support for booting from TF-A"
2171 depends on ARCH_SUPPORT_TFABOOT
2173 Some platforms support the setup of secure registers (for instance
2174 for CPU errata handling) or provide secure services like PSCI.
2175 Those services could also be provided by other firmware parts
2176 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2177 does not need to (and cannot) execute this code.
2178 Enabling this option will make a U-Boot binary that is relying
2179 on other firmware layers to provide secure functionality.
2181 config TI_SECURE_DEVICE
2182 bool "HS Device Type Support"
2183 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2185 If a high secure (HS) device type is being used, this config
2186 must be set. This option impacts various aspects of the
2187 build system (to create signed boot images that can be
2188 authenticated) and the code. See the doc/README.ti-secure
2189 file for further details.
2191 config SYS_KWD_CONFIG
2192 string "kwbimage config file path"
2193 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2194 default "arch/arm/mach-mvebu/kwbimage.cfg"
2196 Path within the source directory to the kwbimage.cfg file to use
2197 when packaging the U-Boot image for use.
2199 source "arch/arm/mach-apple/Kconfig"
2201 source "arch/arm/mach-aspeed/Kconfig"
2203 source "arch/arm/mach-at91/Kconfig"
2205 source "arch/arm/mach-bcm283x/Kconfig"
2207 source "arch/arm/mach-bcmbca/Kconfig"
2209 source "arch/arm/mach-bcmstb/Kconfig"
2211 source "arch/arm/mach-davinci/Kconfig"
2213 source "arch/arm/mach-exynos/Kconfig"
2215 source "arch/arm/mach-hpe/gxp/Kconfig"
2217 source "arch/arm/mach-highbank/Kconfig"
2219 source "arch/arm/mach-histb/Kconfig"
2221 source "arch/arm/mach-integrator/Kconfig"
2223 source "arch/arm/mach-ipq40xx/Kconfig"
2225 source "arch/arm/mach-k3/Kconfig"
2227 source "arch/arm/mach-keystone/Kconfig"
2229 source "arch/arm/mach-kirkwood/Kconfig"
2231 source "arch/arm/mach-lpc32xx/Kconfig"
2233 source "arch/arm/mach-mvebu/Kconfig"
2235 source "arch/arm/mach-octeontx/Kconfig"
2237 source "arch/arm/mach-octeontx2/Kconfig"
2239 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2241 source "arch/arm/mach-imx/mx3/Kconfig"
2243 source "arch/arm/mach-imx/mx5/Kconfig"
2245 source "arch/arm/mach-imx/mx6/Kconfig"
2247 source "arch/arm/mach-imx/mx7/Kconfig"
2249 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2251 source "arch/arm/mach-imx/imx8/Kconfig"
2253 source "arch/arm/mach-imx/imx8m/Kconfig"
2255 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2257 source "arch/arm/mach-imx/imx9/Kconfig"
2259 source "arch/arm/mach-imx/imxrt/Kconfig"
2261 source "arch/arm/mach-imx/mxs/Kconfig"
2263 source "arch/arm/mach-omap2/Kconfig"
2265 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2267 source "arch/arm/mach-orion5x/Kconfig"
2269 source "arch/arm/mach-owl/Kconfig"
2271 source "arch/arm/mach-rmobile/Kconfig"
2273 source "arch/arm/mach-meson/Kconfig"
2275 source "arch/arm/mach-mediatek/Kconfig"
2277 source "arch/arm/mach-qemu/Kconfig"
2279 source "arch/arm/mach-rockchip/Kconfig"
2281 source "arch/arm/mach-s5pc1xx/Kconfig"
2283 source "arch/arm/mach-snapdragon/Kconfig"
2285 source "arch/arm/mach-socfpga/Kconfig"
2287 source "arch/arm/mach-sti/Kconfig"
2289 source "arch/arm/mach-stm32/Kconfig"
2291 source "arch/arm/mach-stm32mp/Kconfig"
2293 source "arch/arm/mach-sunxi/Kconfig"
2295 source "arch/arm/mach-tegra/Kconfig"
2297 source "arch/arm/mach-u8500/Kconfig"
2299 source "arch/arm/mach-uniphier/Kconfig"
2301 source "arch/arm/cpu/armv7/vf610/Kconfig"
2303 source "arch/arm/mach-zynq/Kconfig"
2305 source "arch/arm/mach-zynqmp/Kconfig"
2307 source "arch/arm/mach-versal/Kconfig"
2309 source "arch/arm/mach-versal-net/Kconfig"
2311 source "arch/arm/mach-zynqmp-r5/Kconfig"
2313 source "arch/arm/cpu/armv7/Kconfig"
2315 source "arch/arm/cpu/armv8/Kconfig"
2317 source "arch/arm/mach-imx/Kconfig"
2319 source "arch/arm/mach-nexell/Kconfig"
2321 source "arch/arm/mach-npcm/Kconfig"
2323 source "board/armltd/total_compute/Kconfig"
2324 source "board/armltd/corstone1000/Kconfig"
2325 source "board/bosch/shc/Kconfig"
2326 source "board/bosch/guardian/Kconfig"
2327 source "board/Marvell/octeontx/Kconfig"
2328 source "board/Marvell/octeontx2/Kconfig"
2329 source "board/armltd/vexpress/Kconfig"
2330 source "board/armltd/vexpress64/Kconfig"
2331 source "board/cortina/presidio-asic/Kconfig"
2332 source "board/broadcom/bcmns/Kconfig"
2333 source "board/broadcom/bcmns3/Kconfig"
2334 source "board/cavium/thunderx/Kconfig"
2335 source "board/eets/pdu001/Kconfig"
2336 source "board/emulation/qemu-arm/Kconfig"
2337 source "board/freescale/ls2080aqds/Kconfig"
2338 source "board/freescale/ls2080ardb/Kconfig"
2339 source "board/freescale/ls1088a/Kconfig"
2340 source "board/freescale/ls1028a/Kconfig"
2341 source "board/freescale/ls1021aqds/Kconfig"
2342 source "board/freescale/ls1043aqds/Kconfig"
2343 source "board/freescale/ls1021atwr/Kconfig"
2344 source "board/freescale/ls1021atsn/Kconfig"
2345 source "board/freescale/ls1021aiot/Kconfig"
2346 source "board/freescale/ls1046aqds/Kconfig"
2347 source "board/freescale/ls1043ardb/Kconfig"
2348 source "board/freescale/ls1046ardb/Kconfig"
2349 source "board/freescale/ls1046afrwy/Kconfig"
2350 source "board/freescale/ls1012aqds/Kconfig"
2351 source "board/freescale/ls1012ardb/Kconfig"
2352 source "board/freescale/ls1012afrdm/Kconfig"
2353 source "board/freescale/lx2160a/Kconfig"
2354 source "board/grinn/chiliboard/Kconfig"
2355 source "board/hisilicon/hikey/Kconfig"
2356 source "board/hisilicon/hikey960/Kconfig"
2357 source "board/hisilicon/poplar/Kconfig"
2358 source "board/isee/igep003x/Kconfig"
2359 source "board/kontron/sl28/Kconfig"
2360 source "board/myir/mys_6ulx/Kconfig"
2361 source "board/samsung/common/Kconfig"
2362 source "board/siemens/common/Kconfig"
2363 source "board/seeed/npi_imx6ull/Kconfig"
2364 source "board/socionext/developerbox/Kconfig"
2365 source "board/st/stv0991/Kconfig"
2366 source "board/tcl/sl50/Kconfig"
2367 source "board/traverse/ten64/Kconfig"
2368 source "board/variscite/dart_6ul/Kconfig"
2369 source "board/vscom/baltos/Kconfig"
2370 source "board/phytium/durian/Kconfig"
2371 source "board/phytium/pomelo/Kconfig"
2372 source "board/phytium/pe2201/Kconfig"
2373 source "board/xen/xenguest_arm64/Kconfig"
2375 source "arch/arm/Kconfig.debug"