5 * All Intel Core family
7 CPUID: family 0x6, models 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
8 0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
9 0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield),
10 0x26 (Tunnel Creek Atom), 0x27 (Medfield Atom),
11 0x36 (Cedar Trail Atom)
12 Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual
13 Volume 3A: System Programming Guide
14 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
20 This driver permits reading the DTS (Digital Temperature Sensor) embedded
21 inside Intel CPUs. This driver can read both the per-core and per-package
22 temperature using the appropriate sensors. The per-package sensor is new;
23 as of now, it is present only in the SandyBridge platform. The driver will
24 show the temperature of all cores inside a package under a single device
25 directory inside hwmon.
27 Temperature is measured in degrees Celsius and measurement resolution is
28 1 degree C. Valid temperatures are from 0 to TjMax degrees C, because
29 the actual value of temperature register is in fact a delta from TjMax.
31 Temperature known as TjMax is the maximum junction temperature of processor,
32 which depends on the CPU model. See table below. At this temperature, protection
33 mechanism will perform actions to forcibly cool down the processor. Alarm
34 may be raised, if the temperature grows enough (more than TjMax) to trigger
35 the Out-Of-Spec bit. Following table summarizes the exported sysfs files:
37 All Sysfs entries are named with their core_id (represented here by 'X').
38 tempX_input - Core temperature (in millidegrees Celsius).
39 tempX_max - All cooling devices should be turned on (on Core2).
40 tempX_crit - Maximum junction temperature (in millidegrees Celsius).
41 tempX_crit_alarm - Set when Out-of-spec bit is set, never clears.
42 Correct CPU operation is no longer guaranteed.
43 tempX_label - Contains string "Core X", where X is processor
44 number. For Package temp, this will be "Physical id Y",
45 where Y is the package number.
47 On CPU models which support it, TjMax is read from a model-specific register.
48 On other models, it is set to an arbitrary value based on weak heuristics.
49 If these heuristics don't work for you, you can pass the correct TjMax value
50 as a module parameter (tjmax).
52 Appendix A. Known TjMax lists (TBD):
53 Some information comes from ark.intel.com
55 Process Processor TjMax(C)
57 32nm Core i3/i5/i7 Processors
58 i7 660UM/640/620, 640LM/620, 620M, 610E 105
59 i5 540UM/520/430, 540M/520/450/430 105
60 i3 330E, 370M/350/330 90 rPGA, 105 BGA
63 32nm Core i7 Extreme Processors
66 32nm Celeron Processors
73 N2850/2800/2650/2600 100
75 45nm Xeon Processors 5400 Quad-Core
76 X5492, X5482, X5472, X5470, X5460, X5450 85
77 E5472, E5462, E5450/40/30/20/10/05 85
79 L5430, L5420, L5410 70
81 45nm Xeon Processors 5200 Dual-Core
82 X5282, X5272, X5270, X5260 90
90 Z560/550/540/530P/530/520PT/520/515/510PT/510P 90
96 E680T/660T/640T/620T 110
99 Solo ULV SU3500/3300 100
100 T9900/9800/9600/9550/9500/9400/9300/8300/8100 105
105 SL9600/9400/9380/9300 105
106 P9700/9600/9500/8800/8700/8600/8400/7570 105
109 45nm Core2 Quad Processors
112 45nm Core2 Extreme Processors
116 45nm Core i3/i5/i7 Processors
118 i7 840QM/820/740/720 100
120 45nm Celeron Processors
124 65nm Core2 Duo Processors
125 Solo U2200, U2100 100
127 T7800/7700/7600/7500/7400/7300/7250/7200/7100 100
128 T5870/5670/5600/5550/5500/5470/5450/5300/5270 100
131 L7700/7500/7400/7300/7200 100
133 65nm Core2 Extreme Processors
136 65nm Core Duo Processors
138 T2700/2600/2450/2400/2350/2300E/2300/2250/2050 100
141 65nm Core Solo Processors
143 T1400/1350/1300/1250 100
145 65nm Xeon Processors 5000 Quad-Core
151 65nm Xeon Processors 5000 Dual-Core
152 5080, 5063, 5060, 5050, 5030 80-90
153 5160, 5150, 5148, 5140, 5130, 5120, 5110 80
156 65nm Celeron Processors